arch/arm/mach-omap1/mcbsp.c

   1 /*
   2  * linux/arch/arm/mach-omap1/mcbsp.c
   3  *
   4  * Copyright (C) 2008 Instituto Nokia de Tecnologia
   5  * Contact: Eduardo Valentin <eduardo.valentin@indt.org.br>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  *
  11  * Multichannel mode not supported.
  12  */
  13 #include <linux/ioport.h>
  14 #include <linux/module.h>
  15 #include <linux/init.h>
  16 #include <linux/clk.h>
  17 #include <linux/err.h>
  18 #include <linux/io.h>
  19 #include <linux/platform_device.h>
  20 #include <linux/slab.h>
  21
  22 #include <mach/irqs.h>
  23 #include <plat/dma.h>
  24 #include <plat/mux.h>
  25 #include <plat/cpu.h>
  26 #include <plat/mcbsp.h>
  27
  28 #define DPS_RSTCT2_PER_EN       (1 << 0)
  29 #define DSP_RSTCT2_WD_PER_EN    (1 << 1)
  30
  31 static int dsp_use;
  32 static struct clk *api_clk;
  33 static struct clk *dsp_clk;
  34
  35 static void omap1_mcbsp_request(unsigned int id)
  36 {
  37         /*
  38          * On 1510, 1610 and 1710, McBSP1 and McBSP3
  39          * are DSP public peripherals.
  40          */
  41         if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3) {
  42                 if (dsp_use++ == 0) {
  43                         api_clk = clk_get(NULL, "api_ck");
  44                         dsp_clk = clk_get(NULL, "dsp_ck");
  45                         if (!IS_ERR(api_clk) && !IS_ERR(dsp_clk)) {
  46                                 clk_enable(api_clk);
  47                                 clk_enable(dsp_clk);
  48
  49                                 /*
  50                                  * DSP external peripheral reset
  51                                  * FIXME: This should be moved to dsp code
  52                                  */
  53                                 __raw_writew(__raw_readw(DSP_RSTCT2) | DPS_RSTCT2_PER_EN |
  54                                                 DSP_RSTCT2_WD_PER_EN, DSP_RSTCT2);
  55                         }
  56                 }
  57         }
  58 }
  59
  60 static void omap1_mcbsp_free(unsigned int id)
  61 {
  62         if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3) {
  63                 if (--dsp_use == 0) {
  64                         if (!IS_ERR(api_clk)) {
  65                                 clk_disable(api_clk);
  66                                 clk_put(api_clk);
  67                         }
  68                         if (!IS_ERR(dsp_clk)) {
  69                                 clk_disable(dsp_clk);
  70                                 clk_put(dsp_clk);
  71                         }
  72                 }
  73         }
  74 }
  75
  76 static struct omap_mcbsp_ops omap1_mcbsp_ops = {
  77         .request        = omap1_mcbsp_request,
  78         .free           = omap1_mcbsp_free,
  79 };
  80
  81 #if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
  82 struct resource omap7xx_mcbsp_res[][6] = {
  83         {
  84                 {
  85                         .start = OMAP7XX_MCBSP1_BASE,
  86                         .end   = OMAP7XX_MCBSP1_BASE + SZ_256,
  87                         .flags = IORESOURCE_MEM,
  88                 },
  89                 {
  90                         .name  = "rx",
  91                         .start = INT_7XX_McBSP1RX,
  92                         .flags = IORESOURCE_IRQ,
  93                 },
  94                 {
  95                         .name  = "tx",
  96                         .start = INT_7XX_McBSP1TX,
  97                         .flags = IORESOURCE_IRQ,
  98                 },
  99                 {
 100                         .name  = "rx",
 101                         .start = OMAP_DMA_MCBSP1_RX,
 102                         .flags = IORESOURCE_DMA,
 103                 },
 104                 {
 105                         .name  = "tx",
 106                         .start = OMAP_DMA_MCBSP1_TX,
 107                         .flags = IORESOURCE_DMA,
 108                 },
 109         },
 110         {
 111                 {
 112                         .start = OMAP7XX_MCBSP2_BASE,
 113                         .end   = OMAP7XX_MCBSP2_BASE + SZ_256,
 114                         .flags = IORESOURCE_MEM,
 115                 },
 116                 {
 117                         .name  = "rx",
 118                         .start = INT_7XX_McBSP2RX,
 119                         .flags = IORESOURCE_IRQ,
 120                 },
 121                 {
 122                         .name  = "tx",
 123                         .start = INT_7XX_McBSP2TX,
 124                         .flags = IORESOURCE_IRQ,
 125                 },
 126                 {
 127                         .name  = "rx",
 128                         .start = OMAP_DMA_MCBSP3_RX,
 129                         .flags = IORESOURCE_DMA,
 130                 },
 131                 {
 132                         .name  = "tx",
 133                         .start = OMAP_DMA_MCBSP3_TX,
 134                         .flags = IORESOURCE_DMA,
 135                 },
 136         },
 137 };
 138
 139 static struct omap_mcbsp_platform_data omap7xx_mcbsp_pdata[] = {
 140         {
 141                 .ops            = &omap1_mcbsp_ops,
 142         },
 143         {
 144                 .ops            = &omap1_mcbsp_ops,
 145         },
 146 };
 147 #define OMAP7XX_MCBSP_RES_SZ            ARRAY_SIZE(omap7xx_mcbsp_res[1])
 148 #define OMAP7XX_MCBSP_COUNT             ARRAY_SIZE(omap7xx_mcbsp_res)
 149 #else
 150 #define omap7xx_mcbsp_res               NULL
 151 #define omap7xx_mcbsp_pdata             NULL
 152 #define OMAP7XX_MCBSP_RES_SZ            0
 153 #define OMAP7XX_MCBSP_COUNT             0
 154 #endif
 155
 156 #ifdef CONFIG_ARCH_OMAP15XX
 157 struct resource omap15xx_mcbsp_res[][6] = {
 158         {
 159                 {
 160                         .start = OMAP1510_MCBSP1_BASE,
 161                         .end   = OMAP1510_MCBSP1_BASE + SZ_256,
 162                         .flags = IORESOURCE_MEM,
 163                 },
 164                 {
 165                         .name  = "rx",
 166                         .start = INT_McBSP1RX,
 167                         .flags = IORESOURCE_IRQ,
 168                 },
 169                 {
 170                         .name  = "tx",
 171                         .start = INT_McBSP1TX,
 172                         .flags = IORESOURCE_IRQ,
 173                 },
 174                 {
 175                         .name  = "rx",
 176                         .start = OMAP_DMA_MCBSP1_RX,
 177                         .flags = IORESOURCE_DMA,
 178                 },
 179                 {
 180                         .name  = "tx",
 181                         .start = OMAP_DMA_MCBSP1_TX,
 182                         .flags = IORESOURCE_DMA,
 183                 },
 184         },
 185         {
 186                 {
 187                         .start = OMAP1510_MCBSP2_BASE,
 188                         .end   = OMAP1510_MCBSP2_BASE + SZ_256,
 189                         .flags = IORESOURCE_MEM,
 190                 },
 191                 {
 192                         .name  = "rx",
 193                         .start = INT_1510_SPI_RX,
 194                         .flags = IORESOURCE_IRQ,
 195                 },
 196                 {
 197                         .name  = "tx",
 198                         .start = INT_1510_SPI_TX,
 199                         .flags = IORESOURCE_IRQ,
 200                 },
 201                 {
 202                         .name  = "rx",
 203                         .start = OMAP_DMA_MCBSP2_RX,
 204                         .flags = IORESOURCE_DMA,
 205                 },
 206                 {
 207                         .name  = "tx",
 208                         .start = OMAP_DMA_MCBSP2_TX,
 209                         .flags = IORESOURCE_DMA,
 210                 },
 211         },
 212         {
 213                 {
 214                         .start = OMAP1510_MCBSP3_BASE,
 215                         .end   = OMAP1510_MCBSP3_BASE + SZ_256,
 216                         .flags = IORESOURCE_MEM,
 217                 },
 218                 {
 219                         .name  = "rx",
 220                         .start = INT_McBSP3RX,
 221                         .flags = IORESOURCE_IRQ,
 222                 },
 223                 {
 224                         .name  = "tx",
 225                         .start = INT_McBSP3TX,
 226                         .flags = IORESOURCE_IRQ,
 227                 },
 228                 {
 229                         .name  = "rx",
 230                         .start = OMAP_DMA_MCBSP3_RX,
 231                         .flags = IORESOURCE_DMA,
 232                 },
 233                 {
 234                         .name  = "tx",
 235                         .start = OMAP_DMA_MCBSP3_TX,
 236                         .flags = IORESOURCE_DMA,
 237                 },
 238         },
 239 };
 240
 241 static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = {
 242         {
 243                 .ops            = &omap1_mcbsp_ops,
 244         },
 245         {
 246                 .ops            = &omap1_mcbsp_ops,
 247         },
 248         {
 249                 .ops            = &omap1_mcbsp_ops,
 250         },
 251 };
 252 #define OMAP15XX_MCBSP_RES_SZ           ARRAY_SIZE(omap15xx_mcbsp_res[1])
 253 #define OMAP15XX_MCBSP_COUNT            ARRAY_SIZE(omap15xx_mcbsp_res)
 254 #else
 255 #define omap15xx_mcbsp_res              NULL
 256 #define omap15xx_mcbsp_pdata            NULL
 257 #define OMAP15XX_MCBSP_RES_SZ           0
 258 #define OMAP15XX_MCBSP_COUNT            0
 259 #endif
 260
 261 #ifdef CONFIG_ARCH_OMAP16XX
 262 struct resource omap16xx_mcbsp_res[][6] = {
 263         {
 264                 {
 265                         .start = OMAP1610_MCBSP1_BASE,
 266                         .end   = OMAP1610_MCBSP1_BASE + SZ_256,
 267                         .flags = IORESOURCE_MEM,
 268                 },
 269                 {
 270                         .name  = "rx",
 271                         .start = INT_McBSP1RX,
 272                         .flags = IORESOURCE_IRQ,
 273                 },
 274                 {
 275                         .name  = "tx",
 276                         .start = INT_McBSP1TX,
 277                         .flags = IORESOURCE_IRQ,
 278                 },
 279                 {
 280                         .name  = "rx",
 281                         .start = OMAP_DMA_MCBSP1_RX,
 282                         .flags = IORESOURCE_DMA,
 283                 },
 284                 {
 285                         .name  = "tx",
 286                         .start = OMAP_DMA_MCBSP1_TX,
 287                         .flags = IORESOURCE_DMA,
 288                 },
 289         },
 290         {
 291                 {
 292                         .start = OMAP1610_MCBSP2_BASE,
 293                         .end   = OMAP1610_MCBSP2_BASE + SZ_256,
 294                         .flags = IORESOURCE_MEM,
 295                 },
 296                 {
 297                         .name  = "rx",
 298                         .start = INT_1610_McBSP2_RX,
 299                         .flags = IORESOURCE_IRQ,
 300                 },
 301                 {
 302                         .name  = "tx",
 303                         .start = INT_1610_McBSP2_TX,
 304                         .flags = IORESOURCE_IRQ,
 305                 },
 306                 {
 307                         .name  = "rx",
 308                         .start = OMAP_DMA_MCBSP2_RX,
 309                         .flags = IORESOURCE_DMA,
 310                 },
 311                 {
 312                         .name  = "tx",
 313                         .start = OMAP_DMA_MCBSP2_TX,
 314                         .flags = IORESOURCE_DMA,
 315                 },
 316         },
 317         {
 318                 {
 319                         .start = OMAP1610_MCBSP3_BASE,
 320                         .end   = OMAP1610_MCBSP3_BASE + SZ_256,
 321                         .flags = IORESOURCE_MEM,
 322                 },
 323                 {
 324                         .name  = "rx",
 325                         .start = INT_McBSP3RX,
 326                         .flags = IORESOURCE_IRQ,
 327                 },
 328                 {
 329                         .name  = "tx",
 330                         .start = INT_McBSP3TX,
 331                         .flags = IORESOURCE_IRQ,
 332                 },
 333                 {
 334                         .name  = "rx",
 335                         .start = OMAP_DMA_MCBSP3_RX,
 336                         .flags = IORESOURCE_DMA,
 337                 },
 338                 {
 339                         .name  = "tx",
 340                         .start = OMAP_DMA_MCBSP3_TX,
 341                         .flags = IORESOURCE_DMA,
 342                 },
 343         },
 344 };
 345
 346 static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = {
 347         {
 348                 .ops            = &omap1_mcbsp_ops,
 349         },
 350         {
 351                 .ops            = &omap1_mcbsp_ops,
 352         },
 353         {
 354                 .ops            = &omap1_mcbsp_ops,
 355         },
 356 };
 357 #define OMAP16XX_MCBSP_RES_SZ           ARRAY_SIZE(omap16xx_mcbsp_res[1])
 358 #define OMAP16XX_MCBSP_COUNT            ARRAY_SIZE(omap16xx_mcbsp_res)
 359 #else
 360 #define omap16xx_mcbsp_res              NULL
 361 #define omap16xx_mcbsp_pdata            NULL
 362 #define OMAP16XX_MCBSP_RES_SZ           0
 363 #define OMAP16XX_MCBSP_COUNT            0
 364 #endif
 365
 366 static int __init omap1_mcbsp_init(void)
 367 {
 368         if (!cpu_class_is_omap1())
 369                 return -ENODEV;
 370
 371         if (cpu_is_omap7xx())
 372                 omap_mcbsp_count = OMAP7XX_MCBSP_COUNT;
 373         else if (cpu_is_omap15xx())
 374                 omap_mcbsp_count = OMAP15XX_MCBSP_COUNT;
 375         else if (cpu_is_omap16xx())
 376                 omap_mcbsp_count = OMAP16XX_MCBSP_COUNT;
 377
 378         mcbsp_ptr = kzalloc(omap_mcbsp_count * sizeof(struct omap_mcbsp *),
 379                                                                 GFP_KERNEL);
 380         if (!mcbsp_ptr)
 381                 return -ENOMEM;
 382
 383         if (cpu_is_omap7xx())
 384                 omap_mcbsp_register_board_cfg(omap7xx_mcbsp_res[0],
 385                                         OMAP7XX_MCBSP_RES_SZ,
 386                                         omap7xx_mcbsp_pdata,
 387                                         OMAP7XX_MCBSP_COUNT);
 388
 389         if (cpu_is_omap15xx())
 390                 omap_mcbsp_register_board_cfg(omap15xx_mcbsp_res[0],
 391                                         OMAP15XX_MCBSP_RES_SZ,
 392                                         omap15xx_mcbsp_pdata,
 393                                         OMAP15XX_MCBSP_COUNT);
 394
 395         if (cpu_is_omap16xx())
 396                 omap_mcbsp_register_board_cfg(omap16xx_mcbsp_res[0],
 397                                         OMAP16XX_MCBSP_RES_SZ,
 398                                         omap16xx_mcbsp_pdata,
 399                                         OMAP16XX_MCBSP_COUNT);
 400
 401         return omap_mcbsp_init();
 402 }
 403
 404 arch_initcall(omap1_mcbsp_init);