Merge branch 'agp-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied...
[pandora-kernel.git] / arch / arm / mach-omap1 / board-perseus2.c
1 /*
2  * linux/arch/arm/mach-omap1/board-perseus2.c
3  *
4  * Modified from board-generic.c
5  *
6  * Original OMAP730 support by Jean Pihet <j-pihet@ti.com>
7  * Updated for 2.6 by Kevin Hilman <kjh@hilman.org>
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License version 2 as
11  * published by the Free Software Foundation.
12  */
13
14 #include <linux/kernel.h>
15 #include <linux/init.h>
16 #include <linux/platform_device.h>
17 #include <linux/delay.h>
18 #include <linux/mtd/mtd.h>
19 #include <linux/mtd/nand.h>
20 #include <linux/mtd/partitions.h>
21 #include <linux/input.h>
22 #include <linux/smc91x.h>
23
24 #include <mach/hardware.h>
25 #include <asm/mach-types.h>
26 #include <asm/mach/arch.h>
27 #include <asm/mach/flash.h>
28 #include <asm/mach/map.h>
29
30 #include <plat/tc.h>
31 #include <mach/gpio.h>
32 #include <plat/mux.h>
33 #include <plat/fpga.h>
34 #include <plat/keypad.h>
35 #include <plat/common.h>
36 #include <plat/board.h>
37
38 static int p2_keymap[] = {
39         KEY(0,0,KEY_UP),
40         KEY(0,1,KEY_RIGHT),
41         KEY(0,2,KEY_LEFT),
42         KEY(0,3,KEY_DOWN),
43         KEY(0,4,KEY_ENTER),
44         KEY(1,0,KEY_F10),
45         KEY(1,1,KEY_SEND),
46         KEY(1,2,KEY_END),
47         KEY(1,3,KEY_VOLUMEDOWN),
48         KEY(1,4,KEY_VOLUMEUP),
49         KEY(1,5,KEY_RECORD),
50         KEY(2,0,KEY_F9),
51         KEY(2,1,KEY_3),
52         KEY(2,2,KEY_6),
53         KEY(2,3,KEY_9),
54         KEY(2,4,KEY_KPDOT),
55         KEY(3,0,KEY_BACK),
56         KEY(3,1,KEY_2),
57         KEY(3,2,KEY_5),
58         KEY(3,3,KEY_8),
59         KEY(3,4,KEY_0),
60         KEY(3,5,KEY_KPSLASH),
61         KEY(4,0,KEY_HOME),
62         KEY(4,1,KEY_1),
63         KEY(4,2,KEY_4),
64         KEY(4,3,KEY_7),
65         KEY(4,4,KEY_KPASTERISK),
66         KEY(4,5,KEY_POWER),
67         0
68 };
69
70 static struct smc91x_platdata smc91x_info = {
71         .flags  = SMC91X_USE_16BIT | SMC91X_NOWAIT,
72         .leda   = RPC_LED_100_10,
73         .ledb   = RPC_LED_TX_RX,
74 };
75
76 static struct resource smc91x_resources[] = {
77         [0] = {
78                 .start  = H2P2_DBG_FPGA_ETHR_START,     /* Physical */
79                 .end    = H2P2_DBG_FPGA_ETHR_START + 0xf,
80                 .flags  = IORESOURCE_MEM,
81         },
82         [1] = {
83                 .start  = INT_7XX_MPU_EXT_NIRQ,
84                 .end    = 0,
85                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
86         },
87 };
88
89 static struct mtd_partition nor_partitions[] = {
90         /* bootloader (U-Boot, etc) in first sector */
91         {
92               .name             = "bootloader",
93               .offset           = 0,
94               .size             = SZ_128K,
95               .mask_flags       = MTD_WRITEABLE, /* force read-only */
96         },
97         /* bootloader params in the next sector */
98         {
99               .name             = "params",
100               .offset           = MTDPART_OFS_APPEND,
101               .size             = SZ_128K,
102               .mask_flags       = 0,
103         },
104         /* kernel */
105         {
106               .name             = "kernel",
107               .offset           = MTDPART_OFS_APPEND,
108               .size             = SZ_2M,
109               .mask_flags       = 0
110         },
111         /* rest of flash is a file system */
112         {
113               .name             = "rootfs",
114               .offset           = MTDPART_OFS_APPEND,
115               .size             = MTDPART_SIZ_FULL,
116               .mask_flags       = 0
117         },
118 };
119
120 static struct flash_platform_data nor_data = {
121         .map_name       = "cfi_probe",
122         .width          = 2,
123         .parts          = nor_partitions,
124         .nr_parts       = ARRAY_SIZE(nor_partitions),
125 };
126
127 static struct resource nor_resource = {
128         .start          = OMAP_CS0_PHYS,
129         .end            = OMAP_CS0_PHYS + SZ_32M - 1,
130         .flags          = IORESOURCE_MEM,
131 };
132
133 static struct platform_device nor_device = {
134         .name           = "omapflash",
135         .id             = 0,
136         .dev            = {
137                 .platform_data  = &nor_data,
138         },
139         .num_resources  = 1,
140         .resource       = &nor_resource,
141 };
142
143 static void nand_cmd_ctl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
144 {
145         struct nand_chip *this = mtd->priv;
146         unsigned long mask;
147
148         if (cmd == NAND_CMD_NONE)
149                 return;
150
151         mask = (ctrl & NAND_CLE) ? 0x02 : 0;
152         if (ctrl & NAND_ALE)
153                 mask |= 0x04;
154         writeb(cmd, (unsigned long)this->IO_ADDR_W | mask);
155 }
156
157 #define P2_NAND_RB_GPIO_PIN     62
158
159 static int nand_dev_ready(struct mtd_info *mtd)
160 {
161         return gpio_get_value(P2_NAND_RB_GPIO_PIN);
162 }
163
164 static const char *part_probes[] = { "cmdlinepart", NULL };
165
166 static struct platform_nand_data nand_data = {
167         .chip   = {
168                 .nr_chips               = 1,
169                 .chip_offset            = 0,
170                 .options                = NAND_SAMSUNG_LP_OPTIONS,
171                 .part_probe_types       = part_probes,
172         },
173         .ctrl   = {
174                 .cmd_ctrl       = nand_cmd_ctl,
175                 .dev_ready      = nand_dev_ready,
176         },
177 };
178
179 static struct resource nand_resource = {
180         .start          = OMAP_CS3_PHYS,
181         .end            = OMAP_CS3_PHYS + SZ_4K - 1,
182         .flags          = IORESOURCE_MEM,
183 };
184
185 static struct platform_device nand_device = {
186         .name           = "gen_nand",
187         .id             = 0,
188         .dev            = {
189                 .platform_data  = &nand_data,
190         },
191         .num_resources  = 1,
192         .resource       = &nand_resource,
193 };
194
195 static struct platform_device smc91x_device = {
196         .name           = "smc91x",
197         .id             = 0,
198         .dev    = {
199                 .platform_data  = &smc91x_info,
200         },
201         .num_resources  = ARRAY_SIZE(smc91x_resources),
202         .resource       = smc91x_resources,
203 };
204
205 static struct resource kp_resources[] = {
206         [0] = {
207                 .start  = INT_7XX_MPUIO_KEYPAD,
208                 .end    = INT_7XX_MPUIO_KEYPAD,
209                 .flags  = IORESOURCE_IRQ,
210         },
211 };
212
213 static struct omap_kp_platform_data kp_data = {
214         .rows           = 8,
215         .cols           = 8,
216         .keymap         = p2_keymap,
217         .keymapsize     = ARRAY_SIZE(p2_keymap),
218         .delay          = 4,
219         .dbounce        = 1,
220 };
221
222 static struct platform_device kp_device = {
223         .name           = "omap-keypad",
224         .id             = -1,
225         .dev            = {
226                 .platform_data = &kp_data,
227         },
228         .num_resources  = ARRAY_SIZE(kp_resources),
229         .resource       = kp_resources,
230 };
231
232 static struct platform_device lcd_device = {
233         .name           = "lcd_p2",
234         .id             = -1,
235 };
236
237 static struct platform_device *devices[] __initdata = {
238         &nor_device,
239         &nand_device,
240         &smc91x_device,
241         &kp_device,
242         &lcd_device,
243 };
244
245 static struct omap_lcd_config perseus2_lcd_config __initdata = {
246         .ctrl_name      = "internal",
247 };
248
249 static struct omap_board_config_kernel perseus2_config[] __initdata = {
250         { OMAP_TAG_LCD,         &perseus2_lcd_config },
251 };
252
253 static void __init omap_perseus2_init(void)
254 {
255         if (gpio_request(P2_NAND_RB_GPIO_PIN, "NAND ready") < 0)
256                 BUG();
257         gpio_direction_input(P2_NAND_RB_GPIO_PIN);
258
259         omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
260         omap_cfg_reg(M8_1610_FLASH_CS2B_WE);
261
262         platform_add_devices(devices, ARRAY_SIZE(devices));
263
264         omap_board_config = perseus2_config;
265         omap_board_config_size = ARRAY_SIZE(perseus2_config);
266         omap_serial_init();
267         omap_register_i2c_bus(1, 100, NULL, 0);
268 }
269
270 static void __init perseus2_init_smc91x(void)
271 {
272         fpga_write(1, H2P2_DBG_FPGA_LAN_RESET);
273         mdelay(50);
274         fpga_write(fpga_read(H2P2_DBG_FPGA_LAN_RESET) & ~1,
275                    H2P2_DBG_FPGA_LAN_RESET);
276         mdelay(50);
277 }
278
279 static void __init omap_perseus2_init_irq(void)
280 {
281         omap1_init_common_hw();
282         omap_init_irq();
283         omap_gpio_init();
284         perseus2_init_smc91x();
285 }
286 /* Only FPGA needs to be mapped here. All others are done with ioremap */
287 static struct map_desc omap_perseus2_io_desc[] __initdata = {
288         {
289                 .virtual        = H2P2_DBG_FPGA_BASE,
290                 .pfn            = __phys_to_pfn(H2P2_DBG_FPGA_START),
291                 .length         = H2P2_DBG_FPGA_SIZE,
292                 .type           = MT_DEVICE
293         }
294 };
295
296 static void __init omap_perseus2_map_io(void)
297 {
298         omap1_map_common_io();
299         iotable_init(omap_perseus2_io_desc,
300                      ARRAY_SIZE(omap_perseus2_io_desc));
301
302         /* Early, board-dependent init */
303
304         /*
305          * Hold GSM Reset until needed
306          */
307         omap_writew(omap_readw(OMAP7XX_DSP_M_CTL) & ~1, OMAP7XX_DSP_M_CTL);
308
309         /*
310          * UARTs -> done automagically by 8250 driver
311          */
312
313         /*
314          * CSx timings, GPIO Mux ... setup
315          */
316
317         /* Flash: CS0 timings setup */
318         omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_0);
319         omap_writel(0x00000088, OMAP7XX_FLASH_ACFG_0);
320
321         /*
322          * Ethernet support through the debug board
323          * CS1 timings setup
324          */
325         omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_1);
326         omap_writel(0x00000000, OMAP7XX_FLASH_ACFG_1);
327
328         /*
329          * Configure MPU_EXT_NIRQ IO in IO_CONF9 register,
330          * It is used as the Ethernet controller interrupt
331          */
332         omap_writel(omap_readl(OMAP7XX_IO_CONF_9) & 0x1FFFFFFF, OMAP7XX_IO_CONF_9);
333 }
334
335 MACHINE_START(OMAP_PERSEUS2, "OMAP730 Perseus2")
336         /* Maintainer: Kevin Hilman <kjh@hilman.org> */
337         .phys_io        = 0xfff00000,
338         .io_pg_offst    = ((0xfef00000) >> 18) & 0xfffc,
339         .boot_params    = 0x10000100,
340         .map_io         = omap_perseus2_map_io,
341         .init_irq       = omap_perseus2_init_irq,
342         .init_machine   = omap_perseus2_init,
343         .timer          = &omap_timer,
344 MACHINE_END