arch/arm/mach-omap1/board-h3.c

   1 /*
   2  * linux/arch/arm/mach-omap1/board-h3.c
   3  *
   4  * This file contains OMAP1710 H3 specific code.
   5  *
   6  * Copyright (C) 2004 Texas Instruments, Inc.
   7  * Copyright (C) 2002 MontaVista Software, Inc.
   8  * Copyright (C) 2001 RidgeRun, Inc.
   9  * Author: RidgeRun, Inc.
  10  *         Greg Lonnon (glonnon@ridgerun.com) or info@ridgerun.com
  11  *
  12  * This program is free software; you can redistribute it and/or modify
  13  * it under the terms of the GNU General Public License version 2 as
  14  * published by the Free Software Foundation.
  15  */
  16
  17 #include <linux/types.h>
  18 #include <linux/init.h>
  19 #include <linux/major.h>
  20 #include <linux/kernel.h>
  21 #include <linux/platform_device.h>
  22 #include <linux/errno.h>
  23 #include <linux/workqueue.h>
  24 #include <linux/i2c.h>
  25 #include <linux/mtd/mtd.h>
  26 #include <linux/mtd/nand.h>
  27 #include <linux/mtd/partitions.h>
  28 #include <linux/input.h>
  29
  30 #include <asm/setup.h>
  31 #include <asm/page.h>
  32 #include <asm/hardware.h>
  33 #include <asm/gpio.h>
  34
  35 #include <asm/mach-types.h>
  36 #include <asm/mach/arch.h>
  37 #include <asm/mach/flash.h>
  38 #include <asm/mach/map.h>
  39
  40 #include <asm/arch/tps65010.h>
  41 #include <asm/arch/gpioexpander.h>
  42 #include <asm/arch/irqs.h>
  43 #include <asm/arch/mux.h>
  44 #include <asm/arch/tc.h>
  45 #include <asm/arch/irda.h>
  46 #include <asm/arch/usb.h>
  47 #include <asm/arch/keypad.h>
  48 #include <asm/arch/dma.h>
  49 #include <asm/arch/common.h>
  50 #include <asm/arch/mcbsp.h>
  51 #include <asm/arch/omap-alsa.h>
  52
  53 extern int omap_gpio_init(void);
  54
  55 static int h3_keymap[] = {
  56         KEY(0, 0, KEY_LEFT),
  57         KEY(0, 1, KEY_RIGHT),
  58         KEY(0, 2, KEY_3),
  59         KEY(0, 3, KEY_F10),
  60         KEY(0, 4, KEY_F5),
  61         KEY(0, 5, KEY_9),
  62         KEY(1, 0, KEY_DOWN),
  63         KEY(1, 1, KEY_UP),
  64         KEY(1, 2, KEY_2),
  65         KEY(1, 3, KEY_F9),
  66         KEY(1, 4, KEY_F7),
  67         KEY(1, 5, KEY_0),
  68         KEY(2, 0, KEY_ENTER),
  69         KEY(2, 1, KEY_6),
  70         KEY(2, 2, KEY_1),
  71         KEY(2, 3, KEY_F2),
  72         KEY(2, 4, KEY_F6),
  73         KEY(2, 5, KEY_HOME),
  74         KEY(3, 0, KEY_8),
  75         KEY(3, 1, KEY_5),
  76         KEY(3, 2, KEY_F12),
  77         KEY(3, 3, KEY_F3),
  78         KEY(3, 4, KEY_F8),
  79         KEY(3, 5, KEY_END),
  80         KEY(4, 0, KEY_7),
  81         KEY(4, 1, KEY_4),
  82         KEY(4, 2, KEY_F11),
  83         KEY(4, 3, KEY_F1),
  84         KEY(4, 4, KEY_F4),
  85         KEY(4, 5, KEY_ESC),
  86         KEY(5, 0, KEY_F13),
  87         KEY(5, 1, KEY_F14),
  88         KEY(5, 2, KEY_F15),
  89         KEY(5, 3, KEY_F16),
  90         KEY(5, 4, KEY_SLEEP),
  91         0
  92 };
  93
  94
  95 static struct mtd_partition nor_partitions[] = {
  96         /* bootloader (U-Boot, etc) in first sector */
  97         {
  98               .name             = "bootloader",
  99               .offset           = 0,
 100               .size             = SZ_128K,
 101               .mask_flags       = MTD_WRITEABLE, /* force read-only */
 102         },
 103         /* bootloader params in the next sector */
 104         {
 105               .name             = "params",
 106               .offset           = MTDPART_OFS_APPEND,
 107               .size             = SZ_128K,
 108               .mask_flags       = 0,
 109         },
 110         /* kernel */
 111         {
 112               .name             = "kernel",
 113               .offset           = MTDPART_OFS_APPEND,
 114               .size             = SZ_2M,
 115               .mask_flags       = 0
 116         },
 117         /* file system */
 118         {
 119               .name             = "filesystem",
 120               .offset           = MTDPART_OFS_APPEND,
 121               .size             = MTDPART_SIZ_FULL,
 122               .mask_flags       = 0
 123         }
 124 };
 125
 126 static struct flash_platform_data nor_data = {
 127         .map_name       = "cfi_probe",
 128         .width          = 2,
 129         .parts          = nor_partitions,
 130         .nr_parts       = ARRAY_SIZE(nor_partitions),
 131 };
 132
 133 static struct resource nor_resource = {
 134         /* This is on CS3, wherever it's mapped */
 135         .flags          = IORESOURCE_MEM,
 136 };
 137
 138 static struct platform_device nor_device = {
 139         .name           = "omapflash",
 140         .id             = 0,
 141         .dev            = {
 142                 .platform_data  = &nor_data,
 143         },
 144         .num_resources  = 1,
 145         .resource       = &nor_resource,
 146 };
 147
 148 static struct mtd_partition nand_partitions[] = {
 149 #if 0
 150         /* REVISIT: enable these partitions if you make NAND BOOT work */
 151         {
 152                 .name           = "xloader",
 153                 .offset         = 0,
 154                 .size           = 64 * 1024,
 155                 .mask_flags     = MTD_WRITEABLE,        /* force read-only */
 156         },
 157         {
 158                 .name           = "bootloader",
 159                 .offset         = MTDPART_OFS_APPEND,
 160                 .size           = 256 * 1024,
 161                 .mask_flags     = MTD_WRITEABLE,        /* force read-only */
 162         },
 163         {
 164                 .name           = "params",
 165                 .offset         = MTDPART_OFS_APPEND,
 166                 .size           = 192 * 1024,
 167         },
 168         {
 169                 .name           = "kernel",
 170                 .offset         = MTDPART_OFS_APPEND,
 171                 .size           = 2 * SZ_1M,
 172         },
 173 #endif
 174         {
 175                 .name           = "filesystem",
 176                 .size           = MTDPART_SIZ_FULL,
 177                 .offset         = MTDPART_OFS_APPEND,
 178         },
 179 };
 180
 181 /* dip switches control NAND chip access:  8 bit, 16 bit, or neither */
 182 static struct nand_platform_data nand_data = {
 183         .options        = NAND_SAMSUNG_LP_OPTIONS,
 184         .parts          = nand_partitions,
 185         .nr_parts       = ARRAY_SIZE(nand_partitions),
 186 };
 187
 188 static struct resource nand_resource = {
 189         .flags          = IORESOURCE_MEM,
 190 };
 191
 192 static struct platform_device nand_device = {
 193         .name           = "omapnand",
 194         .id             = 0,
 195         .dev            = {
 196                 .platform_data  = &nand_data,
 197         },
 198         .num_resources  = 1,
 199         .resource       = &nand_resource,
 200 };
 201
 202 static struct resource smc91x_resources[] = {
 203         [0] = {
 204                 .start  = OMAP1710_ETHR_START,          /* Physical */
 205                 .end    = OMAP1710_ETHR_START + 0xf,
 206                 .flags  = IORESOURCE_MEM,
 207         },
 208         [1] = {
 209                 .start  = OMAP_GPIO_IRQ(40),
 210                 .end    = OMAP_GPIO_IRQ(40),
 211                 .flags  = IORESOURCE_IRQ,
 212         },
 213 };
 214
 215 static struct platform_device smc91x_device = {
 216         .name           = "smc91x",
 217         .id             = 0,
 218         .num_resources  = ARRAY_SIZE(smc91x_resources),
 219         .resource       = smc91x_resources,
 220 };
 221
 222 #define GPTIMER_BASE            0xFFFB1400
 223 #define GPTIMER_REGS(x) (0xFFFB1400 + (x * 0x800))
 224 #define GPTIMER_REGS_SIZE       0x46
 225
 226 static struct resource intlat_resources[] = {
 227         [0] = {
 228                 .start  = GPTIMER_REGS(0),            /* Physical */
 229                 .end    = GPTIMER_REGS(0) + GPTIMER_REGS_SIZE,
 230                 .flags  = IORESOURCE_MEM,
 231         },
 232         [1] = {
 233                 .start  = INT_1610_GPTIMER1,
 234                 .end    = INT_1610_GPTIMER1,
 235                 .flags  = IORESOURCE_IRQ,
 236         },
 237 };
 238
 239 static struct platform_device intlat_device = {
 240         .name      = "omap_intlat",
 241         .id          = 0,
 242         .num_resources  = ARRAY_SIZE(intlat_resources),
 243         .resource       = intlat_resources,
 244 };
 245
 246 static struct resource h3_kp_resources[] = {
 247         [0] = {
 248                 .start  = INT_KEYBOARD,
 249                 .end    = INT_KEYBOARD,
 250                 .flags  = IORESOURCE_IRQ,
 251         },
 252 };
 253
 254 static struct omap_kp_platform_data h3_kp_data = {
 255         .rows           = 8,
 256         .cols           = 8,
 257         .keymap         = h3_keymap,
 258         .keymapsize     = ARRAY_SIZE(h3_keymap),
 259         .rep            = 1,
 260         .delay          = 9,
 261         .dbounce        = 1,
 262 };
 263
 264 static struct platform_device h3_kp_device = {
 265         .name           = "omap-keypad",
 266         .id             = -1,
 267         .dev            = {
 268                 .platform_data = &h3_kp_data,
 269         },
 270         .num_resources  = ARRAY_SIZE(h3_kp_resources),
 271         .resource       = h3_kp_resources,
 272 };
 273
 274
 275 /* Select between the IrDA and aGPS module
 276  */
 277 static int h3_select_irda(struct device *dev, int state)
 278 {
 279         unsigned char expa;
 280         int err = 0;
 281
 282         if ((err = read_gpio_expa(&expa, 0x26))) {
 283                 printk(KERN_ERR "Error reading from I/O EXPANDER \n");
 284                 return err;
 285         }
 286
 287         /* 'P6' enable/disable IRDA_TX and IRDA_RX */
 288         if (state & IR_SEL) { /* IrDA */
 289                 if ((err = write_gpio_expa(expa | 0x40, 0x26))) {
 290                         printk(KERN_ERR "Error writing to I/O EXPANDER \n");
 291                         return err;
 292                 }
 293         } else {
 294                 if ((err = write_gpio_expa(expa & ~0x40, 0x26))) {
 295                         printk(KERN_ERR "Error writing to I/O EXPANDER \n");
 296                         return err;
 297                 }
 298         }
 299         return err;
 300 }
 301
 302 static void set_trans_mode(struct work_struct *work)
 303 {
 304         struct omap_irda_config *irda_config =
 305                 container_of(work, struct omap_irda_config, gpio_expa.work);
 306         int mode = irda_config->mode;
 307         unsigned char expa;
 308         int err = 0;
 309
 310         if ((err = read_gpio_expa(&expa, 0x27)) != 0) {
 311                 printk(KERN_ERR "Error reading from I/O expander\n");
 312         }
 313
 314         expa &= ~0x03;
 315
 316         if (mode & IR_SIRMODE) {
 317                 expa |= 0x01;
 318         } else { /* MIR/FIR */
 319                 expa |= 0x03;
 320         }
 321
 322         if ((err = write_gpio_expa(expa, 0x27)) != 0) {
 323                 printk(KERN_ERR "Error writing to I/O expander\n");
 324         }
 325 }
 326
 327 static int h3_transceiver_mode(struct device *dev, int mode)
 328 {
 329         struct omap_irda_config *irda_config = dev->platform_data;
 330
 331         irda_config->mode = mode;
 332         cancel_delayed_work(&irda_config->gpio_expa);
 333         PREPARE_DELAYED_WORK(&irda_config->gpio_expa, set_trans_mode);
 334         schedule_delayed_work(&irda_config->gpio_expa, 0);
 335
 336         return 0;
 337 }
 338
 339 static struct omap_irda_config h3_irda_data = {
 340         .transceiver_cap        = IR_SIRMODE | IR_MIRMODE | IR_FIRMODE,
 341         .transceiver_mode       = h3_transceiver_mode,
 342         .select_irda            = h3_select_irda,
 343         .rx_channel             = OMAP_DMA_UART3_RX,
 344         .tx_channel             = OMAP_DMA_UART3_TX,
 345         .dest_start             = UART3_THR,
 346         .src_start              = UART3_RHR,
 347         .tx_trigger             = 0,
 348         .rx_trigger             = 0,
 349 };
 350
 351 static struct resource h3_irda_resources[] = {
 352         [0] = {
 353                 .start  = INT_UART3,
 354                 .end    = INT_UART3,
 355                 .flags  = IORESOURCE_IRQ,
 356         },
 357 };
 358
 359 static u64 irda_dmamask = 0xffffffff;
 360
 361 static struct platform_device h3_irda_device = {
 362         .name           = "omapirda",
 363         .id             = 0,
 364         .dev            = {
 365                 .platform_data  = &h3_irda_data,
 366                 .dma_mask       = &irda_dmamask,
 367         },
 368         .num_resources  = ARRAY_SIZE(h3_irda_resources),
 369         .resource       = h3_irda_resources,
 370 };
 371
 372 static struct platform_device h3_lcd_device = {
 373         .name           = "lcd_h3",
 374         .id             = -1,
 375 };
 376
 377 static struct omap_mcbsp_reg_cfg mcbsp_regs = {
 378         .spcr2 = FREE | FRST | GRST | XRST | XINTM(3),
 379         .spcr1 = RINTM(3) | RRST,
 380         .rcr2  = RPHASE | RFRLEN2(OMAP_MCBSP_WORD_8) |
 381                 RWDLEN2(OMAP_MCBSP_WORD_16) | RDATDLY(1),
 382         .rcr1  = RFRLEN1(OMAP_MCBSP_WORD_8) | RWDLEN1(OMAP_MCBSP_WORD_16),
 383         .xcr2  = XPHASE | XFRLEN2(OMAP_MCBSP_WORD_8) |
 384                 XWDLEN2(OMAP_MCBSP_WORD_16) | XDATDLY(1) | XFIG,
 385         .xcr1  = XFRLEN1(OMAP_MCBSP_WORD_8) | XWDLEN1(OMAP_MCBSP_WORD_16),
 386         .srgr1 = FWID(15),
 387         .srgr2 = GSYNC | CLKSP | FSGM | FPER(31),
 388
 389         .pcr0  = CLKRM | SCLKME | FSXP | FSRP | CLKXP | CLKRP,
 390         //.pcr0 = CLKXP | CLKRP,        /* mcbsp: slave */
 391 };
 392
 393 static struct omap_alsa_codec_config alsa_config = {
 394         .name                   = "H3 TSC2101",
 395         .mcbsp_regs_alsa        = &mcbsp_regs,
 396         .codec_configure_dev    = NULL, // tsc2101_configure,
 397         .codec_set_samplerate   = NULL, // tsc2101_set_samplerate,
 398         .codec_clock_setup      = NULL, // tsc2101_clock_setup,
 399         .codec_clock_on         = NULL, // tsc2101_clock_on,
 400         .codec_clock_off        = NULL, // tsc2101_clock_off,
 401         .get_default_samplerate = NULL, // tsc2101_get_default_samplerate,
 402 };
 403
 404 static struct platform_device h3_mcbsp1_device = {
 405         .name   = "omap_alsa_mcbsp",
 406         .id     = 1,
 407         .dev = {
 408                 .platform_data  = &alsa_config,
 409         },
 410 };
 411
 412 static struct platform_device *devices[] __initdata = {
 413         &nor_device,
 414         &nand_device,
 415         &smc91x_device,
 416         &intlat_device,
 417         &h3_irda_device,
 418         &h3_kp_device,
 419         &h3_lcd_device,
 420         &h3_mcbsp1_device,
 421 };
 422
 423 static struct omap_usb_config h3_usb_config __initdata = {
 424         /* usb1 has a Mini-AB port and external isp1301 transceiver */
 425         .otg        = 2,
 426
 427 #ifdef CONFIG_USB_GADGET_OMAP
 428         .hmc_mode       = 19,   /* 0:host(off) 1:dev|otg 2:disabled */
 429 #elif  defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
 430         /* NONSTANDARD CABLE NEEDED (B-to-Mini-B) */
 431         .hmc_mode       = 20,   /* 1:dev|otg(off) 1:host 2:disabled */
 432 #endif
 433
 434         .pins[1]        = 3,
 435 };
 436
 437 static struct omap_mmc_config h3_mmc_config __initdata = {
 438         .mmc[0] = {
 439                 .enabled        = 1,
 440                 .power_pin      = -1,   /* tps65010 GPIO4 */
 441                 .switch_pin     = OMAP_MPUIO(1),
 442         },
 443 };
 444
 445 static struct omap_uart_config h3_uart_config __initdata = {
 446         .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
 447 };
 448
 449 static struct omap_lcd_config h3_lcd_config __initdata = {
 450         .ctrl_name      = "internal",
 451 };
 452
 453 static struct omap_board_config_kernel h3_config[] = {
 454         { OMAP_TAG_USB,         &h3_usb_config },
 455         { OMAP_TAG_MMC,         &h3_mmc_config },
 456         { OMAP_TAG_UART,        &h3_uart_config },
 457         { OMAP_TAG_LCD,         &h3_lcd_config },
 458 };
 459
 460 static struct i2c_board_info __initdata h3_i2c_board_info[] = {
 461         {
 462                 I2C_BOARD_INFO("tps65010", 0x48),
 463                 .type           = "tps65013",
 464                 /* .irq         = OMAP_GPIO_IRQ(??), */
 465         },
 466         /* TODO when driver support is ready:
 467          *  - isp1301 OTG transceiver
 468          *  - optional ov9640 camera sensor at 0x30
 469          *  - ...
 470          */
 471 };
 472
 473 #define H3_NAND_RB_GPIO_PIN     10
 474
 475 static int nand_dev_ready(struct nand_platform_data *data)
 476 {
 477         return omap_get_gpio_datain(H3_NAND_RB_GPIO_PIN);
 478 }
 479
 480 static void __init h3_init(void)
 481 {
 482         /* Here we assume the NOR boot config:  NOR on CS3 (possibly swapped
 483          * to address 0 by a dip switch), NAND on CS2B.  The NAND driver will
 484          * notice whether a NAND chip is enabled at probe time.
 485          *
 486          * H3 support NAND-boot, with a dip switch to put NOR on CS2B and NAND
 487          * (which on H2 may be 16bit) on CS3.  Try detecting that in code here,
 488          * to avoid probing every possible flash configuration...
 489          */
 490         nor_resource.end = nor_resource.start = omap_cs3_phys();
 491         nor_resource.end += SZ_32M - 1;
 492
 493         nand_resource.end = nand_resource.start = OMAP_CS2B_PHYS;
 494         nand_resource.end += SZ_4K - 1;
 495         if (!(omap_request_gpio(H3_NAND_RB_GPIO_PIN)))
 496                 nand_data.dev_ready = nand_dev_ready;
 497
 498         /* GPIO10 Func_MUX_CTRL reg bit 29:27, Configure V2 to mode1 as GPIO */
 499         /* GPIO10 pullup/down register, Enable pullup on GPIO10 */
 500         omap_cfg_reg(V2_1710_GPIO10);
 501
 502         platform_add_devices(devices, ARRAY_SIZE(devices));
 503         omap_board_config = h3_config;
 504         omap_board_config_size = ARRAY_SIZE(h3_config);
 505         omap_serial_init();
 506
 507         /* FIXME setup irq for tps65013 chip */
 508         i2c_register_board_info(1, h3_i2c_board_info,
 509                         ARRAY_SIZE(h3_i2c_board_info));
 510 }
 511
 512 static void __init h3_init_smc91x(void)
 513 {
 514         omap_cfg_reg(W15_1710_GPIO40);
 515         if (omap_request_gpio(40) < 0) {
 516                 printk("Error requesting gpio 40 for smc91x irq\n");
 517                 return;
 518         }
 519 }
 520
 521 static void __init h3_init_irq(void)
 522 {
 523         omap1_init_common_hw();
 524         omap_init_irq();
 525         omap_gpio_init();
 526         h3_init_smc91x();
 527 }
 528
 529 static void __init h3_map_io(void)
 530 {
 531         omap1_map_common_io();
 532 }
 533
 534 #ifdef CONFIG_TPS65010
 535 static int __init h3_tps_init(void)
 536 {
 537         if (!machine_is_omap_h3())
 538                 return 0;
 539
 540         /* gpio4 for SD, gpio3 for VDD_DSP */
 541         /* FIXME send power to DSP iff it's configured */
 542
 543         /* Enable LOW_PWR */
 544         tps65013_set_low_pwr(ON);
 545
 546         return 0;
 547 }
 548 fs_initcall(h3_tps_init);
 549 #endif
 550
 551 MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board")
 552         /* Maintainer: Texas Instruments, Inc. */
 553         .phys_io        = 0xfff00000,
 554         .io_pg_offst    = ((0xfef00000) >> 18) & 0xfffc,
 555         .boot_params    = 0x10000100,
 556         .map_io         = h3_map_io,
 557         .init_irq       = h3_init_irq,
 558         .init_machine   = h3_init,
 559         .timer          = &omap_timer,
 560 MACHINE_END