arch/arm/mach-mx3/mach-mx31lilly.c

   1 /*
   2  *  LILLY-1131 module support
   3  *
   4  *    Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
   5  *
   6  *  based on code for other MX31 boards,
   7  *
   8  *    Copyright 2005-2007 Freescale Semiconductor
   9  *    Copyright (c) 2009 Alberto Panizzo <maramaopercheseimorto@gmail.com>
  10  *    Copyright (C) 2009 Valentin Longchamp, EPFL Mobots group
  11  *
  12  * This program is free software; you can redistribute it and/or modify
  13  * it under the terms of the GNU General Public License as published by
  14  * the Free Software Foundation; either version 2 of the License, or
  15  * (at your option) any later version.
  16  *
  17  * This program is distributed in the hope that it will be useful,
  18  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  20  * GNU General Public License for more details.
  21  *
  22  * You should have received a copy of the GNU General Public License
  23  * along with this program; if not, write to the Free Software
  24  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  25  */
  26
  27 #include <linux/types.h>
  28 #include <linux/init.h>
  29 #include <linux/clk.h>
  30 #include <linux/gpio.h>
  31 #include <linux/platform_device.h>
  32 #include <linux/interrupt.h>
  33 #include <linux/smsc911x.h>
  34 #include <linux/mtd/physmap.h>
  35 #include <linux/spi/spi.h>
  36 #include <linux/mfd/mc13783.h>
  37 #include <linux/usb/otg.h>
  38 #include <linux/usb/ulpi.h>
  39
  40 #include <asm/mach-types.h>
  41 #include <asm/mach/arch.h>
  42 #include <asm/mach/time.h>
  43 #include <asm/mach/map.h>
  44
  45 #include <mach/hardware.h>
  46 #include <mach/common.h>
  47 #include <mach/iomux-mx3.h>
  48 #include <mach/board-mx31lilly.h>
  49 #include <mach/spi.h>
  50 #include <mach/mxc_ehci.h>
  51 #include <mach/ulpi.h>
  52
  53 #include "devices.h"
  54
  55 /*
  56  * This file contains module-specific initialization routines for LILLY-1131.
  57  * Initialization of peripherals found on the baseboard is implemented in the
  58  * appropriate baseboard support code.
  59  */
  60
  61 /* SMSC ethernet support */
  62
  63 static struct resource smsc91x_resources[] = {
  64         {
  65                 .start  = MX31_CS4_BASE_ADDR,
  66                 .end    = MX31_CS4_BASE_ADDR + 0xffff,
  67                 .flags  = IORESOURCE_MEM,
  68         },
  69         {
  70                 .start  = IOMUX_TO_IRQ(MX31_PIN_GPIO1_0),
  71                 .end    = IOMUX_TO_IRQ(MX31_PIN_GPIO1_0),
  72                 .flags  = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING,
  73         }
  74 };
  75
  76 static struct smsc911x_platform_config smsc911x_config = {
  77         .phy_interface  = PHY_INTERFACE_MODE_MII,
  78         .irq_polarity   = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  79         .irq_type       = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
  80         .flags          = SMSC911X_USE_32BIT |
  81                           SMSC911X_SAVE_MAC_ADDRESS |
  82                           SMSC911X_FORCE_INTERNAL_PHY,
  83 };
  84
  85 static struct platform_device smsc91x_device = {
  86         .name           = "smsc911x",
  87         .id             = -1,
  88         .num_resources  = ARRAY_SIZE(smsc91x_resources),
  89         .resource       = smsc91x_resources,
  90         .dev            = {
  91                 .platform_data = &smsc911x_config,
  92         }
  93 };
  94
  95 /* NOR flash */
  96 static struct physmap_flash_data nor_flash_data = {
  97         .width  = 2,
  98 };
  99
 100 static struct resource nor_flash_resource = {
 101         .start  = 0xa0000000,
 102         .end    = 0xa1ffffff,
 103         .flags  = IORESOURCE_MEM,
 104 };
 105
 106 static struct platform_device physmap_flash_device = {
 107         .name   = "physmap-flash",
 108         .id     = 0,
 109         .dev    = {
 110                 .platform_data  = &nor_flash_data,
 111         },
 112         .resource = &nor_flash_resource,
 113         .num_resources = 1,
 114 };
 115
 116 /* USB */
 117
 118 #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
 119                         PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
 120
 121 static int usbotg_init(struct platform_device *pdev)
 122 {
 123         unsigned int pins[] = {
 124                 MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
 125                 MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
 126                 MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
 127                 MX31_PIN_USBOTG_DATA3__USBOTG_DATA3,
 128                 MX31_PIN_USBOTG_DATA4__USBOTG_DATA4,
 129                 MX31_PIN_USBOTG_DATA5__USBOTG_DATA5,
 130                 MX31_PIN_USBOTG_DATA6__USBOTG_DATA6,
 131                 MX31_PIN_USBOTG_DATA7__USBOTG_DATA7,
 132                 MX31_PIN_USBOTG_CLK__USBOTG_CLK,
 133                 MX31_PIN_USBOTG_DIR__USBOTG_DIR,
 134                 MX31_PIN_USBOTG_NXT__USBOTG_NXT,
 135                 MX31_PIN_USBOTG_STP__USBOTG_STP,
 136         };
 137
 138         mxc_iomux_setup_multiple_pins(pins, ARRAY_SIZE(pins), "USB OTG");
 139
 140         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG);
 141         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG);
 142         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG);
 143         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG);
 144         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG);
 145         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG);
 146         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG);
 147         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG);
 148         mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG);
 149         mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG);
 150         mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG);
 151         mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG);
 152
 153         mxc_iomux_set_gpr(MUX_PGP_USB_4WIRE, true);
 154         mxc_iomux_set_gpr(MUX_PGP_USB_COMMON, true);
 155
 156         /* chip select */
 157         mxc_iomux_alloc_pin(IOMUX_MODE(MX31_PIN_DTR_DCE2, IOMUX_CONFIG_GPIO),
 158                                 "USBOTG_CS");
 159         gpio_request(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE2), "USBH1 CS");
 160         gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE2), 0);
 161
 162         return 0;
 163 }
 164
 165 static int usbh1_init(struct platform_device *pdev)
 166 {
 167         int pins[] = {
 168                 MX31_PIN_CSPI1_MOSI__USBH1_RXDM,
 169                 MX31_PIN_CSPI1_MISO__USBH1_RXDP,
 170                 MX31_PIN_CSPI1_SS0__USBH1_TXDM,
 171                 MX31_PIN_CSPI1_SS1__USBH1_TXDP,
 172                 MX31_PIN_CSPI1_SS2__USBH1_RCV,
 173                 MX31_PIN_CSPI1_SCLK__USBH1_OEB,
 174                 MX31_PIN_CSPI1_SPI_RDY__USBH1_FS,
 175         };
 176
 177         mxc_iomux_setup_multiple_pins(pins, ARRAY_SIZE(pins), "USB H1");
 178
 179         mxc_iomux_set_pad(MX31_PIN_CSPI1_MOSI, USB_PAD_CFG);
 180         mxc_iomux_set_pad(MX31_PIN_CSPI1_MISO, USB_PAD_CFG);
 181         mxc_iomux_set_pad(MX31_PIN_CSPI1_SS0, USB_PAD_CFG);
 182         mxc_iomux_set_pad(MX31_PIN_CSPI1_SS1, USB_PAD_CFG);
 183         mxc_iomux_set_pad(MX31_PIN_CSPI1_SS2, USB_PAD_CFG);
 184         mxc_iomux_set_pad(MX31_PIN_CSPI1_SCLK, USB_PAD_CFG);
 185         mxc_iomux_set_pad(MX31_PIN_CSPI1_SPI_RDY, USB_PAD_CFG);
 186
 187         mxc_iomux_set_gpr(MUX_PGP_USB_SUSPEND, true);
 188
 189         return 0;
 190 }
 191
 192 static int usbh2_init(struct platform_device *pdev)
 193 {
 194         int pins[] = {
 195                 MX31_PIN_USBH2_DATA0__USBH2_DATA0,
 196                 MX31_PIN_USBH2_DATA1__USBH2_DATA1,
 197                 MX31_PIN_USBH2_CLK__USBH2_CLK,
 198                 MX31_PIN_USBH2_DIR__USBH2_DIR,
 199                 MX31_PIN_USBH2_NXT__USBH2_NXT,
 200                 MX31_PIN_USBH2_STP__USBH2_STP,
 201         };
 202
 203         mxc_iomux_setup_multiple_pins(pins, ARRAY_SIZE(pins), "USB H2");
 204
 205         mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG);
 206         mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG);
 207         mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG);
 208         mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG);
 209         mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG);
 210         mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG);
 211         mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG);
 212         mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG);
 213         mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG);
 214         mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG);
 215         mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG);
 216         mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG);
 217
 218         mxc_iomux_set_gpr(MUX_PGP_UH2, true);
 219
 220         /* chip select */
 221         mxc_iomux_alloc_pin(IOMUX_MODE(MX31_PIN_DTR_DCE1, IOMUX_CONFIG_GPIO),
 222                                 "USBH2_CS");
 223         gpio_request(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1), "USBH2 CS");
 224         gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1), 0);
 225
 226         return 0;
 227 }
 228
 229 static struct mxc_usbh_platform_data usbotg_pdata = {
 230         .init   = usbotg_init,
 231         .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
 232         .flags  = MXC_EHCI_POWER_PINS_ENABLED,
 233 };
 234
 235 static struct mxc_usbh_platform_data usbh1_pdata = {
 236         .init   = usbh1_init,
 237         .portsc = MXC_EHCI_MODE_UTMI | MXC_EHCI_SERIAL,
 238         .flags  = MXC_EHCI_POWER_PINS_ENABLED | MXC_EHCI_INTERFACE_SINGLE_UNI,
 239 };
 240
 241 static struct mxc_usbh_platform_data usbh2_pdata = {
 242         .init   = usbh2_init,
 243         .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
 244         .flags  = MXC_EHCI_POWER_PINS_ENABLED,
 245 };
 246
 247 static struct platform_device *devices[] __initdata = {
 248         &smsc91x_device,
 249         &physmap_flash_device,
 250 };
 251
 252 /* SPI */
 253
 254 static int spi_internal_chipselect[] = {
 255         MXC_SPI_CS(0),
 256         MXC_SPI_CS(1),
 257         MXC_SPI_CS(2),
 258 };
 259
 260 static struct spi_imx_master spi0_pdata = {
 261         .chipselect = spi_internal_chipselect,
 262         .num_chipselect = ARRAY_SIZE(spi_internal_chipselect),
 263 };
 264
 265 static struct spi_imx_master spi1_pdata = {
 266         .chipselect = spi_internal_chipselect,
 267         .num_chipselect = ARRAY_SIZE(spi_internal_chipselect),
 268 };
 269
 270 static struct mc13783_platform_data mc13783_pdata __initdata = {
 271         .flags = MC13783_USE_RTC | MC13783_USE_TOUCHSCREEN,
 272 };
 273
 274 static struct spi_board_info mc13783_dev __initdata = {
 275         .modalias       = "mc13783",
 276         .max_speed_hz   = 1000000,
 277         .bus_num        = 1,
 278         .chip_select    = 0,
 279         .platform_data  = &mc13783_pdata,
 280 };
 281
 282 static int mx31lilly_baseboard;
 283 core_param(mx31lilly_baseboard, mx31lilly_baseboard, int, 0444);
 284
 285 static void __init mx31lilly_board_init(void)
 286 {
 287         switch (mx31lilly_baseboard) {
 288         case MX31LILLY_NOBOARD:
 289                 break;
 290         case MX31LILLY_DB:
 291                 mx31lilly_db_init();
 292                 break;
 293         default:
 294                 printk(KERN_ERR "Illegal mx31lilly_baseboard type %d\n",
 295                         mx31lilly_baseboard);
 296         }
 297
 298         mxc_iomux_alloc_pin(MX31_PIN_CS4__CS4, "Ethernet CS");
 299
 300         /* SPI */
 301         mxc_iomux_alloc_pin(MX31_PIN_CSPI1_SCLK__SCLK, "SPI1_CLK");
 302         mxc_iomux_alloc_pin(MX31_PIN_CSPI1_MOSI__MOSI, "SPI1_TX");
 303         mxc_iomux_alloc_pin(MX31_PIN_CSPI1_MISO__MISO, "SPI1_RX");
 304         mxc_iomux_alloc_pin(MX31_PIN_CSPI1_SPI_RDY__SPI_RDY, "SPI1_RDY");
 305         mxc_iomux_alloc_pin(MX31_PIN_CSPI1_SS0__SS0, "SPI1_SS0");
 306         mxc_iomux_alloc_pin(MX31_PIN_CSPI1_SS1__SS1, "SPI1_SS1");
 307         mxc_iomux_alloc_pin(MX31_PIN_CSPI1_SS2__SS2, "SPI1_SS2");
 308
 309         mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SCLK__SCLK, "SPI2_CLK");
 310         mxc_iomux_alloc_pin(MX31_PIN_CSPI2_MOSI__MOSI, "SPI2_TX");
 311         mxc_iomux_alloc_pin(MX31_PIN_CSPI2_MISO__MISO, "SPI2_RX");
 312         mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SPI_RDY__SPI_RDY, "SPI2_RDY");
 313         mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SS0__SS0, "SPI2_SS0");
 314         mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SS1__SS1, "SPI2_SS1");
 315         mxc_iomux_alloc_pin(MX31_PIN_CSPI2_SS2__SS2, "SPI2_SS2");
 316
 317         mxc_register_device(&mxc_spi_device0, &spi0_pdata);
 318         mxc_register_device(&mxc_spi_device1, &spi1_pdata);
 319         spi_register_board_info(&mc13783_dev, 1);
 320
 321         platform_add_devices(devices, ARRAY_SIZE(devices));
 322
 323         /* USB */
 324         usbotg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
 325                                 USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
 326         usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
 327                                 USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
 328
 329         mxc_register_device(&mxc_usbh1, &usbh1_pdata);
 330         mxc_register_device(&mxc_usbh2, &usbh2_pdata);
 331 }
 332
 333 static void __init mx31lilly_timer_init(void)
 334 {
 335         mx31_clocks_init(26000000);
 336 }
 337
 338 static struct sys_timer mx31lilly_timer = {
 339         .init   = mx31lilly_timer_init,
 340 };
 341
 342 MACHINE_START(LILLY1131, "INCO startec LILLY-1131")
 343         .phys_io        = MX31_AIPS1_BASE_ADDR,
 344         .io_pg_offst    = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
 345         .boot_params    = MX3x_PHYS_OFFSET + 0x100,
 346         .map_io         = mx31_map_io,
 347         .init_irq       = mx31_init_irq,
 348         .init_machine   = mx31lilly_board_init,
 349         .timer          = &mx31lilly_timer,
 350 MACHINE_END
 351