Merge git://git.kernel.org/pub/scm/linux/kernel/git/sage/ceph-client
[pandora-kernel.git] / arch / arm / mach-msm / devices-msm7x00.c
1 /* linux/arch/arm/mach-msm/devices.c
2  *
3  * Copyright (C) 2008 Google, Inc.
4  *
5  * This software is licensed under the terms of the GNU General Public
6  * License version 2, as published by the Free Software Foundation, and
7  * may be copied, distributed, and modified under those terms.
8  *
9  * This program is distributed in the hope that it will be useful,
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12  * GNU General Public License for more details.
13  *
14  */
15
16 #include <linux/kernel.h>
17 #include <linux/platform_device.h>
18 #include <linux/clkdev.h>
19
20 #include <mach/irqs.h>
21 #include <mach/msm_iomap.h>
22 #include "devices.h"
23
24 #include <asm/mach/flash.h>
25 #include <linux/mtd/nand.h>
26 #include <linux/mtd/partitions.h>
27
28 #include "clock.h"
29 #include "clock-pcom.h"
30 #include <mach/mmc.h>
31
32 static struct resource resources_uart1[] = {
33         {
34                 .start  = INT_UART1,
35                 .end    = INT_UART1,
36                 .flags  = IORESOURCE_IRQ,
37         },
38         {
39                 .start  = MSM_UART1_PHYS,
40                 .end    = MSM_UART1_PHYS + MSM_UART1_SIZE - 1,
41                 .flags  = IORESOURCE_MEM,
42                 .name  = "uart_resource"
43         },
44 };
45
46 static struct resource resources_uart2[] = {
47         {
48                 .start  = INT_UART2,
49                 .end    = INT_UART2,
50                 .flags  = IORESOURCE_IRQ,
51         },
52         {
53                 .start  = MSM_UART2_PHYS,
54                 .end    = MSM_UART2_PHYS + MSM_UART2_SIZE - 1,
55                 .flags  = IORESOURCE_MEM,
56                 .name  = "uart_resource"
57         },
58 };
59
60 static struct resource resources_uart3[] = {
61         {
62                 .start  = INT_UART3,
63                 .end    = INT_UART3,
64                 .flags  = IORESOURCE_IRQ,
65         },
66         {
67                 .start  = MSM_UART3_PHYS,
68                 .end    = MSM_UART3_PHYS + MSM_UART3_SIZE - 1,
69                 .flags  = IORESOURCE_MEM,
70                 .name  = "uart_resource"
71         },
72 };
73
74 struct platform_device msm_device_uart1 = {
75         .name   = "msm_serial",
76         .id     = 0,
77         .num_resources  = ARRAY_SIZE(resources_uart1),
78         .resource       = resources_uart1,
79 };
80
81 struct platform_device msm_device_uart2 = {
82         .name   = "msm_serial",
83         .id     = 1,
84         .num_resources  = ARRAY_SIZE(resources_uart2),
85         .resource       = resources_uart2,
86 };
87
88 struct platform_device msm_device_uart3 = {
89         .name   = "msm_serial",
90         .id     = 2,
91         .num_resources  = ARRAY_SIZE(resources_uart3),
92         .resource       = resources_uart3,
93 };
94
95 static struct resource resources_i2c[] = {
96         {
97                 .start  = MSM_I2C_PHYS,
98                 .end    = MSM_I2C_PHYS + MSM_I2C_SIZE - 1,
99                 .flags  = IORESOURCE_MEM,
100         },
101         {
102                 .start  = INT_PWB_I2C,
103                 .end    = INT_PWB_I2C,
104                 .flags  = IORESOURCE_IRQ,
105         },
106 };
107
108 struct platform_device msm_device_i2c = {
109         .name           = "msm_i2c",
110         .id             = 0,
111         .num_resources  = ARRAY_SIZE(resources_i2c),
112         .resource       = resources_i2c,
113 };
114
115 static struct resource resources_hsusb[] = {
116         {
117                 .start  = MSM_HSUSB_PHYS,
118                 .end    = MSM_HSUSB_PHYS + MSM_HSUSB_SIZE,
119                 .flags  = IORESOURCE_MEM,
120         },
121         {
122                 .start  = INT_USB_HS,
123                 .end    = INT_USB_HS,
124                 .flags  = IORESOURCE_IRQ,
125         },
126 };
127
128 struct platform_device msm_device_hsusb = {
129         .name           = "msm_hsusb",
130         .id             = -1,
131         .num_resources  = ARRAY_SIZE(resources_hsusb),
132         .resource       = resources_hsusb,
133         .dev            = {
134                 .coherent_dma_mask      = 0xffffffff,
135         },
136 };
137
138 struct flash_platform_data msm_nand_data = {
139         .parts          = NULL,
140         .nr_parts       = 0,
141 };
142
143 static struct resource resources_nand[] = {
144         [0] = {
145                 .start  = 7,
146                 .end    = 7,
147                 .flags  = IORESOURCE_DMA,
148         },
149 };
150
151 struct platform_device msm_device_nand = {
152         .name           = "msm_nand",
153         .id             = -1,
154         .num_resources  = ARRAY_SIZE(resources_nand),
155         .resource       = resources_nand,
156         .dev            = {
157                 .platform_data  = &msm_nand_data,
158         },
159 };
160
161 struct platform_device msm_device_smd = {
162         .name   = "msm_smd",
163         .id     = -1,
164 };
165
166 static struct resource resources_sdc1[] = {
167         {
168                 .start  = MSM_SDC1_PHYS,
169                 .end    = MSM_SDC1_PHYS + MSM_SDC1_SIZE - 1,
170                 .flags  = IORESOURCE_MEM,
171         },
172         {
173                 .start  = INT_SDC1_0,
174                 .end    = INT_SDC1_0,
175                 .flags  = IORESOURCE_IRQ,
176                 .name   = "cmd_irq",
177         },
178         {
179                 .start  = INT_SDC1_1,
180                 .end    = INT_SDC1_1,
181                 .flags  = IORESOURCE_IRQ,
182                 .name   = "pio_irq",
183         },
184         {
185                 .flags  = IORESOURCE_IRQ | IORESOURCE_DISABLED,
186                 .name   = "status_irq"
187         },
188         {
189                 .start  = 8,
190                 .end    = 8,
191                 .flags  = IORESOURCE_DMA,
192         },
193 };
194
195 static struct resource resources_sdc2[] = {
196         {
197                 .start  = MSM_SDC2_PHYS,
198                 .end    = MSM_SDC2_PHYS + MSM_SDC2_SIZE - 1,
199                 .flags  = IORESOURCE_MEM,
200         },
201         {
202                 .start  = INT_SDC2_0,
203                 .end    = INT_SDC2_0,
204                 .flags  = IORESOURCE_IRQ,
205                 .name   = "cmd_irq",
206         },
207                 {
208                 .start  = INT_SDC2_1,
209                 .end    = INT_SDC2_1,
210                 .flags  = IORESOURCE_IRQ,
211                 .name   = "pio_irq",
212         },
213         {
214                 .flags  = IORESOURCE_IRQ | IORESOURCE_DISABLED,
215                 .name   = "status_irq"
216         },
217         {
218                 .start  = 8,
219                 .end    = 8,
220                 .flags  = IORESOURCE_DMA,
221         },
222 };
223
224 static struct resource resources_sdc3[] = {
225         {
226                 .start  = MSM_SDC3_PHYS,
227                 .end    = MSM_SDC3_PHYS + MSM_SDC3_SIZE - 1,
228                 .flags  = IORESOURCE_MEM,
229         },
230         {
231                 .start  = INT_SDC3_0,
232                 .end    = INT_SDC3_0,
233                 .flags  = IORESOURCE_IRQ,
234                 .name   = "cmd_irq",
235         },
236                 {
237                 .start  = INT_SDC3_1,
238                 .end    = INT_SDC3_1,
239                 .flags  = IORESOURCE_IRQ,
240                 .name   = "pio_irq",
241         },
242         {
243                 .flags  = IORESOURCE_IRQ | IORESOURCE_DISABLED,
244                 .name   = "status_irq"
245         },
246         {
247                 .start  = 8,
248                 .end    = 8,
249                 .flags  = IORESOURCE_DMA,
250         },
251 };
252
253 static struct resource resources_sdc4[] = {
254         {
255                 .start  = MSM_SDC4_PHYS,
256                 .end    = MSM_SDC4_PHYS + MSM_SDC4_SIZE - 1,
257                 .flags  = IORESOURCE_MEM,
258         },
259         {
260                 .start  = INT_SDC4_0,
261                 .end    = INT_SDC4_0,
262                 .flags  = IORESOURCE_IRQ,
263                 .name   = "cmd_irq",
264         },
265                 {
266                 .start  = INT_SDC4_1,
267                 .end    = INT_SDC4_1,
268                 .flags  = IORESOURCE_IRQ,
269                 .name   = "pio_irq",
270         },
271         {
272                 .flags  = IORESOURCE_IRQ | IORESOURCE_DISABLED,
273                 .name   = "status_irq"
274         },
275         {
276                 .start  = 8,
277                 .end    = 8,
278                 .flags  = IORESOURCE_DMA,
279         },
280 };
281
282 struct platform_device msm_device_sdc1 = {
283         .name           = "msm_sdcc",
284         .id             = 1,
285         .num_resources  = ARRAY_SIZE(resources_sdc1),
286         .resource       = resources_sdc1,
287         .dev            = {
288                 .coherent_dma_mask      = 0xffffffff,
289         },
290 };
291
292 struct platform_device msm_device_sdc2 = {
293         .name           = "msm_sdcc",
294         .id             = 2,
295         .num_resources  = ARRAY_SIZE(resources_sdc2),
296         .resource       = resources_sdc2,
297         .dev            = {
298                 .coherent_dma_mask      = 0xffffffff,
299         },
300 };
301
302 struct platform_device msm_device_sdc3 = {
303         .name           = "msm_sdcc",
304         .id             = 3,
305         .num_resources  = ARRAY_SIZE(resources_sdc3),
306         .resource       = resources_sdc3,
307         .dev            = {
308                 .coherent_dma_mask      = 0xffffffff,
309         },
310 };
311
312 struct platform_device msm_device_sdc4 = {
313         .name           = "msm_sdcc",
314         .id             = 4,
315         .num_resources  = ARRAY_SIZE(resources_sdc4),
316         .resource       = resources_sdc4,
317         .dev            = {
318                 .coherent_dma_mask      = 0xffffffff,
319         },
320 };
321
322 static struct platform_device *msm_sdcc_devices[] __initdata = {
323         &msm_device_sdc1,
324         &msm_device_sdc2,
325         &msm_device_sdc3,
326         &msm_device_sdc4,
327 };
328
329 int __init msm_add_sdcc(unsigned int controller,
330                         struct msm_mmc_platform_data *plat,
331                         unsigned int stat_irq, unsigned long stat_irq_flags)
332 {
333         struct platform_device  *pdev;
334         struct resource *res;
335
336         if (controller < 1 || controller > 4)
337                 return -EINVAL;
338
339         pdev = msm_sdcc_devices[controller-1];
340         pdev->dev.platform_data = plat;
341
342         res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "status_irq");
343         if (!res)
344                 return -EINVAL;
345         else if (stat_irq) {
346                 res->start = res->end = stat_irq;
347                 res->flags &= ~IORESOURCE_DISABLED;
348                 res->flags |= stat_irq_flags;
349         }
350
351         return platform_device_register(pdev);
352 }
353
354 static struct resource resources_mddi0[] = {
355         {
356                 .start  = MSM_PMDH_PHYS,
357                 .end    = MSM_PMDH_PHYS + MSM_PMDH_SIZE - 1,
358                 .flags  = IORESOURCE_MEM,
359         },
360         {
361                 .start  = INT_MDDI_PRI,
362                 .end    = INT_MDDI_PRI,
363                 .flags  = IORESOURCE_IRQ,
364         },
365 };
366
367 static struct resource resources_mddi1[] = {
368         {
369                 .start  = MSM_EMDH_PHYS,
370                 .end    = MSM_EMDH_PHYS + MSM_EMDH_SIZE - 1,
371                 .flags  = IORESOURCE_MEM,
372         },
373         {
374                 .start  = INT_MDDI_EXT,
375                 .end    = INT_MDDI_EXT,
376                 .flags  = IORESOURCE_IRQ,
377         },
378 };
379
380 struct platform_device msm_device_mddi0 = {
381         .name = "msm_mddi",
382         .id = 0,
383         .num_resources = ARRAY_SIZE(resources_mddi0),
384         .resource = resources_mddi0,
385         .dev = {
386                 .coherent_dma_mask      = 0xffffffff,
387         },
388 };
389
390 struct platform_device msm_device_mddi1 = {
391         .name = "msm_mddi",
392         .id = 1,
393         .num_resources = ARRAY_SIZE(resources_mddi1),
394         .resource = resources_mddi1,
395         .dev = {
396                 .coherent_dma_mask      = 0xffffffff,
397         },
398 };
399
400 static struct resource resources_mdp[] = {
401         {
402                 .start  = MSM_MDP_PHYS,
403                 .end    = MSM_MDP_PHYS + MSM_MDP_SIZE - 1,
404                 .name   = "mdp",
405                 .flags  = IORESOURCE_MEM
406         },
407         {
408                 .start  = INT_MDP,
409                 .end    = INT_MDP,
410                 .flags  = IORESOURCE_IRQ,
411         },
412 };
413
414 struct platform_device msm_device_mdp = {
415         .name = "msm_mdp",
416         .id = 0,
417         .num_resources = ARRAY_SIZE(resources_mdp),
418         .resource = resources_mdp,
419 };
420
421 struct clk_lookup msm_clocks_7x01a[] = {
422         CLK_PCOM("adm_clk",     ADM_CLK,        NULL, 0),
423         CLK_PCOM("adsp_clk",    ADSP_CLK,       NULL, 0),
424         CLK_PCOM("ebi1_clk",    EBI1_CLK,       NULL, 0),
425         CLK_PCOM("ebi2_clk",    EBI2_CLK,       NULL, 0),
426         CLK_PCOM("ecodec_clk",  ECODEC_CLK,     NULL, 0),
427         CLK_PCOM("emdh_clk",    EMDH_CLK,       NULL, OFF),
428         CLK_PCOM("gp_clk",              GP_CLK,         NULL, 0),
429         CLK_PCOM("grp_clk",     GRP_3D_CLK,     NULL, OFF),
430         CLK_PCOM("i2c_clk",     I2C_CLK,        "msm_i2c.0", 0),
431         CLK_PCOM("icodec_rx_clk",       ICODEC_RX_CLK,  NULL, 0),
432         CLK_PCOM("icodec_tx_clk",       ICODEC_TX_CLK,  NULL, 0),
433         CLK_PCOM("imem_clk",    IMEM_CLK,       NULL, OFF),
434         CLK_PCOM("mdc_clk",     MDC_CLK,        NULL, 0),
435         CLK_PCOM("mdp_clk",     MDP_CLK,        NULL, OFF),
436         CLK_PCOM("pbus_clk",    PBUS_CLK,       NULL, 0),
437         CLK_PCOM("pcm_clk",     PCM_CLK,        NULL, 0),
438         CLK_PCOM("mddi_clk",    PMDH_CLK,       NULL, OFF | CLK_MINMAX),
439         CLK_PCOM("sdac_clk",    SDAC_CLK,       NULL, OFF),
440         CLK_PCOM("sdc_clk",     SDC1_CLK,       "msm_sdcc.1", OFF),
441         CLK_PCOM("sdc_pclk",    SDC1_P_CLK,     "msm_sdcc.1", OFF),
442         CLK_PCOM("sdc_clk",     SDC2_CLK,       "msm_sdcc.2", OFF),
443         CLK_PCOM("sdc_pclk",    SDC2_P_CLK,     "msm_sdcc.2", OFF),
444         CLK_PCOM("sdc_clk",     SDC3_CLK,       "msm_sdcc.3", OFF),
445         CLK_PCOM("sdc_pclk",    SDC3_P_CLK,     "msm_sdcc.3", OFF),
446         CLK_PCOM("sdc_clk",     SDC4_CLK,       "msm_sdcc.4", OFF),
447         CLK_PCOM("sdc_pclk",    SDC4_P_CLK,     "msm_sdcc.4", OFF),
448         CLK_PCOM("tsif_clk",    TSIF_CLK,       NULL, 0),
449         CLK_PCOM("tsif_ref_clk",        TSIF_REF_CLK,   NULL, 0),
450         CLK_PCOM("tv_dac_clk",  TV_DAC_CLK,     NULL, 0),
451         CLK_PCOM("tv_enc_clk",  TV_ENC_CLK,     NULL, 0),
452         CLK_PCOM("uart_clk",    UART1_CLK,      "msm_serial.0", OFF),
453         CLK_PCOM("uart_clk",    UART2_CLK,      "msm_serial.1", 0),
454         CLK_PCOM("uart_clk",    UART3_CLK,      "msm_serial.2", OFF),
455         CLK_PCOM("uart1dm_clk", UART1DM_CLK,    NULL, OFF),
456         CLK_PCOM("uart2dm_clk", UART2DM_CLK,    NULL, 0),
457         CLK_PCOM("usb_hs_clk",  USB_HS_CLK,     "msm_hsusb", OFF),
458         CLK_PCOM("usb_hs_pclk", USB_HS_P_CLK,   "msm_hsusb", OFF),
459         CLK_PCOM("usb_otg_clk", USB_OTG_CLK,    NULL, 0),
460         CLK_PCOM("vdc_clk",     VDC_CLK,        NULL, OFF ),
461         CLK_PCOM("vfe_clk",     VFE_CLK,        NULL, OFF),
462         CLK_PCOM("vfe_mdc_clk", VFE_MDC_CLK,    NULL, OFF),
463 };
464
465 unsigned msm_num_clocks_7x01a = ARRAY_SIZE(msm_clocks_7x01a);