arch/arm/mach-kirkwood/common.c

   1 /*
   2  * arch/arm/mach-kirkwood/common.c
   3  *
   4  * Core functions for Marvell Kirkwood SoCs
   5  *
   6  * This file is licensed under the terms of the GNU General Public
   7  * License version 2.  This program is licensed "as is" without any
   8  * warranty of any kind, whether express or implied.
   9  */
  10
  11 #include <linux/kernel.h>
  12 #include <linux/init.h>
  13 #include <linux/platform_device.h>
  14 #include <linux/serial_8250.h>
  15 #include <linux/mbus.h>
  16 #include <linux/mv643xx_eth.h>
  17 #include <linux/mv643xx_i2c.h>
  18 #include <linux/ata_platform.h>
  19 #include <linux/mtd/nand.h>
  20 #include <linux/spi/orion_spi.h>
  21 #include <net/dsa.h>
  22 #include <asm/page.h>
  23 #include <asm/timex.h>
  24 #include <asm/mach/map.h>
  25 #include <asm/mach/time.h>
  26 #include <mach/kirkwood.h>
  27 #include <mach/bridge-regs.h>
  28 #include <plat/cache-feroceon-l2.h>
  29 #include <plat/ehci-orion.h>
  30 #include <plat/mvsdio.h>
  31 #include <plat/mv_xor.h>
  32 #include <plat/orion_nand.h>
  33 #include <plat/orion_wdt.h>
  34 #include <plat/time.h>
  35 #include "common.h"
  36
  37 /*****************************************************************************
  38  * I/O Address Mapping
  39  ****************************************************************************/
  40 static struct map_desc kirkwood_io_desc[] __initdata = {
  41         {
  42                 .virtual        = KIRKWOOD_PCIE_IO_VIRT_BASE,
  43                 .pfn            = __phys_to_pfn(KIRKWOOD_PCIE_IO_PHYS_BASE),
  44                 .length         = KIRKWOOD_PCIE_IO_SIZE,
  45                 .type           = MT_DEVICE,
  46         }, {
  47                 .virtual        = KIRKWOOD_REGS_VIRT_BASE,
  48                 .pfn            = __phys_to_pfn(KIRKWOOD_REGS_PHYS_BASE),
  49                 .length         = KIRKWOOD_REGS_SIZE,
  50                 .type           = MT_DEVICE,
  51         },
  52 };
  53
  54 void __init kirkwood_map_io(void)
  55 {
  56         iotable_init(kirkwood_io_desc, ARRAY_SIZE(kirkwood_io_desc));
  57 }
  58
  59 /*
  60  * Default clock control bits.  Any bit _not_ set in this variable
  61  * will be cleared from the hardware after platform devices have been
  62  * registered.  Some reserved bits must be set to 1.
  63  */
  64 unsigned int kirkwood_clk_ctrl = CGC_DUNIT | CGC_RESERVED;
  65
  66
  67 /*****************************************************************************
  68  * EHCI
  69  ****************************************************************************/
  70 static struct orion_ehci_data kirkwood_ehci_data = {
  71         .dram           = &kirkwood_mbus_dram_info,
  72         .phy_version    = EHCI_PHY_NA,
  73 };
  74
  75 static u64 ehci_dmamask = 0xffffffffUL;
  76
  77
  78 /*****************************************************************************
  79  * EHCI0
  80  ****************************************************************************/
  81 static struct resource kirkwood_ehci_resources[] = {
  82         {
  83                 .start  = USB_PHYS_BASE,
  84                 .end    = USB_PHYS_BASE + 0x0fff,
  85                 .flags  = IORESOURCE_MEM,
  86         }, {
  87                 .start  = IRQ_KIRKWOOD_USB,
  88                 .end    = IRQ_KIRKWOOD_USB,
  89                 .flags  = IORESOURCE_IRQ,
  90         },
  91 };
  92
  93 static struct platform_device kirkwood_ehci = {
  94         .name           = "orion-ehci",
  95         .id             = 0,
  96         .dev            = {
  97                 .dma_mask               = &ehci_dmamask,
  98                 .coherent_dma_mask      = 0xffffffff,
  99                 .platform_data          = &kirkwood_ehci_data,
 100         },
 101         .resource       = kirkwood_ehci_resources,
 102         .num_resources  = ARRAY_SIZE(kirkwood_ehci_resources),
 103 };
 104
 105 void __init kirkwood_ehci_init(void)
 106 {
 107         kirkwood_clk_ctrl |= CGC_USB0;
 108         platform_device_register(&kirkwood_ehci);
 109 }
 110
 111
 112 /*****************************************************************************
 113  * GE00
 114  ****************************************************************************/
 115 struct mv643xx_eth_shared_platform_data kirkwood_ge00_shared_data = {
 116         .dram           = &kirkwood_mbus_dram_info,
 117 };
 118
 119 static struct resource kirkwood_ge00_shared_resources[] = {
 120         {
 121                 .name   = "ge00 base",
 122                 .start  = GE00_PHYS_BASE + 0x2000,
 123                 .end    = GE00_PHYS_BASE + 0x3fff,
 124                 .flags  = IORESOURCE_MEM,
 125         }, {
 126                 .name   = "ge00 err irq",
 127                 .start  = IRQ_KIRKWOOD_GE00_ERR,
 128                 .end    = IRQ_KIRKWOOD_GE00_ERR,
 129                 .flags  = IORESOURCE_IRQ,
 130         },
 131 };
 132
 133 static struct platform_device kirkwood_ge00_shared = {
 134         .name           = MV643XX_ETH_SHARED_NAME,
 135         .id             = 0,
 136         .dev            = {
 137                 .platform_data  = &kirkwood_ge00_shared_data,
 138         },
 139         .num_resources  = ARRAY_SIZE(kirkwood_ge00_shared_resources),
 140         .resource       = kirkwood_ge00_shared_resources,
 141 };
 142
 143 static struct resource kirkwood_ge00_resources[] = {
 144         {
 145                 .name   = "ge00 irq",
 146                 .start  = IRQ_KIRKWOOD_GE00_SUM,
 147                 .end    = IRQ_KIRKWOOD_GE00_SUM,
 148                 .flags  = IORESOURCE_IRQ,
 149         },
 150 };
 151
 152 static struct platform_device kirkwood_ge00 = {
 153         .name           = MV643XX_ETH_NAME,
 154         .id             = 0,
 155         .num_resources  = 1,
 156         .resource       = kirkwood_ge00_resources,
 157         .dev            = {
 158                 .coherent_dma_mask      = 0xffffffff,
 159         },
 160 };
 161
 162 void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data)
 163 {
 164         kirkwood_clk_ctrl |= CGC_GE0;
 165         eth_data->shared = &kirkwood_ge00_shared;
 166         kirkwood_ge00.dev.platform_data = eth_data;
 167
 168         platform_device_register(&kirkwood_ge00_shared);
 169         platform_device_register(&kirkwood_ge00);
 170 }
 171
 172
 173 /*****************************************************************************
 174  * GE01
 175  ****************************************************************************/
 176 struct mv643xx_eth_shared_platform_data kirkwood_ge01_shared_data = {
 177         .dram           = &kirkwood_mbus_dram_info,
 178         .shared_smi     = &kirkwood_ge00_shared,
 179 };
 180
 181 static struct resource kirkwood_ge01_shared_resources[] = {
 182         {
 183                 .name   = "ge01 base",
 184                 .start  = GE01_PHYS_BASE + 0x2000,
 185                 .end    = GE01_PHYS_BASE + 0x3fff,
 186                 .flags  = IORESOURCE_MEM,
 187         }, {
 188                 .name   = "ge01 err irq",
 189                 .start  = IRQ_KIRKWOOD_GE01_ERR,
 190                 .end    = IRQ_KIRKWOOD_GE01_ERR,
 191                 .flags  = IORESOURCE_IRQ,
 192         },
 193 };
 194
 195 static struct platform_device kirkwood_ge01_shared = {
 196         .name           = MV643XX_ETH_SHARED_NAME,
 197         .id             = 1,
 198         .dev            = {
 199                 .platform_data  = &kirkwood_ge01_shared_data,
 200         },
 201         .num_resources  = ARRAY_SIZE(kirkwood_ge01_shared_resources),
 202         .resource       = kirkwood_ge01_shared_resources,
 203 };
 204
 205 static struct resource kirkwood_ge01_resources[] = {
 206         {
 207                 .name   = "ge01 irq",
 208                 .start  = IRQ_KIRKWOOD_GE01_SUM,
 209                 .end    = IRQ_KIRKWOOD_GE01_SUM,
 210                 .flags  = IORESOURCE_IRQ,
 211         },
 212 };
 213
 214 static struct platform_device kirkwood_ge01 = {
 215         .name           = MV643XX_ETH_NAME,
 216         .id             = 1,
 217         .num_resources  = 1,
 218         .resource       = kirkwood_ge01_resources,
 219         .dev            = {
 220                 .coherent_dma_mask      = 0xffffffff,
 221         },
 222 };
 223
 224 void __init kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data)
 225 {
 226         kirkwood_clk_ctrl |= CGC_GE1;
 227         eth_data->shared = &kirkwood_ge01_shared;
 228         kirkwood_ge01.dev.platform_data = eth_data;
 229
 230         platform_device_register(&kirkwood_ge01_shared);
 231         platform_device_register(&kirkwood_ge01);
 232 }
 233
 234
 235 /*****************************************************************************
 236  * Ethernet switch
 237  ****************************************************************************/
 238 static struct resource kirkwood_switch_resources[] = {
 239         {
 240                 .start  = 0,
 241                 .end    = 0,
 242                 .flags  = IORESOURCE_IRQ,
 243         },
 244 };
 245
 246 static struct platform_device kirkwood_switch_device = {
 247         .name           = "dsa",
 248         .id             = 0,
 249         .num_resources  = 0,
 250         .resource       = kirkwood_switch_resources,
 251 };
 252
 253 void __init kirkwood_ge00_switch_init(struct dsa_platform_data *d, int irq)
 254 {
 255         int i;
 256
 257         if (irq != NO_IRQ) {
 258                 kirkwood_switch_resources[0].start = irq;
 259                 kirkwood_switch_resources[0].end = irq;
 260                 kirkwood_switch_device.num_resources = 1;
 261         }
 262
 263         d->netdev = &kirkwood_ge00.dev;
 264         for (i = 0; i < d->nr_chips; i++)
 265                 d->chip[i].mii_bus = &kirkwood_ge00_shared.dev;
 266         kirkwood_switch_device.dev.platform_data = d;
 267
 268         platform_device_register(&kirkwood_switch_device);
 269 }
 270
 271
 272 /*****************************************************************************
 273  * NAND flash
 274  ****************************************************************************/
 275 static struct resource kirkwood_nand_resource = {
 276         .flags          = IORESOURCE_MEM,
 277         .start          = KIRKWOOD_NAND_MEM_PHYS_BASE,
 278         .end            = KIRKWOOD_NAND_MEM_PHYS_BASE +
 279                                 KIRKWOOD_NAND_MEM_SIZE - 1,
 280 };
 281
 282 static struct orion_nand_data kirkwood_nand_data = {
 283         .cle            = 0,
 284         .ale            = 1,
 285         .width          = 8,
 286 };
 287
 288 static struct platform_device kirkwood_nand_flash = {
 289         .name           = "orion_nand",
 290         .id             = -1,
 291         .dev            = {
 292                 .platform_data  = &kirkwood_nand_data,
 293         },
 294         .resource       = &kirkwood_nand_resource,
 295         .num_resources  = 1,
 296 };
 297
 298 void __init kirkwood_nand_init(struct mtd_partition *parts, int nr_parts,
 299                                int chip_delay)
 300 {
 301         kirkwood_clk_ctrl |= CGC_RUNIT;
 302         kirkwood_nand_data.parts = parts;
 303         kirkwood_nand_data.nr_parts = nr_parts;
 304         kirkwood_nand_data.chip_delay = chip_delay;
 305         platform_device_register(&kirkwood_nand_flash);
 306 }
 307
 308
 309 /*****************************************************************************
 310  * SoC RTC
 311  ****************************************************************************/
 312 static struct resource kirkwood_rtc_resource = {
 313         .start  = RTC_PHYS_BASE,
 314         .end    = RTC_PHYS_BASE + SZ_16 - 1,
 315         .flags  = IORESOURCE_MEM,
 316 };
 317
 318 static void __init kirkwood_rtc_init(void)
 319 {
 320         platform_device_register_simple("rtc-mv", -1, &kirkwood_rtc_resource, 1);
 321 }
 322
 323
 324 /*****************************************************************************
 325  * SATA
 326  ****************************************************************************/
 327 static struct resource kirkwood_sata_resources[] = {
 328         {
 329                 .name   = "sata base",
 330                 .start  = SATA_PHYS_BASE,
 331                 .end    = SATA_PHYS_BASE + 0x5000 - 1,
 332                 .flags  = IORESOURCE_MEM,
 333         }, {
 334                 .name   = "sata irq",
 335                 .start  = IRQ_KIRKWOOD_SATA,
 336                 .end    = IRQ_KIRKWOOD_SATA,
 337                 .flags  = IORESOURCE_IRQ,
 338         },
 339 };
 340
 341 static struct platform_device kirkwood_sata = {
 342         .name           = "sata_mv",
 343         .id             = 0,
 344         .dev            = {
 345                 .coherent_dma_mask      = 0xffffffff,
 346         },
 347         .num_resources  = ARRAY_SIZE(kirkwood_sata_resources),
 348         .resource       = kirkwood_sata_resources,
 349 };
 350
 351 void __init kirkwood_sata_init(struct mv_sata_platform_data *sata_data)
 352 {
 353         kirkwood_clk_ctrl |= CGC_SATA0;
 354         if (sata_data->n_ports > 1)
 355                 kirkwood_clk_ctrl |= CGC_SATA1;
 356         sata_data->dram = &kirkwood_mbus_dram_info;
 357         kirkwood_sata.dev.platform_data = sata_data;
 358         platform_device_register(&kirkwood_sata);
 359 }
 360
 361
 362 /*****************************************************************************
 363  * SD/SDIO/MMC
 364  ****************************************************************************/
 365 static struct resource mvsdio_resources[] = {
 366         [0] = {
 367                 .start  = SDIO_PHYS_BASE,
 368                 .end    = SDIO_PHYS_BASE + SZ_1K - 1,
 369                 .flags  = IORESOURCE_MEM,
 370         },
 371         [1] = {
 372                 .start  = IRQ_KIRKWOOD_SDIO,
 373                 .end    = IRQ_KIRKWOOD_SDIO,
 374                 .flags  = IORESOURCE_IRQ,
 375         },
 376 };
 377
 378 static u64 mvsdio_dmamask = 0xffffffffUL;
 379
 380 static struct platform_device kirkwood_sdio = {
 381         .name           = "mvsdio",
 382         .id             = -1,
 383         .dev            = {
 384                 .dma_mask = &mvsdio_dmamask,
 385                 .coherent_dma_mask = 0xffffffff,
 386         },
 387         .num_resources  = ARRAY_SIZE(mvsdio_resources),
 388         .resource       = mvsdio_resources,
 389 };
 390
 391 void __init kirkwood_sdio_init(struct mvsdio_platform_data *mvsdio_data)
 392 {
 393         u32 dev, rev;
 394
 395         kirkwood_pcie_id(&dev, &rev);
 396         if (rev == 0)  /* catch all Kirkwood Z0's */
 397                 mvsdio_data->clock = 100000000;
 398         else
 399                 mvsdio_data->clock = 200000000;
 400         mvsdio_data->dram = &kirkwood_mbus_dram_info;
 401         kirkwood_clk_ctrl |= CGC_SDIO;
 402         kirkwood_sdio.dev.platform_data = mvsdio_data;
 403         platform_device_register(&kirkwood_sdio);
 404 }
 405
 406
 407 /*****************************************************************************
 408  * SPI
 409  ****************************************************************************/
 410 static struct orion_spi_info kirkwood_spi_plat_data = {
 411 };
 412
 413 static struct resource kirkwood_spi_resources[] = {
 414         {
 415                 .start  = SPI_PHYS_BASE,
 416                 .end    = SPI_PHYS_BASE + SZ_512 - 1,
 417                 .flags  = IORESOURCE_MEM,
 418         },
 419 };
 420
 421 static struct platform_device kirkwood_spi = {
 422         .name           = "orion_spi",
 423         .id             = 0,
 424         .resource       = kirkwood_spi_resources,
 425         .dev            = {
 426                 .platform_data  = &kirkwood_spi_plat_data,
 427         },
 428         .num_resources  = ARRAY_SIZE(kirkwood_spi_resources),
 429 };
 430
 431 void __init kirkwood_spi_init()
 432 {
 433         kirkwood_clk_ctrl |= CGC_RUNIT;
 434         platform_device_register(&kirkwood_spi);
 435 }
 436
 437
 438 /*****************************************************************************
 439  * I2C
 440  ****************************************************************************/
 441 static struct mv64xxx_i2c_pdata kirkwood_i2c_pdata = {
 442         .freq_m         = 8, /* assumes 166 MHz TCLK */
 443         .freq_n         = 3,
 444         .timeout        = 1000, /* Default timeout of 1 second */
 445 };
 446
 447 static struct resource kirkwood_i2c_resources[] = {
 448         {
 449                 .start  = I2C_PHYS_BASE,
 450                 .end    = I2C_PHYS_BASE + 0x1f,
 451                 .flags  = IORESOURCE_MEM,
 452         }, {
 453                 .start  = IRQ_KIRKWOOD_TWSI,
 454                 .end    = IRQ_KIRKWOOD_TWSI,
 455                 .flags  = IORESOURCE_IRQ,
 456         },
 457 };
 458
 459 static struct platform_device kirkwood_i2c = {
 460         .name           = MV64XXX_I2C_CTLR_NAME,
 461         .id             = 0,
 462         .num_resources  = ARRAY_SIZE(kirkwood_i2c_resources),
 463         .resource       = kirkwood_i2c_resources,
 464         .dev            = {
 465                 .platform_data  = &kirkwood_i2c_pdata,
 466         },
 467 };
 468
 469 void __init kirkwood_i2c_init(void)
 470 {
 471         platform_device_register(&kirkwood_i2c);
 472 }
 473
 474
 475 /*****************************************************************************
 476  * UART0
 477  ****************************************************************************/
 478 static struct plat_serial8250_port kirkwood_uart0_data[] = {
 479         {
 480                 .mapbase        = UART0_PHYS_BASE,
 481                 .membase        = (char *)UART0_VIRT_BASE,
 482                 .irq            = IRQ_KIRKWOOD_UART_0,
 483                 .flags          = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
 484                 .iotype         = UPIO_MEM,
 485                 .regshift       = 2,
 486                 .uartclk        = 0,
 487         }, {
 488         },
 489 };
 490
 491 static struct resource kirkwood_uart0_resources[] = {
 492         {
 493                 .start          = UART0_PHYS_BASE,
 494                 .end            = UART0_PHYS_BASE + 0xff,
 495                 .flags          = IORESOURCE_MEM,
 496         }, {
 497                 .start          = IRQ_KIRKWOOD_UART_0,
 498                 .end            = IRQ_KIRKWOOD_UART_0,
 499                 .flags          = IORESOURCE_IRQ,
 500         },
 501 };
 502
 503 static struct platform_device kirkwood_uart0 = {
 504         .name                   = "serial8250",
 505         .id                     = 0,
 506         .dev                    = {
 507                 .platform_data  = kirkwood_uart0_data,
 508         },
 509         .resource               = kirkwood_uart0_resources,
 510         .num_resources          = ARRAY_SIZE(kirkwood_uart0_resources),
 511 };
 512
 513 void __init kirkwood_uart0_init(void)
 514 {
 515         platform_device_register(&kirkwood_uart0);
 516 }
 517
 518
 519 /*****************************************************************************
 520  * UART1
 521  ****************************************************************************/
 522 static struct plat_serial8250_port kirkwood_uart1_data[] = {
 523         {
 524                 .mapbase        = UART1_PHYS_BASE,
 525                 .membase        = (char *)UART1_VIRT_BASE,
 526                 .irq            = IRQ_KIRKWOOD_UART_1,
 527                 .flags          = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
 528                 .iotype         = UPIO_MEM,
 529                 .regshift       = 2,
 530                 .uartclk        = 0,
 531         }, {
 532         },
 533 };
 534
 535 static struct resource kirkwood_uart1_resources[] = {
 536         {
 537                 .start          = UART1_PHYS_BASE,
 538                 .end            = UART1_PHYS_BASE + 0xff,
 539                 .flags          = IORESOURCE_MEM,
 540         }, {
 541                 .start          = IRQ_KIRKWOOD_UART_1,
 542                 .end            = IRQ_KIRKWOOD_UART_1,
 543                 .flags          = IORESOURCE_IRQ,
 544         },
 545 };
 546
 547 static struct platform_device kirkwood_uart1 = {
 548         .name                   = "serial8250",
 549         .id                     = 1,
 550         .dev                    = {
 551                 .platform_data  = kirkwood_uart1_data,
 552         },
 553         .resource               = kirkwood_uart1_resources,
 554         .num_resources          = ARRAY_SIZE(kirkwood_uart1_resources),
 555 };
 556
 557 void __init kirkwood_uart1_init(void)
 558 {
 559         platform_device_register(&kirkwood_uart1);
 560 }
 561
 562
 563 /*****************************************************************************
 564  * Cryptographic Engines and Security Accelerator (CESA)
 565  ****************************************************************************/
 566
 567 static struct resource kirkwood_crypto_res[] = {
 568         {
 569                 .name   = "regs",
 570                 .start  = CRYPTO_PHYS_BASE,
 571                 .end    = CRYPTO_PHYS_BASE + 0xffff,
 572                 .flags  = IORESOURCE_MEM,
 573         }, {
 574                 .name   = "sram",
 575                 .start  = KIRKWOOD_SRAM_PHYS_BASE,
 576                 .end    = KIRKWOOD_SRAM_PHYS_BASE + KIRKWOOD_SRAM_SIZE - 1,
 577                 .flags  = IORESOURCE_MEM,
 578         }, {
 579                 .name   = "crypto interrupt",
 580                 .start  = IRQ_KIRKWOOD_CRYPTO,
 581                 .end    = IRQ_KIRKWOOD_CRYPTO,
 582                 .flags  = IORESOURCE_IRQ,
 583         },
 584 };
 585
 586 static struct platform_device kirkwood_crypto_device = {
 587         .name           = "mv_crypto",
 588         .id             = -1,
 589         .num_resources  = ARRAY_SIZE(kirkwood_crypto_res),
 590         .resource       = kirkwood_crypto_res,
 591 };
 592
 593 void __init kirkwood_crypto_init(void)
 594 {
 595         kirkwood_clk_ctrl |= CGC_CRYPTO;
 596         platform_device_register(&kirkwood_crypto_device);
 597 }
 598
 599
 600 /*****************************************************************************
 601  * XOR
 602  ****************************************************************************/
 603 static struct mv_xor_platform_shared_data kirkwood_xor_shared_data = {
 604         .dram           = &kirkwood_mbus_dram_info,
 605 };
 606
 607 static u64 kirkwood_xor_dmamask = DMA_BIT_MASK(32);
 608
 609
 610 /*****************************************************************************
 611  * XOR0
 612  ****************************************************************************/
 613 static struct resource kirkwood_xor0_shared_resources[] = {
 614         {
 615                 .name   = "xor 0 low",
 616                 .start  = XOR0_PHYS_BASE,
 617                 .end    = XOR0_PHYS_BASE + 0xff,
 618                 .flags  = IORESOURCE_MEM,
 619         }, {
 620                 .name   = "xor 0 high",
 621                 .start  = XOR0_HIGH_PHYS_BASE,
 622                 .end    = XOR0_HIGH_PHYS_BASE + 0xff,
 623                 .flags  = IORESOURCE_MEM,
 624         },
 625 };
 626
 627 static struct platform_device kirkwood_xor0_shared = {
 628         .name           = MV_XOR_SHARED_NAME,
 629         .id             = 0,
 630         .dev            = {
 631                 .platform_data = &kirkwood_xor_shared_data,
 632         },
 633         .num_resources  = ARRAY_SIZE(kirkwood_xor0_shared_resources),
 634         .resource       = kirkwood_xor0_shared_resources,
 635 };
 636
 637 static struct resource kirkwood_xor00_resources[] = {
 638         [0] = {
 639                 .start  = IRQ_KIRKWOOD_XOR_00,
 640                 .end    = IRQ_KIRKWOOD_XOR_00,
 641                 .flags  = IORESOURCE_IRQ,
 642         },
 643 };
 644
 645 static struct mv_xor_platform_data kirkwood_xor00_data = {
 646         .shared         = &kirkwood_xor0_shared,
 647         .hw_id          = 0,
 648         .pool_size      = PAGE_SIZE,
 649 };
 650
 651 static struct platform_device kirkwood_xor00_channel = {
 652         .name           = MV_XOR_NAME,
 653         .id             = 0,
 654         .num_resources  = ARRAY_SIZE(kirkwood_xor00_resources),
 655         .resource       = kirkwood_xor00_resources,
 656         .dev            = {
 657                 .dma_mask               = &kirkwood_xor_dmamask,
 658                 .coherent_dma_mask      = DMA_BIT_MASK(64),
 659                 .platform_data          = (void *)&kirkwood_xor00_data,
 660         },
 661 };
 662
 663 static struct resource kirkwood_xor01_resources[] = {
 664         [0] = {
 665                 .start  = IRQ_KIRKWOOD_XOR_01,
 666                 .end    = IRQ_KIRKWOOD_XOR_01,
 667                 .flags  = IORESOURCE_IRQ,
 668         },
 669 };
 670
 671 static struct mv_xor_platform_data kirkwood_xor01_data = {
 672         .shared         = &kirkwood_xor0_shared,
 673         .hw_id          = 1,
 674         .pool_size      = PAGE_SIZE,
 675 };
 676
 677 static struct platform_device kirkwood_xor01_channel = {
 678         .name           = MV_XOR_NAME,
 679         .id             = 1,
 680         .num_resources  = ARRAY_SIZE(kirkwood_xor01_resources),
 681         .resource       = kirkwood_xor01_resources,
 682         .dev            = {
 683                 .dma_mask               = &kirkwood_xor_dmamask,
 684                 .coherent_dma_mask      = DMA_BIT_MASK(64),
 685                 .platform_data          = (void *)&kirkwood_xor01_data,
 686         },
 687 };
 688
 689 static void __init kirkwood_xor0_init(void)
 690 {
 691         kirkwood_clk_ctrl |= CGC_XOR0;
 692         platform_device_register(&kirkwood_xor0_shared);
 693
 694         /*
 695          * two engines can't do memset simultaneously, this limitation
 696          * satisfied by removing memset support from one of the engines.
 697          */
 698         dma_cap_set(DMA_MEMCPY, kirkwood_xor00_data.cap_mask);
 699         dma_cap_set(DMA_XOR, kirkwood_xor00_data.cap_mask);
 700         platform_device_register(&kirkwood_xor00_channel);
 701
 702         dma_cap_set(DMA_MEMCPY, kirkwood_xor01_data.cap_mask);
 703         dma_cap_set(DMA_MEMSET, kirkwood_xor01_data.cap_mask);
 704         dma_cap_set(DMA_XOR, kirkwood_xor01_data.cap_mask);
 705         platform_device_register(&kirkwood_xor01_channel);
 706 }
 707
 708
 709 /*****************************************************************************
 710  * XOR1
 711  ****************************************************************************/
 712 static struct resource kirkwood_xor1_shared_resources[] = {
 713         {
 714                 .name   = "xor 1 low",
 715                 .start  = XOR1_PHYS_BASE,
 716                 .end    = XOR1_PHYS_BASE + 0xff,
 717                 .flags  = IORESOURCE_MEM,
 718         }, {
 719                 .name   = "xor 1 high",
 720                 .start  = XOR1_HIGH_PHYS_BASE,
 721                 .end    = XOR1_HIGH_PHYS_BASE + 0xff,
 722                 .flags  = IORESOURCE_MEM,
 723         },
 724 };
 725
 726 static struct platform_device kirkwood_xor1_shared = {
 727         .name           = MV_XOR_SHARED_NAME,
 728         .id             = 1,
 729         .dev            = {
 730                 .platform_data = &kirkwood_xor_shared_data,
 731         },
 732         .num_resources  = ARRAY_SIZE(kirkwood_xor1_shared_resources),
 733         .resource       = kirkwood_xor1_shared_resources,
 734 };
 735
 736 static struct resource kirkwood_xor10_resources[] = {
 737         [0] = {
 738                 .start  = IRQ_KIRKWOOD_XOR_10,
 739                 .end    = IRQ_KIRKWOOD_XOR_10,
 740                 .flags  = IORESOURCE_IRQ,
 741         },
 742 };
 743
 744 static struct mv_xor_platform_data kirkwood_xor10_data = {
 745         .shared         = &kirkwood_xor1_shared,
 746         .hw_id          = 0,
 747         .pool_size      = PAGE_SIZE,
 748 };
 749
 750 static struct platform_device kirkwood_xor10_channel = {
 751         .name           = MV_XOR_NAME,
 752         .id             = 2,
 753         .num_resources  = ARRAY_SIZE(kirkwood_xor10_resources),
 754         .resource       = kirkwood_xor10_resources,
 755         .dev            = {
 756                 .dma_mask               = &kirkwood_xor_dmamask,
 757                 .coherent_dma_mask      = DMA_BIT_MASK(64),
 758                 .platform_data          = (void *)&kirkwood_xor10_data,
 759         },
 760 };
 761
 762 static struct resource kirkwood_xor11_resources[] = {
 763         [0] = {
 764                 .start  = IRQ_KIRKWOOD_XOR_11,
 765                 .end    = IRQ_KIRKWOOD_XOR_11,
 766                 .flags  = IORESOURCE_IRQ,
 767         },
 768 };
 769
 770 static struct mv_xor_platform_data kirkwood_xor11_data = {
 771         .shared         = &kirkwood_xor1_shared,
 772         .hw_id          = 1,
 773         .pool_size      = PAGE_SIZE,
 774 };
 775
 776 static struct platform_device kirkwood_xor11_channel = {
 777         .name           = MV_XOR_NAME,
 778         .id             = 3,
 779         .num_resources  = ARRAY_SIZE(kirkwood_xor11_resources),
 780         .resource       = kirkwood_xor11_resources,
 781         .dev            = {
 782                 .dma_mask               = &kirkwood_xor_dmamask,
 783                 .coherent_dma_mask      = DMA_BIT_MASK(64),
 784                 .platform_data          = (void *)&kirkwood_xor11_data,
 785         },
 786 };
 787
 788 static void __init kirkwood_xor1_init(void)
 789 {
 790         kirkwood_clk_ctrl |= CGC_XOR1;
 791         platform_device_register(&kirkwood_xor1_shared);
 792
 793         /*
 794          * two engines can't do memset simultaneously, this limitation
 795          * satisfied by removing memset support from one of the engines.
 796          */
 797         dma_cap_set(DMA_MEMCPY, kirkwood_xor10_data.cap_mask);
 798         dma_cap_set(DMA_XOR, kirkwood_xor10_data.cap_mask);
 799         platform_device_register(&kirkwood_xor10_channel);
 800
 801         dma_cap_set(DMA_MEMCPY, kirkwood_xor11_data.cap_mask);
 802         dma_cap_set(DMA_MEMSET, kirkwood_xor11_data.cap_mask);
 803         dma_cap_set(DMA_XOR, kirkwood_xor11_data.cap_mask);
 804         platform_device_register(&kirkwood_xor11_channel);
 805 }
 806
 807
 808 /*****************************************************************************
 809  * Watchdog
 810  ****************************************************************************/
 811 static struct orion_wdt_platform_data kirkwood_wdt_data = {
 812         .tclk           = 0,
 813 };
 814
 815 static struct platform_device kirkwood_wdt_device = {
 816         .name           = "orion_wdt",
 817         .id             = -1,
 818         .dev            = {
 819                 .platform_data  = &kirkwood_wdt_data,
 820         },
 821         .num_resources  = 0,
 822 };
 823
 824 static void __init kirkwood_wdt_init(void)
 825 {
 826         kirkwood_wdt_data.tclk = kirkwood_tclk;
 827         platform_device_register(&kirkwood_wdt_device);
 828 }
 829
 830
 831 /*****************************************************************************
 832  * Time handling
 833  ****************************************************************************/
 834 int kirkwood_tclk;
 835
 836 int __init kirkwood_find_tclk(void)
 837 {
 838         u32 dev, rev;
 839
 840         kirkwood_pcie_id(&dev, &rev);
 841         if (dev == MV88F6281_DEV_ID && (rev == MV88F6281_REV_A0 ||
 842                                         rev == MV88F6281_REV_A1))
 843                 return 200000000;
 844
 845         return 166666667;
 846 }
 847
 848 static void kirkwood_timer_init(void)
 849 {
 850         kirkwood_tclk = kirkwood_find_tclk();
 851         orion_time_init(IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk);
 852 }
 853
 854 struct sys_timer kirkwood_timer = {
 855         .init = kirkwood_timer_init,
 856 };
 857
 858
 859 /*****************************************************************************
 860  * General
 861  ****************************************************************************/
 862 /*
 863  * Identify device ID and revision.
 864  */
 865 static char * __init kirkwood_id(void)
 866 {
 867         u32 dev, rev;
 868
 869         kirkwood_pcie_id(&dev, &rev);
 870
 871         if (dev == MV88F6281_DEV_ID) {
 872                 if (rev == MV88F6281_REV_Z0)
 873                         return "MV88F6281-Z0";
 874                 else if (rev == MV88F6281_REV_A0)
 875                         return "MV88F6281-A0";
 876                 else if (rev == MV88F6281_REV_A1)
 877                         return "MV88F6281-A1";
 878                 else
 879                         return "MV88F6281-Rev-Unsupported";
 880         } else if (dev == MV88F6192_DEV_ID) {
 881                 if (rev == MV88F6192_REV_Z0)
 882                         return "MV88F6192-Z0";
 883                 else if (rev == MV88F6192_REV_A0)
 884                         return "MV88F6192-A0";
 885                 else
 886                         return "MV88F6192-Rev-Unsupported";
 887         } else if (dev == MV88F6180_DEV_ID) {
 888                 if (rev == MV88F6180_REV_A0)
 889                         return "MV88F6180-Rev-A0";
 890                 else
 891                         return "MV88F6180-Rev-Unsupported";
 892         } else {
 893                 return "Device-Unknown";
 894         }
 895 }
 896
 897 static void __init kirkwood_l2_init(void)
 898 {
 899 #ifdef CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH
 900         writel(readl(L2_CONFIG_REG) | L2_WRITETHROUGH, L2_CONFIG_REG);
 901         feroceon_l2_init(1);
 902 #else
 903         writel(readl(L2_CONFIG_REG) & ~L2_WRITETHROUGH, L2_CONFIG_REG);
 904         feroceon_l2_init(0);
 905 #endif
 906 }
 907
 908 void __init kirkwood_init(void)
 909 {
 910         printk(KERN_INFO "Kirkwood: %s, TCLK=%d.\n",
 911                 kirkwood_id(), kirkwood_tclk);
 912         kirkwood_ge00_shared_data.t_clk = kirkwood_tclk;
 913         kirkwood_ge01_shared_data.t_clk = kirkwood_tclk;
 914         kirkwood_spi_plat_data.tclk = kirkwood_tclk;
 915         kirkwood_uart0_data[0].uartclk = kirkwood_tclk;
 916         kirkwood_uart1_data[0].uartclk = kirkwood_tclk;
 917
 918         kirkwood_setup_cpu_mbus();
 919
 920 #ifdef CONFIG_CACHE_FEROCEON_L2
 921         kirkwood_l2_init();
 922 #endif
 923
 924         /* internal devices that every board has */
 925         kirkwood_rtc_init();
 926         kirkwood_wdt_init();
 927         kirkwood_xor0_init();
 928         kirkwood_xor1_init();
 929         kirkwood_crypto_init();
 930 }
 931
 932 static int __init kirkwood_clock_gate(void)
 933 {
 934         unsigned int curr = readl(CLOCK_GATING_CTRL);
 935
 936         printk(KERN_DEBUG "Gating clock of unused units\n");
 937         printk(KERN_DEBUG "before: 0x%08x\n", curr);
 938
 939         /* Make sure those units are accessible */
 940         writel(curr | CGC_SATA0 | CGC_SATA1 | CGC_PEX0, CLOCK_GATING_CTRL);
 941
 942         /* For SATA: first shutdown the phy */
 943         if (!(kirkwood_clk_ctrl & CGC_SATA0)) {
 944                 /* Disable PLL and IVREF */
 945                 writel(readl(SATA0_PHY_MODE_2) & ~0xf, SATA0_PHY_MODE_2);
 946                 /* Disable PHY */
 947                 writel(readl(SATA0_IF_CTRL) | 0x200, SATA0_IF_CTRL);
 948         }
 949         if (!(kirkwood_clk_ctrl & CGC_SATA1)) {
 950                 /* Disable PLL and IVREF */
 951                 writel(readl(SATA1_PHY_MODE_2) & ~0xf, SATA1_PHY_MODE_2);
 952                 /* Disable PHY */
 953                 writel(readl(SATA1_IF_CTRL) | 0x200, SATA1_IF_CTRL);
 954         }
 955
 956         /* For PCIe: first shutdown the phy */
 957         if (!(kirkwood_clk_ctrl & CGC_PEX0)) {
 958                 writel(readl(PCIE_LINK_CTRL) | 0x10, PCIE_LINK_CTRL);
 959                 while (1)
 960                         if (readl(PCIE_STATUS) & 0x1)
 961                                 break;
 962                 writel(readl(PCIE_LINK_CTRL) & ~0x10, PCIE_LINK_CTRL);
 963         }
 964
 965         /* Now gate clock the required units */
 966         writel(kirkwood_clk_ctrl, CLOCK_GATING_CTRL);
 967         printk(KERN_DEBUG " after: 0x%08x\n", readl(CLOCK_GATING_CTRL));
 968
 969         return 0;
 970 }
 971 late_initcall(kirkwood_clock_gate);