Merge git://git.kernel.org/pub/scm/linux/kernel/git/mason/btrfs-unstable
[pandora-kernel.git] / arch / arm / mach-iop32x / iq80321.c
1 /*
2  * arch/arm/mach-iop32x/iq80321.c
3  *
4  * Board support code for the Intel IQ80321 platform.
5  *
6  * Author: Rory Bolt <rorybolt@pacbell.net>
7  * Copyright (C) 2002 Rory Bolt
8  * Copyright (C) 2004 Intel Corp.
9  *
10  * This program is free software; you can redistribute it and/or modify it
11  * under the terms of the GNU General Public License as published by the
12  * Free Software Foundation; either version 2 of the License, or (at your
13  * option) any later version.
14  */
15
16 #include <linux/mm.h>
17 #include <linux/init.h>
18 #include <linux/kernel.h>
19 #include <linux/pci.h>
20 #include <linux/string.h>
21 #include <linux/slab.h>
22 #include <linux/serial_core.h>
23 #include <linux/serial_8250.h>
24 #include <linux/mtd/physmap.h>
25 #include <linux/platform_device.h>
26 #include <linux/io.h>
27 #include <mach/hardware.h>
28 #include <asm/irq.h>
29 #include <asm/mach/arch.h>
30 #include <asm/mach/map.h>
31 #include <asm/mach/pci.h>
32 #include <asm/mach/time.h>
33 #include <asm/mach-types.h>
34 #include <asm/page.h>
35 #include <asm/pgtable.h>
36 #include <mach/time.h>
37
38 /*
39  * IQ80321 timer tick configuration.
40  */
41 static void __init iq80321_timer_init(void)
42 {
43         /* 33.333 MHz crystal.  */
44         iop_init_time(200000000);
45 }
46
47 static struct sys_timer iq80321_timer = {
48         .init           = iq80321_timer_init,
49 };
50
51
52 /*
53  * IQ80321 I/O.
54  */
55 static struct map_desc iq80321_io_desc[] __initdata = {
56         {       /* on-board devices */
57                 .virtual        = IQ80321_UART,
58                 .pfn            = __phys_to_pfn(IQ80321_UART),
59                 .length         = 0x00100000,
60                 .type           = MT_DEVICE,
61         },
62 };
63
64 void __init iq80321_map_io(void)
65 {
66         iop3xx_map_io();
67         iotable_init(iq80321_io_desc, ARRAY_SIZE(iq80321_io_desc));
68 }
69
70
71 /*
72  * IQ80321 PCI.
73  */
74 static int __init
75 iq80321_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
76 {
77         int irq;
78
79         if ((slot == 2 || slot == 6) && pin == 1) {
80                 /* PCI-X Slot INTA */
81                 irq = IRQ_IOP32X_XINT2;
82         } else if ((slot == 2 || slot == 6) && pin == 2) {
83                 /* PCI-X Slot INTA */
84                 irq = IRQ_IOP32X_XINT3;
85         } else if ((slot == 2 || slot == 6) && pin == 3) {
86                 /* PCI-X Slot INTA */
87                 irq = IRQ_IOP32X_XINT0;
88         } else if ((slot == 2 || slot == 6) && pin == 4) {
89                 /* PCI-X Slot INTA */
90                 irq = IRQ_IOP32X_XINT1;
91         } else if (slot == 4 || slot == 8) {
92                 /* Gig-E */
93                 irq = IRQ_IOP32X_XINT0;
94         } else {
95                 printk(KERN_ERR "iq80321_pci_map_irq() called for unknown "
96                         "device PCI:%d:%d:%d\n", dev->bus->number,
97                         PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
98                 irq = -1;
99         }
100
101         return irq;
102 }
103
104 static struct hw_pci iq80321_pci __initdata = {
105         .swizzle        = pci_std_swizzle,
106         .nr_controllers = 1,
107         .setup          = iop3xx_pci_setup,
108         .preinit        = iop3xx_pci_preinit_cond,
109         .scan           = iop3xx_pci_scan_bus,
110         .map_irq        = iq80321_pci_map_irq,
111 };
112
113 static int __init iq80321_pci_init(void)
114 {
115         if ((iop3xx_get_init_atu() == IOP3XX_INIT_ATU_ENABLE) &&
116                 machine_is_iq80321())
117                 pci_common_init(&iq80321_pci);
118
119         return 0;
120 }
121
122 subsys_initcall(iq80321_pci_init);
123
124
125 /*
126  * IQ80321 machine initialisation.
127  */
128 static struct physmap_flash_data iq80321_flash_data = {
129         .width          = 1,
130 };
131
132 static struct resource iq80321_flash_resource = {
133         .start          = 0xf0000000,
134         .end            = 0xf07fffff,
135         .flags          = IORESOURCE_MEM,
136 };
137
138 static struct platform_device iq80321_flash_device = {
139         .name           = "physmap-flash",
140         .id             = 0,
141         .dev            = {
142                 .platform_data  = &iq80321_flash_data,
143         },
144         .num_resources  = 1,
145         .resource       = &iq80321_flash_resource,
146 };
147
148 static struct plat_serial8250_port iq80321_serial_port[] = {
149         {
150                 .mapbase        = IQ80321_UART,
151                 .membase        = (char *)IQ80321_UART,
152                 .irq            = IRQ_IOP32X_XINT1,
153                 .flags          = UPF_SKIP_TEST,
154                 .iotype         = UPIO_MEM,
155                 .regshift       = 0,
156                 .uartclk        = 1843200,
157         },
158         { },
159 };
160
161 static struct resource iq80321_uart_resource = {
162         .start          = IQ80321_UART,
163         .end            = IQ80321_UART + 7,
164         .flags          = IORESOURCE_MEM,
165 };
166
167 static struct platform_device iq80321_serial_device = {
168         .name           = "serial8250",
169         .id             = PLAT8250_DEV_PLATFORM,
170         .dev            = {
171                 .platform_data          = iq80321_serial_port,
172         },
173         .num_resources  = 1,
174         .resource       = &iq80321_uart_resource,
175 };
176
177 static void __init iq80321_init_machine(void)
178 {
179         platform_device_register(&iop3xx_i2c0_device);
180         platform_device_register(&iop3xx_i2c1_device);
181         platform_device_register(&iq80321_flash_device);
182         platform_device_register(&iq80321_serial_device);
183         platform_device_register(&iop3xx_dma_0_channel);
184         platform_device_register(&iop3xx_dma_1_channel);
185         platform_device_register(&iop3xx_aau_channel);
186 }
187
188 MACHINE_START(IQ80321, "Intel IQ80321")
189         /* Maintainer: Intel Corp. */
190         .phys_io        = IQ80321_UART,
191         .io_pg_offst    = ((IQ80321_UART) >> 18) & 0xfffc,
192         .boot_params    = 0xa0000100,
193         .map_io         = iq80321_map_io,
194         .init_irq       = iop32x_init_irq,
195         .timer          = &iq80321_timer,
196         .init_machine   = iq80321_init_machine,
197 MACHINE_END