Merge branch 'x86/fpu' into x86/urgent
[pandora-kernel.git] / arch / arm / mach-iop32x / include / mach / entry-macro.S
1 /*
2  * arch/arm/mach-iop32x/include/mach/entry-macro.S
3  *
4  * Low-level IRQ helper macros for IOP32x-based platforms
5  *
6  * This file is licensed under the terms of the GNU General Public
7  * License version 2. This program is licensed "as is" without any
8  * warranty of any kind, whether express or implied.
9  */
10 #include <mach/iop32x.h>
11
12         .macro  disable_fiq
13         .endm
14
15         .macro get_irqnr_preamble, base, tmp
16         mrc     p15, 0, \tmp, c15, c1, 0
17         orr     \tmp, \tmp, #(1 << 6)
18         mcr     p15, 0, \tmp, c15, c1, 0        @ Enable cp6 access
19         mrc     p15, 0, \tmp, c15, c1, 0
20         mov     \tmp, \tmp
21         sub     pc, pc, #4                      @ cp_wait
22         .endm
23
24         .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
25         mrc     p6, 0, \irqstat, c8, c0, 0      @ Read IINTSRC
26         cmp     \irqstat, #0
27         clzne   \irqnr, \irqstat
28         rsbne   \irqnr, \irqnr, #31
29         .endm
30
31         .macro arch_ret_to_user, tmp1, tmp2
32         mrc     p15, 0, \tmp1, c15, c1, 0
33         ands    \tmp2, \tmp1, #(1 << 6)
34         bicne   \tmp1, \tmp1, #(1 << 6)
35         mcrne   p15, 0, \tmp1, c15, c1, 0       @ Disable cp6 access
36         .endm