arch/arm/mach-integrator/core.c

   1 /*
   2  *  linux/arch/arm/mach-integrator/core.c
   3  *
   4  *  Copyright (C) 2000-2003 Deep Blue Solutions Ltd
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2, as
   8  * published by the Free Software Foundation.
   9  */
  10 #include <linux/types.h>
  11 #include <linux/kernel.h>
  12 #include <linux/init.h>
  13 #include <linux/device.h>
  14 #include <linux/spinlock.h>
  15 #include <linux/interrupt.h>
  16 #include <linux/irq.h>
  17 #include <linux/memblock.h>
  18 #include <linux/sched.h>
  19 #include <linux/smp.h>
  20 #include <linux/termios.h>
  21 #include <linux/amba/bus.h>
  22 #include <linux/amba/serial.h>
  23 #include <linux/io.h>
  24 #include <linux/clkdev.h>
  25
  26 #include <mach/hardware.h>
  27 #include <mach/platform.h>
  28 #include <asm/irq.h>
  29 #include <mach/cm.h>
  30 #include <asm/system.h>
  31 #include <asm/leds.h>
  32 #include <asm/mach/time.h>
  33 #include <asm/pgtable.h>
  34
  35 static struct amba_pl010_data integrator_uart_data;
  36
  37 static struct amba_device rtc_device = {
  38         .dev            = {
  39                 .init_name = "mb:15",
  40         },
  41         .res            = {
  42                 .start  = INTEGRATOR_RTC_BASE,
  43                 .end    = INTEGRATOR_RTC_BASE + SZ_4K - 1,
  44                 .flags  = IORESOURCE_MEM,
  45         },
  46         .irq            = { IRQ_RTCINT, NO_IRQ },
  47         .periphid       = 0x00041030,
  48 };
  49
  50 static struct amba_device uart0_device = {
  51         .dev            = {
  52                 .init_name = "mb:16",
  53                 .platform_data = &integrator_uart_data,
  54         },
  55         .res            = {
  56                 .start  = INTEGRATOR_UART0_BASE,
  57                 .end    = INTEGRATOR_UART0_BASE + SZ_4K - 1,
  58                 .flags  = IORESOURCE_MEM,
  59         },
  60         .irq            = { IRQ_UARTINT0, NO_IRQ },
  61         .periphid       = 0x0041010,
  62 };
  63
  64 static struct amba_device uart1_device = {
  65         .dev            = {
  66                 .init_name = "mb:17",
  67                 .platform_data = &integrator_uart_data,
  68         },
  69         .res            = {
  70                 .start  = INTEGRATOR_UART1_BASE,
  71                 .end    = INTEGRATOR_UART1_BASE + SZ_4K - 1,
  72                 .flags  = IORESOURCE_MEM,
  73         },
  74         .irq            = { IRQ_UARTINT1, NO_IRQ },
  75         .periphid       = 0x0041010,
  76 };
  77
  78 static struct amba_device kmi0_device = {
  79         .dev            = {
  80                 .init_name = "mb:18",
  81         },
  82         .res            = {
  83                 .start  = KMI0_BASE,
  84                 .end    = KMI0_BASE + SZ_4K - 1,
  85                 .flags  = IORESOURCE_MEM,
  86         },
  87         .irq            = { IRQ_KMIINT0, NO_IRQ },
  88         .periphid       = 0x00041050,
  89 };
  90
  91 static struct amba_device kmi1_device = {
  92         .dev            = {
  93                 .init_name = "mb:19",
  94         },
  95         .res            = {
  96                 .start  = KMI1_BASE,
  97                 .end    = KMI1_BASE + SZ_4K - 1,
  98                 .flags  = IORESOURCE_MEM,
  99         },
 100         .irq            = { IRQ_KMIINT1, NO_IRQ },
 101         .periphid       = 0x00041050,
 102 };
 103
 104 static struct amba_device *amba_devs[] __initdata = {
 105         &rtc_device,
 106         &uart0_device,
 107         &uart1_device,
 108         &kmi0_device,
 109         &kmi1_device,
 110 };
 111
 112 /*
 113  * These are fixed clocks.
 114  */
 115 static struct clk clk24mhz = {
 116         .rate   = 24000000,
 117 };
 118
 119 static struct clk uartclk = {
 120         .rate   = 14745600,
 121 };
 122
 123 static struct clk dummy_apb_pclk;
 124
 125 static struct clk_lookup lookups[] = {
 126         {       /* Bus clock */
 127                 .con_id         = "apb_pclk",
 128                 .clk            = &dummy_apb_pclk,
 129         }, {    /* UART0 */
 130                 .dev_id         = "mb:16",
 131                 .clk            = &uartclk,
 132         }, {    /* UART1 */
 133                 .dev_id         = "mb:17",
 134                 .clk            = &uartclk,
 135         }, {    /* KMI0 */
 136                 .dev_id         = "mb:18",
 137                 .clk            = &clk24mhz,
 138         }, {    /* KMI1 */
 139                 .dev_id         = "mb:19",
 140                 .clk            = &clk24mhz,
 141         }, {    /* MMCI - IntegratorCP */
 142                 .dev_id         = "mb:1c",
 143                 .clk            = &uartclk,
 144         }
 145 };
 146
 147 static int __init integrator_init(void)
 148 {
 149         int i;
 150
 151         clkdev_add_table(lookups, ARRAY_SIZE(lookups));
 152
 153         for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
 154                 struct amba_device *d = amba_devs[i];
 155                 amba_device_register(d, &iomem_resource);
 156         }
 157
 158         return 0;
 159 }
 160
 161 arch_initcall(integrator_init);
 162
 163 /*
 164  * On the Integrator platform, the port RTS and DTR are provided by
 165  * bits in the following SC_CTRLS register bits:
 166  *        RTS  DTR
 167  *  UART0  7    6
 168  *  UART1  5    4
 169  */
 170 #define SC_CTRLC        IO_ADDRESS(INTEGRATOR_SC_CTRLC)
 171 #define SC_CTRLS        IO_ADDRESS(INTEGRATOR_SC_CTRLS)
 172
 173 static void integrator_uart_set_mctrl(struct amba_device *dev, void __iomem *base, unsigned int mctrl)
 174 {
 175         unsigned int ctrls = 0, ctrlc = 0, rts_mask, dtr_mask;
 176
 177         if (dev == &uart0_device) {
 178                 rts_mask = 1 << 4;
 179                 dtr_mask = 1 << 5;
 180         } else {
 181                 rts_mask = 1 << 6;
 182                 dtr_mask = 1 << 7;
 183         }
 184
 185         if (mctrl & TIOCM_RTS)
 186                 ctrlc |= rts_mask;
 187         else
 188                 ctrls |= rts_mask;
 189
 190         if (mctrl & TIOCM_DTR)
 191                 ctrlc |= dtr_mask;
 192         else
 193                 ctrls |= dtr_mask;
 194
 195         __raw_writel(ctrls, SC_CTRLS);
 196         __raw_writel(ctrlc, SC_CTRLC);
 197 }
 198
 199 static struct amba_pl010_data integrator_uart_data = {
 200         .set_mctrl = integrator_uart_set_mctrl,
 201 };
 202
 203 #define CM_CTRL IO_ADDRESS(INTEGRATOR_HDR_CTRL)
 204
 205 static DEFINE_SPINLOCK(cm_lock);
 206
 207 /**
 208  * cm_control - update the CM_CTRL register.
 209  * @mask: bits to change
 210  * @set: bits to set
 211  */
 212 void cm_control(u32 mask, u32 set)
 213 {
 214         unsigned long flags;
 215         u32 val;
 216
 217         spin_lock_irqsave(&cm_lock, flags);
 218         val = readl(CM_CTRL) & ~mask;
 219         writel(val | set, CM_CTRL);
 220         spin_unlock_irqrestore(&cm_lock, flags);
 221 }
 222
 223 EXPORT_SYMBOL(cm_control);
 224
 225 /*
 226  * We need to stop things allocating the low memory; ideally we need a
 227  * better implementation of GFP_DMA which does not assume that DMA-able
 228  * memory starts at zero.
 229  */
 230 void __init integrator_reserve(void)
 231 {
 232         memblock_reserve(PHYS_OFFSET, __pa(swapper_pg_dir) - PHYS_OFFSET);
 233 }