Merge branch 'omap4-i2c-init' into omap-for-linus
[pandora-kernel.git] / arch / arm / mach-integrator / core.c
1 /*
2  *  linux/arch/arm/mach-integrator/core.c
3  *
4  *  Copyright (C) 2000-2003 Deep Blue Solutions Ltd
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2, as
8  * published by the Free Software Foundation.
9  */
10 #include <linux/types.h>
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/device.h>
14 #include <linux/spinlock.h>
15 #include <linux/interrupt.h>
16 #include <linux/irq.h>
17 #include <linux/sched.h>
18 #include <linux/smp.h>
19 #include <linux/termios.h>
20 #include <linux/amba/bus.h>
21 #include <linux/amba/serial.h>
22 #include <linux/io.h>
23
24 #include <asm/clkdev.h>
25 #include <mach/clkdev.h>
26 #include <mach/hardware.h>
27 #include <mach/platform.h>
28 #include <asm/irq.h>
29 #include <mach/cm.h>
30 #include <asm/system.h>
31 #include <asm/leds.h>
32 #include <asm/mach/time.h>
33
34 static struct amba_pl010_data integrator_uart_data;
35
36 static struct amba_device rtc_device = {
37         .dev            = {
38                 .init_name = "mb:15",
39         },
40         .res            = {
41                 .start  = INTEGRATOR_RTC_BASE,
42                 .end    = INTEGRATOR_RTC_BASE + SZ_4K - 1,
43                 .flags  = IORESOURCE_MEM,
44         },
45         .irq            = { IRQ_RTCINT, NO_IRQ },
46         .periphid       = 0x00041030,
47 };
48
49 static struct amba_device uart0_device = {
50         .dev            = {
51                 .init_name = "mb:16",
52                 .platform_data = &integrator_uart_data,
53         },
54         .res            = {
55                 .start  = INTEGRATOR_UART0_BASE,
56                 .end    = INTEGRATOR_UART0_BASE + SZ_4K - 1,
57                 .flags  = IORESOURCE_MEM,
58         },
59         .irq            = { IRQ_UARTINT0, NO_IRQ },
60         .periphid       = 0x0041010,
61 };
62
63 static struct amba_device uart1_device = {
64         .dev            = {
65                 .init_name = "mb:17",
66                 .platform_data = &integrator_uart_data,
67         },
68         .res            = {
69                 .start  = INTEGRATOR_UART1_BASE,
70                 .end    = INTEGRATOR_UART1_BASE + SZ_4K - 1,
71                 .flags  = IORESOURCE_MEM,
72         },
73         .irq            = { IRQ_UARTINT1, NO_IRQ },
74         .periphid       = 0x0041010,
75 };
76
77 static struct amba_device kmi0_device = {
78         .dev            = {
79                 .init_name = "mb:18",
80         },
81         .res            = {
82                 .start  = KMI0_BASE,
83                 .end    = KMI0_BASE + SZ_4K - 1,
84                 .flags  = IORESOURCE_MEM,
85         },
86         .irq            = { IRQ_KMIINT0, NO_IRQ },
87         .periphid       = 0x00041050,
88 };
89
90 static struct amba_device kmi1_device = {
91         .dev            = {
92                 .init_name = "mb:19",
93         },
94         .res            = {
95                 .start  = KMI1_BASE,
96                 .end    = KMI1_BASE + SZ_4K - 1,
97                 .flags  = IORESOURCE_MEM,
98         },
99         .irq            = { IRQ_KMIINT1, NO_IRQ },
100         .periphid       = 0x00041050,
101 };
102
103 static struct amba_device *amba_devs[] __initdata = {
104         &rtc_device,
105         &uart0_device,
106         &uart1_device,
107         &kmi0_device,
108         &kmi1_device,
109 };
110
111 /*
112  * These are fixed clocks.
113  */
114 static struct clk clk24mhz = {
115         .rate   = 24000000,
116 };
117
118 static struct clk uartclk = {
119         .rate   = 14745600,
120 };
121
122 static struct clk_lookup lookups[] = {
123         {       /* UART0 */
124                 .dev_id         = "mb:16",
125                 .clk            = &uartclk,
126         }, {    /* UART1 */
127                 .dev_id         = "mb:17",
128                 .clk            = &uartclk,
129         }, {    /* KMI0 */
130                 .dev_id         = "mb:18",
131                 .clk            = &clk24mhz,
132         }, {    /* KMI1 */
133                 .dev_id         = "mb:19",
134                 .clk            = &clk24mhz,
135         }, {    /* MMCI - IntegratorCP */
136                 .dev_id         = "mb:1c",
137                 .clk            = &uartclk,
138         }
139 };
140
141 static int __init integrator_init(void)
142 {
143         int i;
144
145         clkdev_add_table(lookups, ARRAY_SIZE(lookups));
146
147         for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
148                 struct amba_device *d = amba_devs[i];
149                 amba_device_register(d, &iomem_resource);
150         }
151
152         return 0;
153 }
154
155 arch_initcall(integrator_init);
156
157 /*
158  * On the Integrator platform, the port RTS and DTR are provided by
159  * bits in the following SC_CTRLS register bits:
160  *        RTS  DTR
161  *  UART0  7    6
162  *  UART1  5    4
163  */
164 #define SC_CTRLC        IO_ADDRESS(INTEGRATOR_SC_CTRLC)
165 #define SC_CTRLS        IO_ADDRESS(INTEGRATOR_SC_CTRLS)
166
167 static void integrator_uart_set_mctrl(struct amba_device *dev, void __iomem *base, unsigned int mctrl)
168 {
169         unsigned int ctrls = 0, ctrlc = 0, rts_mask, dtr_mask;
170
171         if (dev == &uart0_device) {
172                 rts_mask = 1 << 4;
173                 dtr_mask = 1 << 5;
174         } else {
175                 rts_mask = 1 << 6;
176                 dtr_mask = 1 << 7;
177         }
178
179         if (mctrl & TIOCM_RTS)
180                 ctrlc |= rts_mask;
181         else
182                 ctrls |= rts_mask;
183
184         if (mctrl & TIOCM_DTR)
185                 ctrlc |= dtr_mask;
186         else
187                 ctrls |= dtr_mask;
188
189         __raw_writel(ctrls, SC_CTRLS);
190         __raw_writel(ctrlc, SC_CTRLC);
191 }
192
193 static struct amba_pl010_data integrator_uart_data = {
194         .set_mctrl = integrator_uart_set_mctrl,
195 };
196
197 #define CM_CTRL IO_ADDRESS(INTEGRATOR_HDR_CTRL)
198
199 static DEFINE_SPINLOCK(cm_lock);
200
201 /**
202  * cm_control - update the CM_CTRL register.
203  * @mask: bits to change
204  * @set: bits to set
205  */
206 void cm_control(u32 mask, u32 set)
207 {
208         unsigned long flags;
209         u32 val;
210
211         spin_lock_irqsave(&cm_lock, flags);
212         val = readl(CM_CTRL) & ~mask;
213         writel(val | set, CM_CTRL);
214         spin_unlock_irqrestore(&cm_lock, flags);
215 }
216
217 EXPORT_SYMBOL(cm_control);