arch/arm/mach-imx/mach-mxt_td60.c

   1 /*
   2  *  Copyright (C) 2000 Deep Blue Solutions Ltd
   3  *  Copyright (C) 2002 Shane Nay (shane@minirl.com)
   4  *  Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  */
  16
  17 #include <linux/platform_device.h>
  18 #include <linux/mtd/mtd.h>
  19 #include <linux/mtd/map.h>
  20 #include <linux/mtd/partitions.h>
  21 #include <linux/mtd/physmap.h>
  22 #include <linux/i2c.h>
  23 #include <linux/irq.h>
  24 #include <mach/common.h>
  25 #include <mach/hardware.h>
  26 #include <asm/mach-types.h>
  27 #include <asm/mach/arch.h>
  28 #include <asm/mach/time.h>
  29 #include <asm/mach/map.h>
  30 #include <linux/gpio.h>
  31 #include <mach/iomux-mx27.h>
  32 #include <mach/mxc_nand.h>
  33 #include <linux/i2c/pca953x.h>
  34
  35 #include "devices-imx27.h"
  36
  37 static const int mxt_td60_pins[] __initconst = {
  38         /* UART0 */
  39         PE12_PF_UART1_TXD,
  40         PE13_PF_UART1_RXD,
  41         PE14_PF_UART1_CTS,
  42         PE15_PF_UART1_RTS,
  43         /* UART1 */
  44         PE3_PF_UART2_CTS,
  45         PE4_PF_UART2_RTS,
  46         PE6_PF_UART2_TXD,
  47         PE7_PF_UART2_RXD,
  48         /* UART2 */
  49         PE8_PF_UART3_TXD,
  50         PE9_PF_UART3_RXD,
  51         PE10_PF_UART3_CTS,
  52         PE11_PF_UART3_RTS,
  53         /* FEC */
  54         PD0_AIN_FEC_TXD0,
  55         PD1_AIN_FEC_TXD1,
  56         PD2_AIN_FEC_TXD2,
  57         PD3_AIN_FEC_TXD3,
  58         PD4_AOUT_FEC_RX_ER,
  59         PD5_AOUT_FEC_RXD1,
  60         PD6_AOUT_FEC_RXD2,
  61         PD7_AOUT_FEC_RXD3,
  62         PD8_AF_FEC_MDIO,
  63         PD9_AIN_FEC_MDC,
  64         PD10_AOUT_FEC_CRS,
  65         PD11_AOUT_FEC_TX_CLK,
  66         PD12_AOUT_FEC_RXD0,
  67         PD13_AOUT_FEC_RX_DV,
  68         PD14_AOUT_FEC_RX_CLK,
  69         PD15_AOUT_FEC_COL,
  70         PD16_AIN_FEC_TX_ER,
  71         PF23_AIN_FEC_TX_EN,
  72         /* I2C1 */
  73         PD17_PF_I2C_DATA,
  74         PD18_PF_I2C_CLK,
  75         /* I2C2 */
  76         PC5_PF_I2C2_SDA,
  77         PC6_PF_I2C2_SCL,
  78         /* FB */
  79         PA5_PF_LSCLK,
  80         PA6_PF_LD0,
  81         PA7_PF_LD1,
  82         PA8_PF_LD2,
  83         PA9_PF_LD3,
  84         PA10_PF_LD4,
  85         PA11_PF_LD5,
  86         PA12_PF_LD6,
  87         PA13_PF_LD7,
  88         PA14_PF_LD8,
  89         PA15_PF_LD9,
  90         PA16_PF_LD10,
  91         PA17_PF_LD11,
  92         PA18_PF_LD12,
  93         PA19_PF_LD13,
  94         PA20_PF_LD14,
  95         PA21_PF_LD15,
  96         PA22_PF_LD16,
  97         PA23_PF_LD17,
  98         PA25_PF_CLS,
  99         PA27_PF_SPL_SPR,
 100         PA28_PF_HSYNC,
 101         PA29_PF_VSYNC,
 102         PA30_PF_CONTRAST,
 103         PA31_PF_OE_ACD,
 104         /* OWIRE */
 105         PE16_AF_OWIRE,
 106         /* SDHC1*/
 107         PE18_PF_SD1_D0,
 108         PE19_PF_SD1_D1,
 109         PE20_PF_SD1_D2,
 110         PE21_PF_SD1_D3,
 111         PE22_PF_SD1_CMD,
 112         PE23_PF_SD1_CLK,
 113         PF8_AF_ATA_IORDY,
 114         /* SDHC2*/
 115         PB4_PF_SD2_D0,
 116         PB5_PF_SD2_D1,
 117         PB6_PF_SD2_D2,
 118         PB7_PF_SD2_D3,
 119         PB8_PF_SD2_CMD,
 120         PB9_PF_SD2_CLK,
 121 };
 122
 123 static const struct mxc_nand_platform_data
 124 mxt_td60_nand_board_info __initconst = {
 125         .width = 1,
 126         .hw_ecc = 1,
 127 };
 128
 129 static const struct imxi2c_platform_data mxt_td60_i2c0_data __initconst = {
 130         .bitrate = 100000,
 131 };
 132
 133 /* PCA9557 */
 134 static int mxt_td60_pca9557_setup(struct i2c_client *client,
 135                                 unsigned gpio_base, unsigned ngpio,
 136                                 void *context)
 137 {
 138         static int mxt_td60_gpio_value[] = {
 139                 -1, -1, -1, -1, -1, -1, -1, 1
 140         };
 141         int n;
 142
 143         for (n = 0; n < ARRAY_SIZE(mxt_td60_gpio_value); ++n) {
 144                 gpio_request(gpio_base + n, "MXT_TD60 GPIO Exp");
 145                 if (mxt_td60_gpio_value[n] < 0)
 146                         gpio_direction_input(gpio_base + n);
 147                 else
 148                         gpio_direction_output(gpio_base + n,
 149                                                 mxt_td60_gpio_value[n]);
 150                 gpio_export(gpio_base + n, 0);
 151         }
 152
 153         return 0;
 154 }
 155
 156 static struct pca953x_platform_data mxt_td60_pca9557_pdata = {
 157         .gpio_base      = 240, /* place PCA9557 after all MX27 gpio pins */
 158         .invert         = 0, /* Do not invert */
 159         .setup          = mxt_td60_pca9557_setup,
 160 };
 161
 162 static struct i2c_board_info mxt_td60_i2c_devices[] = {
 163         {
 164                 I2C_BOARD_INFO("pca9557", 0x18),
 165                 .platform_data = &mxt_td60_pca9557_pdata,
 166         },
 167 };
 168
 169 static const struct imxi2c_platform_data mxt_td60_i2c1_data __initconst = {
 170         .bitrate = 100000,
 171 };
 172
 173 static struct i2c_board_info mxt_td60_i2c2_devices[] = {
 174 };
 175
 176 static struct imx_fb_videomode mxt_td60_modes[] = {
 177         {
 178                 .mode = {
 179                         .name           = "Chimei LW700AT9003",
 180                         .refresh        = 60,
 181                         .xres           = 800,
 182                         .yres           = 480,
 183                         .pixclock       = 30303,
 184                         .hsync_len      = 64,
 185                         .left_margin    = 0x67,
 186                         .right_margin   = 0x68,
 187                         .vsync_len      = 16,
 188                         .upper_margin   = 0x0f,
 189                         .lower_margin   = 0x0f,
 190                 },
 191                 .bpp            = 16,
 192                 .pcr            = 0xFA208B83,
 193         },
 194 };
 195
 196 static const struct imx_fb_platform_data mxt_td60_fb_data __initconst = {
 197         .mode = mxt_td60_modes,
 198         .num_modes = ARRAY_SIZE(mxt_td60_modes),
 199
 200         /*
 201          * - HSYNC active high
 202          * - VSYNC active high
 203          * - clk notenabled while idle
 204          * - clock inverted
 205          * - data not inverted
 206          * - data enable low active
 207          * - enable sharp mode
 208          */
 209         .pwmr           = 0x00A903FF,
 210         .lscr1          = 0x00120300,
 211         .dmacr          = 0x00020010,
 212 };
 213
 214 static int mxt_td60_sdhc1_init(struct device *dev, irq_handler_t detect_irq,
 215                                 void *data)
 216 {
 217         return request_irq(IRQ_GPIOF(8), detect_irq, IRQF_TRIGGER_FALLING,
 218                                 "sdhc1-card-detect", data);
 219 }
 220
 221 static void mxt_td60_sdhc1_exit(struct device *dev, void *data)
 222 {
 223         free_irq(IRQ_GPIOF(8), data);
 224 }
 225
 226 static const struct imxmmc_platform_data sdhc1_pdata __initconst = {
 227         .init = mxt_td60_sdhc1_init,
 228         .exit = mxt_td60_sdhc1_exit,
 229 };
 230
 231 static const struct imxuart_platform_data uart_pdata __initconst = {
 232         .flags = IMXUART_HAVE_RTSCTS,
 233 };
 234
 235 static void __init mxt_td60_board_init(void)
 236 {
 237         mxc_gpio_setup_multiple_pins(mxt_td60_pins, ARRAY_SIZE(mxt_td60_pins),
 238                         "MXT_TD60");
 239
 240         imx27_add_imx_uart0(&uart_pdata);
 241         imx27_add_imx_uart1(&uart_pdata);
 242         imx27_add_imx_uart2(&uart_pdata);
 243         imx27_add_mxc_nand(&mxt_td60_nand_board_info);
 244
 245         i2c_register_board_info(0, mxt_td60_i2c_devices,
 246                                 ARRAY_SIZE(mxt_td60_i2c_devices));
 247
 248         i2c_register_board_info(1, mxt_td60_i2c2_devices,
 249                                 ARRAY_SIZE(mxt_td60_i2c2_devices));
 250
 251         imx27_add_imx_i2c(0, &mxt_td60_i2c0_data);
 252         imx27_add_imx_i2c(1, &mxt_td60_i2c1_data);
 253         imx27_add_imx_fb(&mxt_td60_fb_data);
 254         imx27_add_mxc_mmc(0, &sdhc1_pdata);
 255         imx27_add_fec(NULL);
 256 }
 257
 258 static void __init mxt_td60_timer_init(void)
 259 {
 260         mx27_clocks_init(26000000);
 261 }
 262
 263 static struct sys_timer mxt_td60_timer = {
 264         .init   = mxt_td60_timer_init,
 265 };
 266
 267 MACHINE_START(MXT_TD60, "Maxtrack i-MXT TD60")
 268         /* maintainer: Maxtrack Industrial */
 269         .boot_params    = MX27_PHYS_OFFSET + 0x100,
 270         .map_io         = mx27_map_io,
 271         .init_irq       = mx27_init_irq,
 272         .init_machine   = mxt_td60_board_init,
 273         .timer          = &mxt_td60_timer,
 274 MACHINE_END
 275