arch/arm/mach-exynos4/mach-smdkv310.c

   1 /* linux/arch/arm/mach-exynos4/mach-smdkv310.c
   2  *
   3  * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
   4  *              http://www.samsung.com
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9 */
  10
  11 #include <linux/serial_core.h>
  12 #include <linux/gpio.h>
  13 #include <linux/mmc/host.h>
  14 #include <linux/platform_device.h>
  15 #include <linux/smsc911x.h>
  16 #include <linux/io.h>
  17 #include <linux/i2c.h>
  18 #include <linux/input.h>
  19
  20 #include <asm/mach/arch.h>
  21 #include <asm/mach-types.h>
  22
  23 #include <plat/regs-serial.h>
  24 #include <plat/regs-srom.h>
  25 #include <plat/exynos4.h>
  26 #include <plat/cpu.h>
  27 #include <plat/devs.h>
  28 #include <plat/keypad.h>
  29 #include <plat/sdhci.h>
  30 #include <plat/iic.h>
  31 #include <plat/pd.h>
  32
  33 #include <mach/map.h>
  34
  35 /* Following are default values for UCON, ULCON and UFCON UART registers */
  36 #define SMDKV310_UCON_DEFAULT   (S3C2410_UCON_TXILEVEL |        \
  37                                  S3C2410_UCON_RXILEVEL |        \
  38                                  S3C2410_UCON_TXIRQMODE |       \
  39                                  S3C2410_UCON_RXIRQMODE |       \
  40                                  S3C2410_UCON_RXFIFO_TOI |      \
  41                                  S3C2443_UCON_RXERR_IRQEN)
  42
  43 #define SMDKV310_ULCON_DEFAULT  S3C2410_LCON_CS8
  44
  45 #define SMDKV310_UFCON_DEFAULT  (S3C2410_UFCON_FIFOMODE |       \
  46                                  S5PV210_UFCON_TXTRIG4 |        \
  47                                  S5PV210_UFCON_RXTRIG4)
  48
  49 static struct s3c2410_uartcfg smdkv310_uartcfgs[] __initdata = {
  50         [0] = {
  51                 .hwport         = 0,
  52                 .flags          = 0,
  53                 .ucon           = SMDKV310_UCON_DEFAULT,
  54                 .ulcon          = SMDKV310_ULCON_DEFAULT,
  55                 .ufcon          = SMDKV310_UFCON_DEFAULT,
  56         },
  57         [1] = {
  58                 .hwport         = 1,
  59                 .flags          = 0,
  60                 .ucon           = SMDKV310_UCON_DEFAULT,
  61                 .ulcon          = SMDKV310_ULCON_DEFAULT,
  62                 .ufcon          = SMDKV310_UFCON_DEFAULT,
  63         },
  64         [2] = {
  65                 .hwport         = 2,
  66                 .flags          = 0,
  67                 .ucon           = SMDKV310_UCON_DEFAULT,
  68                 .ulcon          = SMDKV310_ULCON_DEFAULT,
  69                 .ufcon          = SMDKV310_UFCON_DEFAULT,
  70         },
  71         [3] = {
  72                 .hwport         = 3,
  73                 .flags          = 0,
  74                 .ucon           = SMDKV310_UCON_DEFAULT,
  75                 .ulcon          = SMDKV310_ULCON_DEFAULT,
  76                 .ufcon          = SMDKV310_UFCON_DEFAULT,
  77         },
  78 };
  79
  80 static struct s3c_sdhci_platdata smdkv310_hsmmc0_pdata __initdata = {
  81         .cd_type                = S3C_SDHCI_CD_GPIO,
  82         .ext_cd_gpio            = EXYNOS4_GPK0(2),
  83         .ext_cd_gpio_invert     = 1,
  84         .clk_type               = S3C_SDHCI_CLK_DIV_EXTERNAL,
  85 #ifdef CONFIG_EXYNOS4_SDHCI_CH0_8BIT
  86         .max_width              = 8,
  87         .host_caps              = MMC_CAP_8_BIT_DATA,
  88 #endif
  89 };
  90
  91 static struct s3c_sdhci_platdata smdkv310_hsmmc1_pdata __initdata = {
  92         .cd_type                = S3C_SDHCI_CD_GPIO,
  93         .ext_cd_gpio            = EXYNOS4_GPK0(2),
  94         .ext_cd_gpio_invert     = 1,
  95         .clk_type               = S3C_SDHCI_CLK_DIV_EXTERNAL,
  96 };
  97
  98 static struct s3c_sdhci_platdata smdkv310_hsmmc2_pdata __initdata = {
  99         .cd_type                = S3C_SDHCI_CD_GPIO,
 100         .ext_cd_gpio            = EXYNOS4_GPK2(2),
 101         .ext_cd_gpio_invert     = 1,
 102         .clk_type               = S3C_SDHCI_CLK_DIV_EXTERNAL,
 103 #ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT
 104         .max_width              = 8,
 105         .host_caps              = MMC_CAP_8_BIT_DATA,
 106 #endif
 107 };
 108
 109 static struct s3c_sdhci_platdata smdkv310_hsmmc3_pdata __initdata = {
 110         .cd_type                = S3C_SDHCI_CD_GPIO,
 111         .ext_cd_gpio            = EXYNOS4_GPK2(2),
 112         .ext_cd_gpio_invert     = 1,
 113         .clk_type               = S3C_SDHCI_CLK_DIV_EXTERNAL,
 114 };
 115
 116 static struct resource smdkv310_smsc911x_resources[] = {
 117         [0] = {
 118                 .start  = EXYNOS4_PA_SROM_BANK(1),
 119                 .end    = EXYNOS4_PA_SROM_BANK(1) + SZ_64K - 1,
 120                 .flags  = IORESOURCE_MEM,
 121         },
 122         [1] = {
 123                 .start  = IRQ_EINT(5),
 124                 .end    = IRQ_EINT(5),
 125                 .flags  = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
 126         },
 127 };
 128
 129 static struct smsc911x_platform_config smsc9215_config = {
 130         .irq_polarity   = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
 131         .irq_type       = SMSC911X_IRQ_TYPE_PUSH_PULL,
 132         .flags          = SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY,
 133         .phy_interface  = PHY_INTERFACE_MODE_MII,
 134         .mac            = {0x00, 0x80, 0x00, 0x23, 0x45, 0x67},
 135 };
 136
 137 static struct platform_device smdkv310_smsc911x = {
 138         .name           = "smsc911x",
 139         .id             = -1,
 140         .num_resources  = ARRAY_SIZE(smdkv310_smsc911x_resources),
 141         .resource       = smdkv310_smsc911x_resources,
 142         .dev            = {
 143                 .platform_data  = &smsc9215_config,
 144         },
 145 };
 146
 147 static uint32_t smdkv310_keymap[] __initdata = {
 148         /* KEY(row, col, keycode) */
 149         KEY(0, 3, KEY_1), KEY(0, 4, KEY_2), KEY(0, 5, KEY_3),
 150         KEY(0, 6, KEY_4), KEY(0, 7, KEY_5),
 151         KEY(1, 3, KEY_A), KEY(1, 4, KEY_B), KEY(1, 5, KEY_C),
 152         KEY(1, 6, KEY_D), KEY(1, 7, KEY_E)
 153 };
 154
 155 static struct matrix_keymap_data smdkv310_keymap_data __initdata = {
 156         .keymap         = smdkv310_keymap,
 157         .keymap_size    = ARRAY_SIZE(smdkv310_keymap),
 158 };
 159
 160 static struct samsung_keypad_platdata smdkv310_keypad_data __initdata = {
 161         .keymap_data    = &smdkv310_keymap_data,
 162         .rows           = 2,
 163         .cols           = 8,
 164 };
 165
 166 static struct i2c_board_info i2c_devs1[] __initdata = {
 167         {I2C_BOARD_INFO("wm8994", 0x1a),},
 168 };
 169
 170 static struct platform_device *smdkv310_devices[] __initdata = {
 171         &s3c_device_hsmmc0,
 172         &s3c_device_hsmmc1,
 173         &s3c_device_hsmmc2,
 174         &s3c_device_hsmmc3,
 175         &s3c_device_i2c1,
 176         &s3c_device_rtc,
 177         &s3c_device_wdt,
 178         &exynos4_device_ac97,
 179         &exynos4_device_i2s0,
 180         &samsung_device_keypad,
 181         &exynos4_device_pd[PD_MFC],
 182         &exynos4_device_pd[PD_G3D],
 183         &exynos4_device_pd[PD_LCD0],
 184         &exynos4_device_pd[PD_LCD1],
 185         &exynos4_device_pd[PD_CAM],
 186         &exynos4_device_pd[PD_TV],
 187         &exynos4_device_pd[PD_GPS],
 188         &exynos4_device_sysmmu,
 189         &samsung_asoc_dma,
 190         &smdkv310_smsc911x,
 191 };
 192
 193 static void __init smdkv310_smsc911x_init(void)
 194 {
 195         u32 cs1;
 196
 197         /* configure nCS1 width to 16 bits */
 198         cs1 = __raw_readl(S5P_SROM_BW) &
 199                 ~(S5P_SROM_BW__CS_MASK << S5P_SROM_BW__NCS1__SHIFT);
 200         cs1 |= ((1 << S5P_SROM_BW__DATAWIDTH__SHIFT) |
 201                 (1 << S5P_SROM_BW__WAITENABLE__SHIFT) |
 202                 (1 << S5P_SROM_BW__BYTEENABLE__SHIFT)) <<
 203                 S5P_SROM_BW__NCS1__SHIFT;
 204         __raw_writel(cs1, S5P_SROM_BW);
 205
 206         /* set timing for nCS1 suitable for ethernet chip */
 207         __raw_writel((0x1 << S5P_SROM_BCX__PMC__SHIFT) |
 208                      (0x9 << S5P_SROM_BCX__TACP__SHIFT) |
 209                      (0xc << S5P_SROM_BCX__TCAH__SHIFT) |
 210                      (0x1 << S5P_SROM_BCX__TCOH__SHIFT) |
 211                      (0x6 << S5P_SROM_BCX__TACC__SHIFT) |
 212                      (0x1 << S5P_SROM_BCX__TCOS__SHIFT) |
 213                      (0x1 << S5P_SROM_BCX__TACS__SHIFT), S5P_SROM_BC1);
 214 }
 215
 216 static void __init smdkv310_map_io(void)
 217 {
 218         s5p_init_io(NULL, 0, S5P_VA_CHIPID);
 219         s3c24xx_init_clocks(24000000);
 220         s3c24xx_init_uarts(smdkv310_uartcfgs, ARRAY_SIZE(smdkv310_uartcfgs));
 221 }
 222
 223 static void __init smdkv310_machine_init(void)
 224 {
 225         s3c_i2c1_set_platdata(NULL);
 226         i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
 227
 228         smdkv310_smsc911x_init();
 229
 230         s3c_sdhci0_set_platdata(&smdkv310_hsmmc0_pdata);
 231         s3c_sdhci1_set_platdata(&smdkv310_hsmmc1_pdata);
 232         s3c_sdhci2_set_platdata(&smdkv310_hsmmc2_pdata);
 233         s3c_sdhci3_set_platdata(&smdkv310_hsmmc3_pdata);
 234
 235         samsung_keypad_set_platdata(&smdkv310_keypad_data);
 236
 237         platform_add_devices(smdkv310_devices, ARRAY_SIZE(smdkv310_devices));
 238 }
 239
 240 MACHINE_START(SMDKV310, "SMDKV310")
 241         /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
 242         /* Maintainer: Changhwan Youn <chaos.youn@samsung.com> */
 243         .boot_params    = S5P_PA_SDRAM + 0x100,
 244         .init_irq       = exynos4_init_irq,
 245         .map_io         = smdkv310_map_io,
 246         .init_machine   = smdkv310_machine_init,
 247         .timer          = &exynos4_timer,
 248 MACHINE_END