forcedeth: fix a few sparse warnings (variable shadowing)
[pandora-kernel.git] / arch / arm / mach-exynos4 / mach-smdkv310.c
1 /* linux/arch/arm/mach-exynos4/mach-smdkv310.c
2  *
3  * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
4  *              http://www.samsung.com
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9 */
10
11 #include <linux/serial_core.h>
12 #include <linux/delay.h>
13 #include <linux/gpio.h>
14 #include <linux/lcd.h>
15 #include <linux/mmc/host.h>
16 #include <linux/platform_device.h>
17 #include <linux/smsc911x.h>
18 #include <linux/io.h>
19 #include <linux/i2c.h>
20 #include <linux/input.h>
21 #include <linux/pwm_backlight.h>
22
23 #include <asm/mach/arch.h>
24 #include <asm/mach-types.h>
25
26 #include <video/platform_lcd.h>
27 #include <plat/regs-serial.h>
28 #include <plat/regs-srom.h>
29 #include <plat/regs-fb-v4.h>
30 #include <plat/exynos4.h>
31 #include <plat/cpu.h>
32 #include <plat/devs.h>
33 #include <plat/fb.h>
34 #include <plat/keypad.h>
35 #include <plat/sdhci.h>
36 #include <plat/iic.h>
37 #include <plat/pd.h>
38 #include <plat/gpio-cfg.h>
39 #include <plat/backlight.h>
40
41 #include <mach/map.h>
42
43 /* Following are default values for UCON, ULCON and UFCON UART registers */
44 #define SMDKV310_UCON_DEFAULT   (S3C2410_UCON_TXILEVEL |        \
45                                  S3C2410_UCON_RXILEVEL |        \
46                                  S3C2410_UCON_TXIRQMODE |       \
47                                  S3C2410_UCON_RXIRQMODE |       \
48                                  S3C2410_UCON_RXFIFO_TOI |      \
49                                  S3C2443_UCON_RXERR_IRQEN)
50
51 #define SMDKV310_ULCON_DEFAULT  S3C2410_LCON_CS8
52
53 #define SMDKV310_UFCON_DEFAULT  (S3C2410_UFCON_FIFOMODE |       \
54                                  S5PV210_UFCON_TXTRIG4 |        \
55                                  S5PV210_UFCON_RXTRIG4)
56
57 static struct s3c2410_uartcfg smdkv310_uartcfgs[] __initdata = {
58         [0] = {
59                 .hwport         = 0,
60                 .flags          = 0,
61                 .ucon           = SMDKV310_UCON_DEFAULT,
62                 .ulcon          = SMDKV310_ULCON_DEFAULT,
63                 .ufcon          = SMDKV310_UFCON_DEFAULT,
64         },
65         [1] = {
66                 .hwport         = 1,
67                 .flags          = 0,
68                 .ucon           = SMDKV310_UCON_DEFAULT,
69                 .ulcon          = SMDKV310_ULCON_DEFAULT,
70                 .ufcon          = SMDKV310_UFCON_DEFAULT,
71         },
72         [2] = {
73                 .hwport         = 2,
74                 .flags          = 0,
75                 .ucon           = SMDKV310_UCON_DEFAULT,
76                 .ulcon          = SMDKV310_ULCON_DEFAULT,
77                 .ufcon          = SMDKV310_UFCON_DEFAULT,
78         },
79         [3] = {
80                 .hwport         = 3,
81                 .flags          = 0,
82                 .ucon           = SMDKV310_UCON_DEFAULT,
83                 .ulcon          = SMDKV310_ULCON_DEFAULT,
84                 .ufcon          = SMDKV310_UFCON_DEFAULT,
85         },
86 };
87
88 static struct s3c_sdhci_platdata smdkv310_hsmmc0_pdata __initdata = {
89         .cd_type                = S3C_SDHCI_CD_INTERNAL,
90         .clk_type               = S3C_SDHCI_CLK_DIV_EXTERNAL,
91 #ifdef CONFIG_EXYNOS4_SDHCI_CH0_8BIT
92         .max_width              = 8,
93         .host_caps              = MMC_CAP_8_BIT_DATA,
94 #endif
95 };
96
97 static struct s3c_sdhci_platdata smdkv310_hsmmc1_pdata __initdata = {
98         .cd_type                = S3C_SDHCI_CD_GPIO,
99         .ext_cd_gpio            = EXYNOS4_GPK0(2),
100         .ext_cd_gpio_invert     = 1,
101         .clk_type               = S3C_SDHCI_CLK_DIV_EXTERNAL,
102 };
103
104 static struct s3c_sdhci_platdata smdkv310_hsmmc2_pdata __initdata = {
105         .cd_type                = S3C_SDHCI_CD_INTERNAL,
106         .clk_type               = S3C_SDHCI_CLK_DIV_EXTERNAL,
107 #ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT
108         .max_width              = 8,
109         .host_caps              = MMC_CAP_8_BIT_DATA,
110 #endif
111 };
112
113 static struct s3c_sdhci_platdata smdkv310_hsmmc3_pdata __initdata = {
114         .cd_type                = S3C_SDHCI_CD_GPIO,
115         .ext_cd_gpio            = EXYNOS4_GPK2(2),
116         .ext_cd_gpio_invert     = 1,
117         .clk_type               = S3C_SDHCI_CLK_DIV_EXTERNAL,
118 };
119
120 static void lcd_lte480wv_set_power(struct plat_lcd_data *pd,
121                                    unsigned int power)
122 {
123         if (power) {
124 #if !defined(CONFIG_BACKLIGHT_PWM)
125                 gpio_request_one(EXYNOS4_GPD0(1), GPIOF_OUT_INIT_HIGH, "GPD0");
126                 gpio_free(EXYNOS4_GPD0(1));
127 #endif
128                 /* fire nRESET on power up */
129                 gpio_request(EXYNOS4_GPX0(6), "GPX0");
130
131                 gpio_direction_output(EXYNOS4_GPX0(6), 1);
132                 mdelay(100);
133
134                 gpio_set_value(EXYNOS4_GPX0(6), 0);
135                 mdelay(10);
136
137                 gpio_set_value(EXYNOS4_GPX0(6), 1);
138                 mdelay(10);
139
140                 gpio_free(EXYNOS4_GPX0(6));
141         } else {
142 #if !defined(CONFIG_BACKLIGHT_PWM)
143                 gpio_request_one(EXYNOS4_GPD0(1), GPIOF_OUT_INIT_LOW, "GPD0");
144                 gpio_free(EXYNOS4_GPD0(1));
145 #endif
146         }
147 }
148
149 static struct plat_lcd_data smdkv310_lcd_lte480wv_data = {
150         .set_power              = lcd_lte480wv_set_power,
151 };
152
153 static struct platform_device smdkv310_lcd_lte480wv = {
154         .name                   = "platform-lcd",
155         .dev.parent             = &s5p_device_fimd0.dev,
156         .dev.platform_data      = &smdkv310_lcd_lte480wv_data,
157 };
158
159 static struct s3c_fb_pd_win smdkv310_fb_win0 = {
160         .win_mode = {
161                 .left_margin    = 13,
162                 .right_margin   = 8,
163                 .upper_margin   = 7,
164                 .lower_margin   = 5,
165                 .hsync_len      = 3,
166                 .vsync_len      = 1,
167                 .xres           = 800,
168                 .yres           = 480,
169         },
170         .max_bpp                = 32,
171         .default_bpp            = 24,
172 };
173
174 static struct s3c_fb_platdata smdkv310_lcd0_pdata __initdata = {
175         .win[0]         = &smdkv310_fb_win0,
176         .vidcon0        = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
177         .vidcon1        = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
178         .setup_gpio     = exynos4_fimd0_gpio_setup_24bpp,
179 };
180
181 static struct resource smdkv310_smsc911x_resources[] = {
182         [0] = {
183                 .start  = EXYNOS4_PA_SROM_BANK(1),
184                 .end    = EXYNOS4_PA_SROM_BANK(1) + SZ_64K - 1,
185                 .flags  = IORESOURCE_MEM,
186         },
187         [1] = {
188                 .start  = IRQ_EINT(5),
189                 .end    = IRQ_EINT(5),
190                 .flags  = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
191         },
192 };
193
194 static struct smsc911x_platform_config smsc9215_config = {
195         .irq_polarity   = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
196         .irq_type       = SMSC911X_IRQ_TYPE_PUSH_PULL,
197         .flags          = SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY,
198         .phy_interface  = PHY_INTERFACE_MODE_MII,
199         .mac            = {0x00, 0x80, 0x00, 0x23, 0x45, 0x67},
200 };
201
202 static struct platform_device smdkv310_smsc911x = {
203         .name           = "smsc911x",
204         .id             = -1,
205         .num_resources  = ARRAY_SIZE(smdkv310_smsc911x_resources),
206         .resource       = smdkv310_smsc911x_resources,
207         .dev            = {
208                 .platform_data  = &smsc9215_config,
209         },
210 };
211
212 static uint32_t smdkv310_keymap[] __initdata = {
213         /* KEY(row, col, keycode) */
214         KEY(0, 3, KEY_1), KEY(0, 4, KEY_2), KEY(0, 5, KEY_3),
215         KEY(0, 6, KEY_4), KEY(0, 7, KEY_5),
216         KEY(1, 3, KEY_A), KEY(1, 4, KEY_B), KEY(1, 5, KEY_C),
217         KEY(1, 6, KEY_D), KEY(1, 7, KEY_E)
218 };
219
220 static struct matrix_keymap_data smdkv310_keymap_data __initdata = {
221         .keymap         = smdkv310_keymap,
222         .keymap_size    = ARRAY_SIZE(smdkv310_keymap),
223 };
224
225 static struct samsung_keypad_platdata smdkv310_keypad_data __initdata = {
226         .keymap_data    = &smdkv310_keymap_data,
227         .rows           = 2,
228         .cols           = 8,
229 };
230
231 static struct i2c_board_info i2c_devs1[] __initdata = {
232         {I2C_BOARD_INFO("wm8994", 0x1a),},
233 };
234
235 static struct platform_device *smdkv310_devices[] __initdata = {
236         &s3c_device_hsmmc0,
237         &s3c_device_hsmmc1,
238         &s3c_device_hsmmc2,
239         &s3c_device_hsmmc3,
240         &s3c_device_i2c1,
241         &s3c_device_rtc,
242         &s3c_device_wdt,
243         &exynos4_device_ac97,
244         &exynos4_device_i2s0,
245         &samsung_device_keypad,
246         &exynos4_device_pd[PD_MFC],
247         &exynos4_device_pd[PD_G3D],
248         &exynos4_device_pd[PD_LCD0],
249         &exynos4_device_pd[PD_LCD1],
250         &exynos4_device_pd[PD_CAM],
251         &exynos4_device_pd[PD_TV],
252         &exynos4_device_pd[PD_GPS],
253         &exynos4_device_spdif,
254         &exynos4_device_sysmmu,
255         &samsung_asoc_dma,
256         &samsung_asoc_idma,
257         &s5p_device_fimd0,
258         &smdkv310_lcd_lte480wv,
259         &smdkv310_smsc911x,
260         &exynos4_device_ahci,
261 };
262
263 static void __init smdkv310_smsc911x_init(void)
264 {
265         u32 cs1;
266
267         /* configure nCS1 width to 16 bits */
268         cs1 = __raw_readl(S5P_SROM_BW) &
269                 ~(S5P_SROM_BW__CS_MASK << S5P_SROM_BW__NCS1__SHIFT);
270         cs1 |= ((1 << S5P_SROM_BW__DATAWIDTH__SHIFT) |
271                 (1 << S5P_SROM_BW__WAITENABLE__SHIFT) |
272                 (1 << S5P_SROM_BW__BYTEENABLE__SHIFT)) <<
273                 S5P_SROM_BW__NCS1__SHIFT;
274         __raw_writel(cs1, S5P_SROM_BW);
275
276         /* set timing for nCS1 suitable for ethernet chip */
277         __raw_writel((0x1 << S5P_SROM_BCX__PMC__SHIFT) |
278                      (0x9 << S5P_SROM_BCX__TACP__SHIFT) |
279                      (0xc << S5P_SROM_BCX__TCAH__SHIFT) |
280                      (0x1 << S5P_SROM_BCX__TCOH__SHIFT) |
281                      (0x6 << S5P_SROM_BCX__TACC__SHIFT) |
282                      (0x1 << S5P_SROM_BCX__TCOS__SHIFT) |
283                      (0x1 << S5P_SROM_BCX__TACS__SHIFT), S5P_SROM_BC1);
284 }
285
286 /* LCD Backlight data */
287 static struct samsung_bl_gpio_info smdkv310_bl_gpio_info = {
288         .no = EXYNOS4_GPD0(1),
289         .func = S3C_GPIO_SFN(2),
290 };
291
292 static struct platform_pwm_backlight_data smdkv310_bl_data = {
293         .pwm_id = 1,
294         .pwm_period_ns  = 1000,
295 };
296
297 static void __init smdkv310_map_io(void)
298 {
299         s5p_init_io(NULL, 0, S5P_VA_CHIPID);
300         s3c24xx_init_clocks(24000000);
301         s3c24xx_init_uarts(smdkv310_uartcfgs, ARRAY_SIZE(smdkv310_uartcfgs));
302 }
303
304 static void __init smdkv310_machine_init(void)
305 {
306         s3c_i2c1_set_platdata(NULL);
307         i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
308
309         smdkv310_smsc911x_init();
310
311         s3c_sdhci0_set_platdata(&smdkv310_hsmmc0_pdata);
312         s3c_sdhci1_set_platdata(&smdkv310_hsmmc1_pdata);
313         s3c_sdhci2_set_platdata(&smdkv310_hsmmc2_pdata);
314         s3c_sdhci3_set_platdata(&smdkv310_hsmmc3_pdata);
315
316         samsung_keypad_set_platdata(&smdkv310_keypad_data);
317
318         samsung_bl_set(&smdkv310_bl_gpio_info, &smdkv310_bl_data);
319         s5p_fimd0_set_platdata(&smdkv310_lcd0_pdata);
320
321         platform_add_devices(smdkv310_devices, ARRAY_SIZE(smdkv310_devices));
322 }
323
324 MACHINE_START(SMDKV310, "SMDKV310")
325         /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
326         /* Maintainer: Changhwan Youn <chaos.youn@samsung.com> */
327         .atag_offset    = 0x100,
328         .init_irq       = exynos4_init_irq,
329         .map_io         = smdkv310_map_io,
330         .init_machine   = smdkv310_machine_init,
331         .timer          = &exynos4_timer,
332 MACHINE_END
333
334 MACHINE_START(SMDKC210, "SMDKC210")
335         /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
336         .atag_offset    = 0x100,
337         .init_irq       = exynos4_init_irq,
338         .map_io         = smdkv310_map_io,
339         .init_machine   = smdkv310_machine_init,
340         .timer          = &exynos4_timer,
341 MACHINE_END