arch/arm/mach-exynos4/mach-smdkc210.c

   1 /* linux/arch/arm/mach-exynos4/mach-smdkc210.c
   2  *
   3  * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
   4  *              http://www.samsung.com
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9 */
  10
  11 #include <linux/serial_core.h>
  12 #include <linux/delay.h>
  13 #include <linux/gpio.h>
  14 #include <linux/lcd.h>
  15 #include <linux/mmc/host.h>
  16 #include <linux/platform_device.h>
  17 #include <linux/smsc911x.h>
  18 #include <linux/io.h>
  19 #include <linux/i2c.h>
  20 #include <linux/pwm_backlight.h>
  21
  22 #include <asm/mach/arch.h>
  23 #include <asm/mach-types.h>
  24
  25 #include <video/platform_lcd.h>
  26
  27 #include <plat/regs-serial.h>
  28 #include <plat/regs-srom.h>
  29 #include <plat/regs-fb-v4.h>
  30 #include <plat/exynos4.h>
  31 #include <plat/cpu.h>
  32 #include <plat/devs.h>
  33 #include <plat/fb.h>
  34 #include <plat/sdhci.h>
  35 #include <plat/iic.h>
  36 #include <plat/pd.h>
  37 #include <plat/gpio-cfg.h>
  38 #include <plat/backlight.h>
  39
  40 #include <mach/map.h>
  41
  42 /* Following are default values for UCON, ULCON and UFCON UART registers */
  43 #define SMDKC210_UCON_DEFAULT   (S3C2410_UCON_TXILEVEL |        \
  44                                  S3C2410_UCON_RXILEVEL |        \
  45                                  S3C2410_UCON_TXIRQMODE |       \
  46                                  S3C2410_UCON_RXIRQMODE |       \
  47                                  S3C2410_UCON_RXFIFO_TOI |      \
  48                                  S3C2443_UCON_RXERR_IRQEN)
  49
  50 #define SMDKC210_ULCON_DEFAULT  S3C2410_LCON_CS8
  51
  52 #define SMDKC210_UFCON_DEFAULT  (S3C2410_UFCON_FIFOMODE |       \
  53                                  S5PV210_UFCON_TXTRIG4 |        \
  54                                  S5PV210_UFCON_RXTRIG4)
  55
  56 static struct s3c2410_uartcfg smdkc210_uartcfgs[] __initdata = {
  57         [0] = {
  58                 .hwport         = 0,
  59                 .flags          = 0,
  60                 .ucon           = SMDKC210_UCON_DEFAULT,
  61                 .ulcon          = SMDKC210_ULCON_DEFAULT,
  62                 .ufcon          = SMDKC210_UFCON_DEFAULT,
  63         },
  64         [1] = {
  65                 .hwport         = 1,
  66                 .flags          = 0,
  67                 .ucon           = SMDKC210_UCON_DEFAULT,
  68                 .ulcon          = SMDKC210_ULCON_DEFAULT,
  69                 .ufcon          = SMDKC210_UFCON_DEFAULT,
  70         },
  71         [2] = {
  72                 .hwport         = 2,
  73                 .flags          = 0,
  74                 .ucon           = SMDKC210_UCON_DEFAULT,
  75                 .ulcon          = SMDKC210_ULCON_DEFAULT,
  76                 .ufcon          = SMDKC210_UFCON_DEFAULT,
  77         },
  78         [3] = {
  79                 .hwport         = 3,
  80                 .flags          = 0,
  81                 .ucon           = SMDKC210_UCON_DEFAULT,
  82                 .ulcon          = SMDKC210_ULCON_DEFAULT,
  83                 .ufcon          = SMDKC210_UFCON_DEFAULT,
  84         },
  85 };
  86
  87 static struct s3c_sdhci_platdata smdkc210_hsmmc0_pdata __initdata = {
  88         .cd_type                = S3C_SDHCI_CD_GPIO,
  89         .ext_cd_gpio            = EXYNOS4_GPK0(2),
  90         .ext_cd_gpio_invert     = 1,
  91         .clk_type               = S3C_SDHCI_CLK_DIV_EXTERNAL,
  92 #ifdef CONFIG_EXYNOS4_SDHCI_CH0_8BIT
  93         .max_width              = 8,
  94         .host_caps              = MMC_CAP_8_BIT_DATA,
  95 #endif
  96 };
  97
  98 static struct s3c_sdhci_platdata smdkc210_hsmmc1_pdata __initdata = {
  99         .cd_type                = S3C_SDHCI_CD_GPIO,
 100         .ext_cd_gpio            = EXYNOS4_GPK0(2),
 101         .ext_cd_gpio_invert     = 1,
 102         .clk_type               = S3C_SDHCI_CLK_DIV_EXTERNAL,
 103 };
 104
 105 static struct s3c_sdhci_platdata smdkc210_hsmmc2_pdata __initdata = {
 106         .cd_type                = S3C_SDHCI_CD_GPIO,
 107         .ext_cd_gpio            = EXYNOS4_GPK2(2),
 108         .ext_cd_gpio_invert     = 1,
 109         .clk_type               = S3C_SDHCI_CLK_DIV_EXTERNAL,
 110 #ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT
 111         .max_width              = 8,
 112         .host_caps              = MMC_CAP_8_BIT_DATA,
 113 #endif
 114 };
 115
 116 static struct s3c_sdhci_platdata smdkc210_hsmmc3_pdata __initdata = {
 117         .cd_type                = S3C_SDHCI_CD_GPIO,
 118         .ext_cd_gpio            = EXYNOS4_GPK2(2),
 119         .ext_cd_gpio_invert     = 1,
 120         .clk_type               = S3C_SDHCI_CLK_DIV_EXTERNAL,
 121 };
 122
 123 static void lcd_lte480wv_set_power(struct plat_lcd_data *pd,
 124                                    unsigned int power)
 125 {
 126         if (power) {
 127 #if !defined(CONFIG_BACKLIGHT_PWM)
 128                 gpio_request_one(EXYNOS4_GPD0(1), GPIOF_OUT_INIT_HIGH, "GPD0");
 129                 gpio_free(EXYNOS4_GPD0(1));
 130 #endif
 131                 /* fire nRESET on power up */
 132                 gpio_request(EXYNOS4_GPX0(6), "GPX0");
 133
 134                 gpio_direction_output(EXYNOS4_GPX0(6), 1);
 135                 mdelay(100);
 136
 137                 gpio_set_value(EXYNOS4_GPX0(6), 0);
 138                 mdelay(10);
 139
 140                 gpio_set_value(EXYNOS4_GPX0(6), 1);
 141                 mdelay(10);
 142
 143                 gpio_free(EXYNOS4_GPX0(6));
 144         } else {
 145 #if !defined(CONFIG_BACKLIGHT_PWM)
 146                 gpio_request_one(EXYNOS4_GPD0(1), GPIOF_OUT_INIT_LOW, "GPD0");
 147                 gpio_free(EXYNOS4_GPD0(1));
 148 #endif
 149         }
 150 }
 151
 152 static struct plat_lcd_data smdkc210_lcd_lte480wv_data = {
 153         .set_power              = lcd_lte480wv_set_power,
 154 };
 155
 156 static struct platform_device smdkc210_lcd_lte480wv = {
 157         .name                   = "platform-lcd",
 158         .dev.parent             = &s5p_device_fimd0.dev,
 159         .dev.platform_data      = &smdkc210_lcd_lte480wv_data,
 160 };
 161
 162 static struct s3c_fb_pd_win smdkc210_fb_win0 = {
 163         .win_mode = {
 164                 .left_margin    = 13,
 165                 .right_margin   = 8,
 166                 .upper_margin   = 7,
 167                 .lower_margin   = 5,
 168                 .hsync_len      = 3,
 169                 .vsync_len      = 1,
 170                 .xres           = 800,
 171                 .yres           = 480,
 172         },
 173         .max_bpp                = 32,
 174         .default_bpp            = 24,
 175 };
 176
 177 static struct s3c_fb_platdata smdkc210_lcd0_pdata __initdata = {
 178         .win[0]         = &smdkc210_fb_win0,
 179         .vidcon0        = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
 180         .vidcon1        = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
 181         .setup_gpio     = exynos4_fimd0_gpio_setup_24bpp,
 182 };
 183
 184 static struct resource smdkc210_smsc911x_resources[] = {
 185         [0] = {
 186                 .start  = EXYNOS4_PA_SROM_BANK(1),
 187                 .end    = EXYNOS4_PA_SROM_BANK(1) + SZ_64K - 1,
 188                 .flags  = IORESOURCE_MEM,
 189         },
 190         [1] = {
 191                 .start  = IRQ_EINT(5),
 192                 .end    = IRQ_EINT(5),
 193                 .flags  = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
 194         },
 195 };
 196
 197 static struct smsc911x_platform_config smsc9215_config = {
 198         .irq_polarity   = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
 199         .irq_type       = SMSC911X_IRQ_TYPE_PUSH_PULL,
 200         .flags          = SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY,
 201         .phy_interface  = PHY_INTERFACE_MODE_MII,
 202         .mac            = {0x00, 0x80, 0x00, 0x23, 0x45, 0x67},
 203 };
 204
 205 static struct platform_device smdkc210_smsc911x = {
 206         .name           = "smsc911x",
 207         .id             = -1,
 208         .num_resources  = ARRAY_SIZE(smdkc210_smsc911x_resources),
 209         .resource       = smdkc210_smsc911x_resources,
 210         .dev            = {
 211                 .platform_data  = &smsc9215_config,
 212         },
 213 };
 214
 215 static struct i2c_board_info i2c_devs1[] __initdata = {
 216         {I2C_BOARD_INFO("wm8994", 0x1a),},
 217 };
 218
 219 static struct platform_device *smdkc210_devices[] __initdata = {
 220         &s3c_device_hsmmc0,
 221         &s3c_device_hsmmc1,
 222         &s3c_device_hsmmc2,
 223         &s3c_device_hsmmc3,
 224         &s3c_device_i2c1,
 225         &s3c_device_rtc,
 226         &s3c_device_wdt,
 227         &exynos4_device_ac97,
 228         &exynos4_device_i2s0,
 229         &exynos4_device_pd[PD_MFC],
 230         &exynos4_device_pd[PD_G3D],
 231         &exynos4_device_pd[PD_LCD0],
 232         &exynos4_device_pd[PD_LCD1],
 233         &exynos4_device_pd[PD_CAM],
 234         &exynos4_device_pd[PD_TV],
 235         &exynos4_device_pd[PD_GPS],
 236         &exynos4_device_sysmmu,
 237         &samsung_asoc_dma,
 238         &s5p_device_fimd0,
 239         &smdkc210_lcd_lte480wv,
 240         &smdkc210_smsc911x,
 241 };
 242
 243 static void __init smdkc210_smsc911x_init(void)
 244 {
 245         u32 cs1;
 246
 247         /* configure nCS1 width to 16 bits */
 248         cs1 = __raw_readl(S5P_SROM_BW) &
 249                 ~(S5P_SROM_BW__CS_MASK << S5P_SROM_BW__NCS1__SHIFT);
 250         cs1 |= ((1 << S5P_SROM_BW__DATAWIDTH__SHIFT) |
 251                 (1 << S5P_SROM_BW__WAITENABLE__SHIFT) |
 252                 (1 << S5P_SROM_BW__BYTEENABLE__SHIFT)) <<
 253                 S5P_SROM_BW__NCS1__SHIFT;
 254         __raw_writel(cs1, S5P_SROM_BW);
 255
 256         /* set timing for nCS1 suitable for ethernet chip */
 257         __raw_writel((0x1 << S5P_SROM_BCX__PMC__SHIFT) |
 258                      (0x9 << S5P_SROM_BCX__TACP__SHIFT) |
 259                      (0xc << S5P_SROM_BCX__TCAH__SHIFT) |
 260                      (0x1 << S5P_SROM_BCX__TCOH__SHIFT) |
 261                      (0x6 << S5P_SROM_BCX__TACC__SHIFT) |
 262                      (0x1 << S5P_SROM_BCX__TCOS__SHIFT) |
 263                      (0x1 << S5P_SROM_BCX__TACS__SHIFT), S5P_SROM_BC1);
 264 }
 265
 266 /* LCD Backlight data */
 267 static struct samsung_bl_gpio_info smdkc210_bl_gpio_info = {
 268         .no = EXYNOS4_GPD0(1),
 269         .func = S3C_GPIO_SFN(2),
 270 };
 271
 272 static struct platform_pwm_backlight_data smdkc210_bl_data = {
 273         .pwm_id = 1,
 274         .pwm_period_ns  = 1000,
 275 };
 276
 277 static void __init smdkc210_map_io(void)
 278 {
 279         s5p_init_io(NULL, 0, S5P_VA_CHIPID);
 280         s3c24xx_init_clocks(24000000);
 281         s3c24xx_init_uarts(smdkc210_uartcfgs, ARRAY_SIZE(smdkc210_uartcfgs));
 282 }
 283
 284 static void __init smdkc210_machine_init(void)
 285 {
 286         s3c_i2c1_set_platdata(NULL);
 287         i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
 288
 289         smdkc210_smsc911x_init();
 290
 291         s3c_sdhci0_set_platdata(&smdkc210_hsmmc0_pdata);
 292         s3c_sdhci1_set_platdata(&smdkc210_hsmmc1_pdata);
 293         s3c_sdhci2_set_platdata(&smdkc210_hsmmc2_pdata);
 294         s3c_sdhci3_set_platdata(&smdkc210_hsmmc3_pdata);
 295
 296         samsung_bl_set(&smdkc210_bl_gpio_info, &smdkc210_bl_data);
 297         s5p_fimd0_set_platdata(&smdkc210_lcd0_pdata);
 298
 299         platform_add_devices(smdkc210_devices, ARRAY_SIZE(smdkc210_devices));
 300 }
 301
 302 MACHINE_START(SMDKC210, "SMDKC210")
 303         /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
 304         .boot_params    = S5P_PA_SDRAM + 0x100,
 305         .init_irq       = exynos4_init_irq,
 306         .map_io         = smdkc210_map_io,
 307         .init_machine   = smdkc210_machine_init,
 308         .timer          = &exynos4_timer,
 309 MACHINE_END