arch/arm/mach-davinci/pm.c

   1 /*
   2  * DaVinci Power Management Routines
   3  *
   4  * Copyright (C) 2009 Texas Instruments, Inc. http://www.ti.com/
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  */
  10
  11 #include <linux/pm.h>
  12 #include <linux/suspend.h>
  13 #include <linux/module.h>
  14 #include <linux/platform_device.h>
  15 #include <linux/clk.h>
  16 #include <linux/spinlock.h>
  17
  18 #include <asm/cacheflush.h>
  19 #include <asm/delay.h>
  20 #include <asm/io.h>
  21
  22 #include <mach/da8xx.h>
  23 #include <mach/sram.h>
  24 #include <mach/pm.h>
  25
  26 #include "clock.h"
  27
  28 #define DEEPSLEEP_SLEEPCOUNT_MASK       0xFFFF
  29
  30 static void (*davinci_sram_suspend) (struct davinci_pm_config *);
  31 static struct davinci_pm_config *pdata;
  32
  33 static void davinci_sram_push(void *dest, void *src, unsigned int size)
  34 {
  35         memcpy(dest, src, size);
  36         flush_icache_range((unsigned long)dest, (unsigned long)(dest + size));
  37 }
  38
  39 static void davinci_pm_suspend(void)
  40 {
  41         unsigned val;
  42
  43         if (pdata->cpupll_reg_base != pdata->ddrpll_reg_base) {
  44
  45                 /* Switch CPU PLL to bypass mode */
  46                 val = __raw_readl(pdata->cpupll_reg_base + PLLCTL);
  47                 val &= ~(PLLCTL_PLLENSRC | PLLCTL_PLLEN);
  48                 __raw_writel(val, pdata->cpupll_reg_base + PLLCTL);
  49
  50                 udelay(PLL_BYPASS_TIME);
  51
  52                 /* Powerdown CPU PLL */
  53                 val = __raw_readl(pdata->cpupll_reg_base + PLLCTL);
  54                 val |= PLLCTL_PLLPWRDN;
  55                 __raw_writel(val, pdata->cpupll_reg_base + PLLCTL);
  56         }
  57
  58         /* Configure sleep count in deep sleep register */
  59         val = __raw_readl(pdata->deepsleep_reg);
  60         val &= ~DEEPSLEEP_SLEEPCOUNT_MASK,
  61         val |= pdata->sleepcount;
  62         __raw_writel(val, pdata->deepsleep_reg);
  63
  64         /* System goes to sleep in this call */
  65         davinci_sram_suspend(pdata);
  66
  67         if (pdata->cpupll_reg_base != pdata->ddrpll_reg_base) {
  68
  69                 /* put CPU PLL in reset */
  70                 val = __raw_readl(pdata->cpupll_reg_base + PLLCTL);
  71                 val &= ~PLLCTL_PLLRST;
  72                 __raw_writel(val, pdata->cpupll_reg_base + PLLCTL);
  73
  74                 /* put CPU PLL in power down */
  75                 val = __raw_readl(pdata->cpupll_reg_base + PLLCTL);
  76                 val &= ~PLLCTL_PLLPWRDN;
  77                 __raw_writel(val, pdata->cpupll_reg_base + PLLCTL);
  78
  79                 /* wait for CPU PLL reset */
  80                 udelay(PLL_RESET_TIME);
  81
  82                 /* bring CPU PLL out of reset */
  83                 val = __raw_readl(pdata->cpupll_reg_base + PLLCTL);
  84                 val |= PLLCTL_PLLRST;
  85                 __raw_writel(val, pdata->cpupll_reg_base + PLLCTL);
  86
  87                 /* Wait for CPU PLL to lock */
  88                 udelay(PLL_LOCK_TIME);
  89
  90                 /* Remove CPU PLL from bypass mode */
  91                 val = __raw_readl(pdata->cpupll_reg_base + PLLCTL);
  92                 val &= ~PLLCTL_PLLENSRC;
  93                 val |= PLLCTL_PLLEN;
  94                 __raw_writel(val, pdata->cpupll_reg_base + PLLCTL);
  95         }
  96 }
  97
  98 static int davinci_pm_enter(suspend_state_t state)
  99 {
 100         int ret = 0;
 101
 102         switch (state) {
 103         case PM_SUSPEND_STANDBY:
 104         case PM_SUSPEND_MEM:
 105                 davinci_pm_suspend();
 106                 break;
 107         default:
 108                 ret = -EINVAL;
 109         }
 110
 111         return ret;
 112 }
 113
 114 static const struct platform_suspend_ops davinci_pm_ops = {
 115         .enter          = davinci_pm_enter,
 116         .valid          = suspend_valid_only_mem,
 117 };
 118
 119 static int __init davinci_pm_probe(struct platform_device *pdev)
 120 {
 121         pdata = pdev->dev.platform_data;
 122         if (!pdata) {
 123                 dev_err(&pdev->dev, "cannot get platform data\n");
 124                 return -ENOENT;
 125         }
 126
 127         davinci_sram_suspend = sram_alloc(davinci_cpu_suspend_sz, NULL);
 128         if (!davinci_sram_suspend) {
 129                 dev_err(&pdev->dev, "cannot allocate SRAM memory\n");
 130                 return -ENOMEM;
 131         }
 132
 133         davinci_sram_push(davinci_sram_suspend, davinci_cpu_suspend,
 134                                                 davinci_cpu_suspend_sz);
 135
 136         suspend_set_ops(&davinci_pm_ops);
 137
 138         return 0;
 139 }
 140
 141 static int __exit davinci_pm_remove(struct platform_device *pdev)
 142 {
 143         sram_free(davinci_sram_suspend, davinci_cpu_suspend_sz);
 144         return 0;
 145 }
 146
 147 static struct platform_driver davinci_pm_driver = {
 148         .driver = {
 149                 .name    = "pm-davinci",
 150                 .owner   = THIS_MODULE,
 151         },
 152         .remove = __exit_p(davinci_pm_remove),
 153 };
 154
 155 static int __init davinci_pm_init(void)
 156 {
 157         return platform_driver_probe(&davinci_pm_driver, davinci_pm_probe);
 158 }
 159 late_initcall(davinci_pm_init);