Merge git://git.kernel.org/pub/scm/linux/kernel/git/mason/btrfs-unstable
[pandora-kernel.git] / arch / arm / mach-davinci / devices.c
1 /*
2  * mach-davinci/devices.c
3  *
4  * DaVinci platform device setup/initialization
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  */
11
12 #include <linux/init.h>
13 #include <linux/platform_device.h>
14 #include <linux/dma-mapping.h>
15 #include <linux/io.h>
16
17 #include <mach/hardware.h>
18 #include <mach/i2c.h>
19 #include <mach/irqs.h>
20 #include <mach/cputype.h>
21 #include <mach/mux.h>
22 #include <mach/edma.h>
23 #include <mach/mmc.h>
24 #include <mach/time.h>
25
26 #define DAVINCI_I2C_BASE             0x01C21000
27 #define DAVINCI_MMCSD0_BASE          0x01E10000
28 #define DM355_MMCSD0_BASE            0x01E11000
29 #define DM355_MMCSD1_BASE            0x01E00000
30 #define DM365_MMCSD0_BASE            0x01D11000
31 #define DM365_MMCSD1_BASE            0x01D00000
32
33 static struct resource i2c_resources[] = {
34         {
35                 .start          = DAVINCI_I2C_BASE,
36                 .end            = DAVINCI_I2C_BASE + 0x40,
37                 .flags          = IORESOURCE_MEM,
38         },
39         {
40                 .start          = IRQ_I2C,
41                 .flags          = IORESOURCE_IRQ,
42         },
43 };
44
45 static struct platform_device davinci_i2c_device = {
46         .name           = "i2c_davinci",
47         .id             = 1,
48         .num_resources  = ARRAY_SIZE(i2c_resources),
49         .resource       = i2c_resources,
50 };
51
52 void __init davinci_init_i2c(struct davinci_i2c_platform_data *pdata)
53 {
54         if (cpu_is_davinci_dm644x())
55                 davinci_cfg_reg(DM644X_I2C);
56
57         davinci_i2c_device.dev.platform_data = pdata;
58         (void) platform_device_register(&davinci_i2c_device);
59 }
60
61 #if     defined(CONFIG_MMC_DAVINCI) || defined(CONFIG_MMC_DAVINCI_MODULE)
62
63 static u64 mmcsd0_dma_mask = DMA_BIT_MASK(32);
64
65 static struct resource mmcsd0_resources[] = {
66         {
67                 /* different on dm355 */
68                 .start = DAVINCI_MMCSD0_BASE,
69                 .end   = DAVINCI_MMCSD0_BASE + SZ_4K - 1,
70                 .flags = IORESOURCE_MEM,
71         },
72         /* IRQs:  MMC/SD, then SDIO */
73         {
74                 .start = IRQ_MMCINT,
75                 .flags = IORESOURCE_IRQ,
76         }, {
77                 /* different on dm355 */
78                 .start = IRQ_SDIOINT,
79                 .flags = IORESOURCE_IRQ,
80         },
81         /* DMA channels: RX, then TX */
82         {
83                 .start = EDMA_CTLR_CHAN(0, DAVINCI_DMA_MMCRXEVT),
84                 .flags = IORESOURCE_DMA,
85         }, {
86                 .start = EDMA_CTLR_CHAN(0, DAVINCI_DMA_MMCTXEVT),
87                 .flags = IORESOURCE_DMA,
88         },
89 };
90
91 static struct platform_device davinci_mmcsd0_device = {
92         .name = "davinci_mmc",
93         .id = 0,
94         .dev = {
95                 .dma_mask = &mmcsd0_dma_mask,
96                 .coherent_dma_mask = DMA_BIT_MASK(32),
97         },
98         .num_resources = ARRAY_SIZE(mmcsd0_resources),
99         .resource = mmcsd0_resources,
100 };
101
102 static u64 mmcsd1_dma_mask = DMA_BIT_MASK(32);
103
104 static struct resource mmcsd1_resources[] = {
105         {
106                 .start = DM355_MMCSD1_BASE,
107                 .end   = DM355_MMCSD1_BASE + SZ_4K - 1,
108                 .flags = IORESOURCE_MEM,
109         },
110         /* IRQs:  MMC/SD, then SDIO */
111         {
112                 .start = IRQ_DM355_MMCINT1,
113                 .flags = IORESOURCE_IRQ,
114         }, {
115                 .start = IRQ_DM355_SDIOINT1,
116                 .flags = IORESOURCE_IRQ,
117         },
118         /* DMA channels: RX, then TX */
119         {
120                 .start = EDMA_CTLR_CHAN(0, 30), /* rx */
121                 .flags = IORESOURCE_DMA,
122         }, {
123                 .start = EDMA_CTLR_CHAN(0, 31), /* tx */
124                 .flags = IORESOURCE_DMA,
125         },
126 };
127
128 static struct platform_device davinci_mmcsd1_device = {
129         .name = "davinci_mmc",
130         .id = 1,
131         .dev = {
132                 .dma_mask = &mmcsd1_dma_mask,
133                 .coherent_dma_mask = DMA_BIT_MASK(32),
134         },
135         .num_resources = ARRAY_SIZE(mmcsd1_resources),
136         .resource = mmcsd1_resources,
137 };
138
139
140 void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
141 {
142         struct platform_device  *pdev = NULL;
143
144         if (WARN_ON(cpu_is_davinci_dm646x()))
145                 return;
146
147         /* REVISIT: update PINMUX, ARM_IRQMUX, and EDMA_EVTMUX here too;
148          * for example if MMCSD1 is used for SDIO, maybe DAT2 is unused.
149          *
150          * FIXME dm6441 (no MMC/SD), dm357 (one), and dm335 (two) are
151          * not handled right here ...
152          */
153         switch (module) {
154         case 1:
155                 if (cpu_is_davinci_dm355()) {
156                         /* REVISIT we may not need all these pins if e.g. this
157                          * is a hard-wired SDIO device...
158                          */
159                         davinci_cfg_reg(DM355_SD1_CMD);
160                         davinci_cfg_reg(DM355_SD1_CLK);
161                         davinci_cfg_reg(DM355_SD1_DATA0);
162                         davinci_cfg_reg(DM355_SD1_DATA1);
163                         davinci_cfg_reg(DM355_SD1_DATA2);
164                         davinci_cfg_reg(DM355_SD1_DATA3);
165                 } else if (cpu_is_davinci_dm365()) {
166                         void __iomem *pupdctl1 =
167                                 IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE + 0x7c);
168
169                         /* Configure pull down control */
170                         __raw_writel((__raw_readl(pupdctl1) & ~0x400),
171                                         pupdctl1);
172
173                         mmcsd1_resources[0].start = DM365_MMCSD1_BASE;
174                         mmcsd1_resources[0].end = DM365_MMCSD1_BASE +
175                                                         SZ_4K - 1;
176                         mmcsd1_resources[2].start = IRQ_DM365_SDIOINT1;
177                 } else
178                         break;
179
180                 pdev = &davinci_mmcsd1_device;
181                 break;
182         case 0:
183                 if (cpu_is_davinci_dm355()) {
184                         mmcsd0_resources[0].start = DM355_MMCSD0_BASE;
185                         mmcsd0_resources[0].end = DM355_MMCSD0_BASE + SZ_4K - 1;
186                         mmcsd0_resources[2].start = IRQ_DM355_SDIOINT0;
187
188                         /* expose all 6 MMC0 signals:  CLK, CMD, DATA[0..3] */
189                         davinci_cfg_reg(DM355_MMCSD0);
190
191                         /* enable RX EDMA */
192                         davinci_cfg_reg(DM355_EVT26_MMC0_RX);
193                 } else if (cpu_is_davinci_dm365()) {
194                         mmcsd0_resources[0].start = DM365_MMCSD0_BASE;
195                         mmcsd0_resources[0].end = DM365_MMCSD0_BASE +
196                                                         SZ_4K - 1;
197                         mmcsd0_resources[2].start = IRQ_DM365_SDIOINT0;
198                 } else if (cpu_is_davinci_dm644x()) {
199                         /* REVISIT: should this be in board-init code? */
200                         void __iomem *base =
201                                 IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE);
202
203                         /* Power-on 3.3V IO cells */
204                         __raw_writel(0, base + DM64XX_VDD3P3V_PWDN);
205                         /*Set up the pull regiter for MMC */
206                         davinci_cfg_reg(DM644X_MSTK);
207                 }
208
209                 pdev = &davinci_mmcsd0_device;
210                 break;
211         }
212
213         if (WARN_ON(!pdev))
214                 return;
215
216         pdev->dev.platform_data = config;
217         platform_device_register(pdev);
218 }
219
220 #else
221
222 void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
223 {
224 }
225
226 #endif
227
228 /*-------------------------------------------------------------------------*/
229
230 static struct resource wdt_resources[] = {
231         {
232                 .start  = DAVINCI_WDOG_BASE,
233                 .end    = DAVINCI_WDOG_BASE + SZ_1K - 1,
234                 .flags  = IORESOURCE_MEM,
235         },
236 };
237
238 struct platform_device davinci_wdt_device = {
239         .name           = "watchdog",
240         .id             = -1,
241         .num_resources  = ARRAY_SIZE(wdt_resources),
242         .resource       = wdt_resources,
243 };
244
245 static void davinci_init_wdt(void)
246 {
247         platform_device_register(&davinci_wdt_device);
248 }
249
250 /*-------------------------------------------------------------------------*/
251
252 struct davinci_timer_instance davinci_timer_instance[2] = {
253         {
254                 .base           = IO_ADDRESS(DAVINCI_TIMER0_BASE),
255                 .bottom_irq     = IRQ_TINT0_TINT12,
256                 .top_irq        = IRQ_TINT0_TINT34,
257         },
258         {
259                 .base           = IO_ADDRESS(DAVINCI_TIMER1_BASE),
260                 .bottom_irq     = IRQ_TINT1_TINT12,
261                 .top_irq        = IRQ_TINT1_TINT34,
262         },
263 };
264
265 /*-------------------------------------------------------------------------*/
266
267 static int __init davinci_init_devices(void)
268 {
269         /* please keep these calls, and their implementations above,
270          * in alphabetical order so they're easier to sort through.
271          */
272         davinci_init_wdt();
273
274         return 0;
275 }
276 arch_initcall(davinci_init_devices);
277