arch/arm/mach-davinci/devices-da8xx.c

   1 /*
   2  * DA8XX/OMAP L1XX platform device data
   3  *
   4  * Copyright (c) 2007-2009, MontaVista Software, Inc. <source@mvista.com>
   5  * Derived from code that was:
   6  *      Copyright (C) 2006 Komal Shah <komal_shah802003@yahoo.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  */
  13 #include <linux/init.h>
  14 #include <linux/platform_device.h>
  15 #include <linux/dma-mapping.h>
  16 #include <linux/serial_8250.h>
  17
  18 #include <mach/cputype.h>
  19 #include <mach/common.h>
  20 #include <mach/time.h>
  21 #include <mach/da8xx.h>
  22 #include <mach/cpuidle.h>
  23
  24 #include "clock.h"
  25
  26 #define DA8XX_TPCC_BASE                 0x01c00000
  27 #define DA8XX_TPTC0_BASE                0x01c08000
  28 #define DA8XX_TPTC1_BASE                0x01c08400
  29 #define DA8XX_WDOG_BASE                 0x01c21000 /* DA8XX_TIMER64P1_BASE */
  30 #define DA8XX_I2C0_BASE                 0x01c22000
  31 #define DA8XX_RTC_BASE                  0x01c23000
  32 #define DA8XX_MMCSD0_BASE               0x01c40000
  33 #define DA8XX_SPI0_BASE                 0x01c41000
  34 #define DA830_SPI1_BASE                 0x01e12000
  35 #define DA8XX_LCD_CNTRL_BASE            0x01e13000
  36 #define DA850_MMCSD1_BASE               0x01e1b000
  37 #define DA8XX_EMAC_CPPI_PORT_BASE       0x01e20000
  38 #define DA8XX_EMAC_CPGMACSS_BASE        0x01e22000
  39 #define DA8XX_EMAC_CPGMAC_BASE          0x01e23000
  40 #define DA8XX_EMAC_MDIO_BASE            0x01e24000
  41 #define DA8XX_I2C1_BASE                 0x01e28000
  42 #define DA850_TPCC1_BASE                0x01e30000
  43 #define DA850_TPTC2_BASE                0x01e38000
  44 #define DA850_SPI1_BASE                 0x01f0e000
  45 #define DA8XX_DDR2_CTL_BASE             0xb0000000
  46
  47 #define DA8XX_EMAC_CTRL_REG_OFFSET      0x3000
  48 #define DA8XX_EMAC_MOD_REG_OFFSET       0x2000
  49 #define DA8XX_EMAC_RAM_OFFSET           0x0000
  50 #define DA8XX_EMAC_CTRL_RAM_SIZE        SZ_8K
  51
  52 #define DA8XX_DMA_SPI0_RX       EDMA_CTLR_CHAN(0, 14)
  53 #define DA8XX_DMA_SPI0_TX       EDMA_CTLR_CHAN(0, 15)
  54 #define DA8XX_DMA_MMCSD0_RX     EDMA_CTLR_CHAN(0, 16)
  55 #define DA8XX_DMA_MMCSD0_TX     EDMA_CTLR_CHAN(0, 17)
  56 #define DA8XX_DMA_SPI1_RX       EDMA_CTLR_CHAN(0, 18)
  57 #define DA8XX_DMA_SPI1_TX       EDMA_CTLR_CHAN(0, 19)
  58 #define DA850_DMA_MMCSD1_RX     EDMA_CTLR_CHAN(1, 28)
  59 #define DA850_DMA_MMCSD1_TX     EDMA_CTLR_CHAN(1, 29)
  60
  61 void __iomem *da8xx_syscfg0_base;
  62 void __iomem *da8xx_syscfg1_base;
  63
  64 static struct plat_serial8250_port da8xx_serial_pdata[] = {
  65         {
  66                 .mapbase        = DA8XX_UART0_BASE,
  67                 .irq            = IRQ_DA8XX_UARTINT0,
  68                 .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
  69                                         UPF_IOREMAP,
  70                 .iotype         = UPIO_MEM,
  71                 .regshift       = 2,
  72         },
  73         {
  74                 .mapbase        = DA8XX_UART1_BASE,
  75                 .irq            = IRQ_DA8XX_UARTINT1,
  76                 .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
  77                                         UPF_IOREMAP,
  78                 .iotype         = UPIO_MEM,
  79                 .regshift       = 2,
  80         },
  81         {
  82                 .mapbase        = DA8XX_UART2_BASE,
  83                 .irq            = IRQ_DA8XX_UARTINT2,
  84                 .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
  85                                         UPF_IOREMAP,
  86                 .iotype         = UPIO_MEM,
  87                 .regshift       = 2,
  88         },
  89         {
  90                 .flags  = 0,
  91         },
  92 };
  93
  94 struct platform_device da8xx_serial_device = {
  95         .name   = "serial8250",
  96         .id     = PLAT8250_DEV_PLATFORM,
  97         .dev    = {
  98                 .platform_data  = da8xx_serial_pdata,
  99         },
 100 };
 101
 102 static const s8 da8xx_queue_tc_mapping[][2] = {
 103         /* {event queue no, TC no} */
 104         {0, 0},
 105         {1, 1},
 106         {-1, -1}
 107 };
 108
 109 static const s8 da8xx_queue_priority_mapping[][2] = {
 110         /* {event queue no, Priority} */
 111         {0, 3},
 112         {1, 7},
 113         {-1, -1}
 114 };
 115
 116 static const s8 da850_queue_tc_mapping[][2] = {
 117         /* {event queue no, TC no} */
 118         {0, 0},
 119         {-1, -1}
 120 };
 121
 122 static const s8 da850_queue_priority_mapping[][2] = {
 123         /* {event queue no, Priority} */
 124         {0, 3},
 125         {-1, -1}
 126 };
 127
 128 static struct edma_soc_info da830_edma_cc0_info = {
 129         .n_channel              = 32,
 130         .n_region               = 4,
 131         .n_slot                 = 128,
 132         .n_tc                   = 2,
 133         .n_cc                   = 1,
 134         .queue_tc_mapping       = da8xx_queue_tc_mapping,
 135         .queue_priority_mapping = da8xx_queue_priority_mapping,
 136 };
 137
 138 static struct edma_soc_info *da830_edma_info[EDMA_MAX_CC] = {
 139         &da830_edma_cc0_info,
 140 };
 141
 142 static struct edma_soc_info da850_edma_cc_info[] = {
 143         {
 144                 .n_channel              = 32,
 145                 .n_region               = 4,
 146                 .n_slot                 = 128,
 147                 .n_tc                   = 2,
 148                 .n_cc                   = 1,
 149                 .queue_tc_mapping       = da8xx_queue_tc_mapping,
 150                 .queue_priority_mapping = da8xx_queue_priority_mapping,
 151         },
 152         {
 153                 .n_channel              = 32,
 154                 .n_region               = 4,
 155                 .n_slot                 = 128,
 156                 .n_tc                   = 1,
 157                 .n_cc                   = 1,
 158                 .queue_tc_mapping       = da850_queue_tc_mapping,
 159                 .queue_priority_mapping = da850_queue_priority_mapping,
 160         },
 161 };
 162
 163 static struct edma_soc_info *da850_edma_info[EDMA_MAX_CC] = {
 164         &da850_edma_cc_info[0],
 165         &da850_edma_cc_info[1],
 166 };
 167
 168 static struct resource da830_edma_resources[] = {
 169         {
 170                 .name   = "edma_cc0",
 171                 .start  = DA8XX_TPCC_BASE,
 172                 .end    = DA8XX_TPCC_BASE + SZ_32K - 1,
 173                 .flags  = IORESOURCE_MEM,
 174         },
 175         {
 176                 .name   = "edma_tc0",
 177                 .start  = DA8XX_TPTC0_BASE,
 178                 .end    = DA8XX_TPTC0_BASE + SZ_1K - 1,
 179                 .flags  = IORESOURCE_MEM,
 180         },
 181         {
 182                 .name   = "edma_tc1",
 183                 .start  = DA8XX_TPTC1_BASE,
 184                 .end    = DA8XX_TPTC1_BASE + SZ_1K - 1,
 185                 .flags  = IORESOURCE_MEM,
 186         },
 187         {
 188                 .name   = "edma0",
 189                 .start  = IRQ_DA8XX_CCINT0,
 190                 .flags  = IORESOURCE_IRQ,
 191         },
 192         {
 193                 .name   = "edma0_err",
 194                 .start  = IRQ_DA8XX_CCERRINT,
 195                 .flags  = IORESOURCE_IRQ,
 196         },
 197 };
 198
 199 static struct resource da850_edma_resources[] = {
 200         {
 201                 .name   = "edma_cc0",
 202                 .start  = DA8XX_TPCC_BASE,
 203                 .end    = DA8XX_TPCC_BASE + SZ_32K - 1,
 204                 .flags  = IORESOURCE_MEM,
 205         },
 206         {
 207                 .name   = "edma_tc0",
 208                 .start  = DA8XX_TPTC0_BASE,
 209                 .end    = DA8XX_TPTC0_BASE + SZ_1K - 1,
 210                 .flags  = IORESOURCE_MEM,
 211         },
 212         {
 213                 .name   = "edma_tc1",
 214                 .start  = DA8XX_TPTC1_BASE,
 215                 .end    = DA8XX_TPTC1_BASE + SZ_1K - 1,
 216                 .flags  = IORESOURCE_MEM,
 217         },
 218         {
 219                 .name   = "edma_cc1",
 220                 .start  = DA850_TPCC1_BASE,
 221                 .end    = DA850_TPCC1_BASE + SZ_32K - 1,
 222                 .flags  = IORESOURCE_MEM,
 223         },
 224         {
 225                 .name   = "edma_tc2",
 226                 .start  = DA850_TPTC2_BASE,
 227                 .end    = DA850_TPTC2_BASE + SZ_1K - 1,
 228                 .flags  = IORESOURCE_MEM,
 229         },
 230         {
 231                 .name   = "edma0",
 232                 .start  = IRQ_DA8XX_CCINT0,
 233                 .flags  = IORESOURCE_IRQ,
 234         },
 235         {
 236                 .name   = "edma0_err",
 237                 .start  = IRQ_DA8XX_CCERRINT,
 238                 .flags  = IORESOURCE_IRQ,
 239         },
 240         {
 241                 .name   = "edma1",
 242                 .start  = IRQ_DA850_CCINT1,
 243                 .flags  = IORESOURCE_IRQ,
 244         },
 245         {
 246                 .name   = "edma1_err",
 247                 .start  = IRQ_DA850_CCERRINT1,
 248                 .flags  = IORESOURCE_IRQ,
 249         },
 250 };
 251
 252 static struct platform_device da830_edma_device = {
 253         .name           = "edma",
 254         .id             = -1,
 255         .dev = {
 256                 .platform_data = da830_edma_info,
 257         },
 258         .num_resources  = ARRAY_SIZE(da830_edma_resources),
 259         .resource       = da830_edma_resources,
 260 };
 261
 262 static struct platform_device da850_edma_device = {
 263         .name           = "edma",
 264         .id             = -1,
 265         .dev = {
 266                 .platform_data = da850_edma_info,
 267         },
 268         .num_resources  = ARRAY_SIZE(da850_edma_resources),
 269         .resource       = da850_edma_resources,
 270 };
 271
 272 int __init da830_register_edma(struct edma_rsv_info *rsv)
 273 {
 274         da830_edma_cc0_info.rsv = rsv;
 275
 276         return platform_device_register(&da830_edma_device);
 277 }
 278
 279 int __init da850_register_edma(struct edma_rsv_info *rsv[2])
 280 {
 281         if (rsv) {
 282                 da850_edma_cc_info[0].rsv = rsv[0];
 283                 da850_edma_cc_info[1].rsv = rsv[1];
 284         }
 285
 286         return platform_device_register(&da850_edma_device);
 287 }
 288
 289 static struct resource da8xx_i2c_resources0[] = {
 290         {
 291                 .start  = DA8XX_I2C0_BASE,
 292                 .end    = DA8XX_I2C0_BASE + SZ_4K - 1,
 293                 .flags  = IORESOURCE_MEM,
 294         },
 295         {
 296                 .start  = IRQ_DA8XX_I2CINT0,
 297                 .end    = IRQ_DA8XX_I2CINT0,
 298                 .flags  = IORESOURCE_IRQ,
 299         },
 300 };
 301
 302 static struct platform_device da8xx_i2c_device0 = {
 303         .name           = "i2c_davinci",
 304         .id             = 1,
 305         .num_resources  = ARRAY_SIZE(da8xx_i2c_resources0),
 306         .resource       = da8xx_i2c_resources0,
 307 };
 308
 309 static struct resource da8xx_i2c_resources1[] = {
 310         {
 311                 .start  = DA8XX_I2C1_BASE,
 312                 .end    = DA8XX_I2C1_BASE + SZ_4K - 1,
 313                 .flags  = IORESOURCE_MEM,
 314         },
 315         {
 316                 .start  = IRQ_DA8XX_I2CINT1,
 317                 .end    = IRQ_DA8XX_I2CINT1,
 318                 .flags  = IORESOURCE_IRQ,
 319         },
 320 };
 321
 322 static struct platform_device da8xx_i2c_device1 = {
 323         .name           = "i2c_davinci",
 324         .id             = 2,
 325         .num_resources  = ARRAY_SIZE(da8xx_i2c_resources1),
 326         .resource       = da8xx_i2c_resources1,
 327 };
 328
 329 int __init da8xx_register_i2c(int instance,
 330                 struct davinci_i2c_platform_data *pdata)
 331 {
 332         struct platform_device *pdev;
 333
 334         if (instance == 0)
 335                 pdev = &da8xx_i2c_device0;
 336         else if (instance == 1)
 337                 pdev = &da8xx_i2c_device1;
 338         else
 339                 return -EINVAL;
 340
 341         pdev->dev.platform_data = pdata;
 342         return platform_device_register(pdev);
 343 }
 344
 345 static struct resource da8xx_watchdog_resources[] = {
 346         {
 347                 .start  = DA8XX_WDOG_BASE,
 348                 .end    = DA8XX_WDOG_BASE + SZ_4K - 1,
 349                 .flags  = IORESOURCE_MEM,
 350         },
 351 };
 352
 353 struct platform_device da8xx_wdt_device = {
 354         .name           = "watchdog",
 355         .id             = -1,
 356         .num_resources  = ARRAY_SIZE(da8xx_watchdog_resources),
 357         .resource       = da8xx_watchdog_resources,
 358 };
 359
 360 int __init da8xx_register_watchdog(void)
 361 {
 362         return platform_device_register(&da8xx_wdt_device);
 363 }
 364
 365 static struct resource da8xx_emac_resources[] = {
 366         {
 367                 .start  = DA8XX_EMAC_CPPI_PORT_BASE,
 368                 .end    = DA8XX_EMAC_CPPI_PORT_BASE + SZ_16K - 1,
 369                 .flags  = IORESOURCE_MEM,
 370         },
 371         {
 372                 .start  = IRQ_DA8XX_C0_RX_THRESH_PULSE,
 373                 .end    = IRQ_DA8XX_C0_RX_THRESH_PULSE,
 374                 .flags  = IORESOURCE_IRQ,
 375         },
 376         {
 377                 .start  = IRQ_DA8XX_C0_RX_PULSE,
 378                 .end    = IRQ_DA8XX_C0_RX_PULSE,
 379                 .flags  = IORESOURCE_IRQ,
 380         },
 381         {
 382                 .start  = IRQ_DA8XX_C0_TX_PULSE,
 383                 .end    = IRQ_DA8XX_C0_TX_PULSE,
 384                 .flags  = IORESOURCE_IRQ,
 385         },
 386         {
 387                 .start  = IRQ_DA8XX_C0_MISC_PULSE,
 388                 .end    = IRQ_DA8XX_C0_MISC_PULSE,
 389                 .flags  = IORESOURCE_IRQ,
 390         },
 391 };
 392
 393 struct emac_platform_data da8xx_emac_pdata = {
 394         .ctrl_reg_offset        = DA8XX_EMAC_CTRL_REG_OFFSET,
 395         .ctrl_mod_reg_offset    = DA8XX_EMAC_MOD_REG_OFFSET,
 396         .ctrl_ram_offset        = DA8XX_EMAC_RAM_OFFSET,
 397         .ctrl_ram_size          = DA8XX_EMAC_CTRL_RAM_SIZE,
 398         .version                = EMAC_VERSION_2,
 399 };
 400
 401 static struct platform_device da8xx_emac_device = {
 402         .name           = "davinci_emac",
 403         .id             = 1,
 404         .dev = {
 405                 .platform_data  = &da8xx_emac_pdata,
 406         },
 407         .num_resources  = ARRAY_SIZE(da8xx_emac_resources),
 408         .resource       = da8xx_emac_resources,
 409 };
 410
 411 static struct resource da8xx_mdio_resources[] = {
 412         {
 413                 .start  = DA8XX_EMAC_MDIO_BASE,
 414                 .end    = DA8XX_EMAC_MDIO_BASE + SZ_4K - 1,
 415                 .flags  = IORESOURCE_MEM,
 416         },
 417 };
 418
 419 static struct platform_device da8xx_mdio_device = {
 420         .name           = "davinci_mdio",
 421         .id             = 0,
 422         .num_resources  = ARRAY_SIZE(da8xx_mdio_resources),
 423         .resource       = da8xx_mdio_resources,
 424 };
 425
 426 int __init da8xx_register_emac(void)
 427 {
 428         int ret;
 429
 430         ret = platform_device_register(&da8xx_mdio_device);
 431         if (ret < 0)
 432                 return ret;
 433         ret = platform_device_register(&da8xx_emac_device);
 434         if (ret < 0)
 435                 return ret;
 436         ret = clk_add_alias(NULL, dev_name(&da8xx_mdio_device.dev),
 437                             NULL, &da8xx_emac_device.dev);
 438         return ret;
 439 }
 440
 441 static struct resource da830_mcasp1_resources[] = {
 442         {
 443                 .name   = "mcasp1",
 444                 .start  = DAVINCI_DA830_MCASP1_REG_BASE,
 445                 .end    = DAVINCI_DA830_MCASP1_REG_BASE + (SZ_1K * 12) - 1,
 446                 .flags  = IORESOURCE_MEM,
 447         },
 448         /* TX event */
 449         {
 450                 .start  = DAVINCI_DA830_DMA_MCASP1_AXEVT,
 451                 .end    = DAVINCI_DA830_DMA_MCASP1_AXEVT,
 452                 .flags  = IORESOURCE_DMA,
 453         },
 454         /* RX event */
 455         {
 456                 .start  = DAVINCI_DA830_DMA_MCASP1_AREVT,
 457                 .end    = DAVINCI_DA830_DMA_MCASP1_AREVT,
 458                 .flags  = IORESOURCE_DMA,
 459         },
 460 };
 461
 462 static struct platform_device da830_mcasp1_device = {
 463         .name           = "davinci-mcasp",
 464         .id             = 1,
 465         .num_resources  = ARRAY_SIZE(da830_mcasp1_resources),
 466         .resource       = da830_mcasp1_resources,
 467 };
 468
 469 static struct resource da850_mcasp_resources[] = {
 470         {
 471                 .name   = "mcasp",
 472                 .start  = DAVINCI_DA8XX_MCASP0_REG_BASE,
 473                 .end    = DAVINCI_DA8XX_MCASP0_REG_BASE + (SZ_1K * 12) - 1,
 474                 .flags  = IORESOURCE_MEM,
 475         },
 476         /* TX event */
 477         {
 478                 .start  = DAVINCI_DA8XX_DMA_MCASP0_AXEVT,
 479                 .end    = DAVINCI_DA8XX_DMA_MCASP0_AXEVT,
 480                 .flags  = IORESOURCE_DMA,
 481         },
 482         /* RX event */
 483         {
 484                 .start  = DAVINCI_DA8XX_DMA_MCASP0_AREVT,
 485                 .end    = DAVINCI_DA8XX_DMA_MCASP0_AREVT,
 486                 .flags  = IORESOURCE_DMA,
 487         },
 488 };
 489
 490 static struct platform_device da850_mcasp_device = {
 491         .name           = "davinci-mcasp",
 492         .id             = 0,
 493         .num_resources  = ARRAY_SIZE(da850_mcasp_resources),
 494         .resource       = da850_mcasp_resources,
 495 };
 496
 497 static struct platform_device davinci_pcm_device = {
 498         .name   = "davinci-pcm-audio",
 499         .id     = -1,
 500 };
 501
 502 void __init da8xx_register_mcasp(int id, struct snd_platform_data *pdata)
 503 {
 504         platform_device_register(&davinci_pcm_device);
 505
 506         /* DA830/OMAP-L137 has 3 instances of McASP */
 507         if (cpu_is_davinci_da830() && id == 1) {
 508                 da830_mcasp1_device.dev.platform_data = pdata;
 509                 platform_device_register(&da830_mcasp1_device);
 510         } else if (cpu_is_davinci_da850()) {
 511                 da850_mcasp_device.dev.platform_data = pdata;
 512                 platform_device_register(&da850_mcasp_device);
 513         }
 514 }
 515
 516 static const struct display_panel disp_panel = {
 517         QVGA,
 518         16,
 519         16,
 520         COLOR_ACTIVE,
 521 };
 522
 523 static struct lcd_ctrl_config lcd_cfg = {
 524         &disp_panel,
 525         .ac_bias                = 255,
 526         .ac_bias_intrpt         = 0,
 527         .dma_burst_sz           = 16,
 528         .bpp                    = 16,
 529         .fdd                    = 255,
 530         .tft_alt_mode           = 0,
 531         .stn_565_mode           = 0,
 532         .mono_8bit_mode         = 0,
 533         .invert_line_clock      = 1,
 534         .invert_frm_clock       = 1,
 535         .sync_edge              = 0,
 536         .sync_ctrl              = 1,
 537         .raster_order           = 0,
 538 };
 539
 540 struct da8xx_lcdc_platform_data sharp_lcd035q3dg01_pdata = {
 541         .manu_name              = "sharp",
 542         .controller_data        = &lcd_cfg,
 543         .type                   = "Sharp_LCD035Q3DG01",
 544 };
 545
 546 struct da8xx_lcdc_platform_data sharp_lk043t1dg01_pdata = {
 547         .manu_name              = "sharp",
 548         .controller_data        = &lcd_cfg,
 549         .type                   = "Sharp_LK043T1DG01",
 550 };
 551
 552 static struct resource da8xx_lcdc_resources[] = {
 553         [0] = { /* registers */
 554                 .start  = DA8XX_LCD_CNTRL_BASE,
 555                 .end    = DA8XX_LCD_CNTRL_BASE + SZ_4K - 1,
 556                 .flags  = IORESOURCE_MEM,
 557         },
 558         [1] = { /* interrupt */
 559                 .start  = IRQ_DA8XX_LCDINT,
 560                 .end    = IRQ_DA8XX_LCDINT,
 561                 .flags  = IORESOURCE_IRQ,
 562         },
 563 };
 564
 565 static struct platform_device da8xx_lcdc_device = {
 566         .name           = "da8xx_lcdc",
 567         .id             = 0,
 568         .num_resources  = ARRAY_SIZE(da8xx_lcdc_resources),
 569         .resource       = da8xx_lcdc_resources,
 570 };
 571
 572 int __init da8xx_register_lcdc(struct da8xx_lcdc_platform_data *pdata)
 573 {
 574         da8xx_lcdc_device.dev.platform_data = pdata;
 575         return platform_device_register(&da8xx_lcdc_device);
 576 }
 577
 578 static struct resource da8xx_mmcsd0_resources[] = {
 579         {               /* registers */
 580                 .start  = DA8XX_MMCSD0_BASE,
 581                 .end    = DA8XX_MMCSD0_BASE + SZ_4K - 1,
 582                 .flags  = IORESOURCE_MEM,
 583         },
 584         {               /* interrupt */
 585                 .start  = IRQ_DA8XX_MMCSDINT0,
 586                 .end    = IRQ_DA8XX_MMCSDINT0,
 587                 .flags  = IORESOURCE_IRQ,
 588         },
 589         {               /* DMA RX */
 590                 .start  = DA8XX_DMA_MMCSD0_RX,
 591                 .end    = DA8XX_DMA_MMCSD0_RX,
 592                 .flags  = IORESOURCE_DMA,
 593         },
 594         {               /* DMA TX */
 595                 .start  = DA8XX_DMA_MMCSD0_TX,
 596                 .end    = DA8XX_DMA_MMCSD0_TX,
 597                 .flags  = IORESOURCE_DMA,
 598         },
 599 };
 600
 601 static struct platform_device da8xx_mmcsd0_device = {
 602         .name           = "davinci_mmc",
 603         .id             = 0,
 604         .num_resources  = ARRAY_SIZE(da8xx_mmcsd0_resources),
 605         .resource       = da8xx_mmcsd0_resources,
 606 };
 607
 608 int __init da8xx_register_mmcsd0(struct davinci_mmc_config *config)
 609 {
 610         da8xx_mmcsd0_device.dev.platform_data = config;
 611         return platform_device_register(&da8xx_mmcsd0_device);
 612 }
 613
 614 #ifdef CONFIG_ARCH_DAVINCI_DA850
 615 static struct resource da850_mmcsd1_resources[] = {
 616         {               /* registers */
 617                 .start  = DA850_MMCSD1_BASE,
 618                 .end    = DA850_MMCSD1_BASE + SZ_4K - 1,
 619                 .flags  = IORESOURCE_MEM,
 620         },
 621         {               /* interrupt */
 622                 .start  = IRQ_DA850_MMCSDINT0_1,
 623                 .end    = IRQ_DA850_MMCSDINT0_1,
 624                 .flags  = IORESOURCE_IRQ,
 625         },
 626         {               /* DMA RX */
 627                 .start  = DA850_DMA_MMCSD1_RX,
 628                 .end    = DA850_DMA_MMCSD1_RX,
 629                 .flags  = IORESOURCE_DMA,
 630         },
 631         {               /* DMA TX */
 632                 .start  = DA850_DMA_MMCSD1_TX,
 633                 .end    = DA850_DMA_MMCSD1_TX,
 634                 .flags  = IORESOURCE_DMA,
 635         },
 636 };
 637
 638 static struct platform_device da850_mmcsd1_device = {
 639         .name           = "davinci_mmc",
 640         .id             = 1,
 641         .num_resources  = ARRAY_SIZE(da850_mmcsd1_resources),
 642         .resource       = da850_mmcsd1_resources,
 643 };
 644
 645 int __init da850_register_mmcsd1(struct davinci_mmc_config *config)
 646 {
 647         da850_mmcsd1_device.dev.platform_data = config;
 648         return platform_device_register(&da850_mmcsd1_device);
 649 }
 650 #endif
 651
 652 static struct resource da8xx_rtc_resources[] = {
 653         {
 654                 .start          = DA8XX_RTC_BASE,
 655                 .end            = DA8XX_RTC_BASE + SZ_4K - 1,
 656                 .flags          = IORESOURCE_MEM,
 657         },
 658         { /* timer irq */
 659                 .start          = IRQ_DA8XX_RTC,
 660                 .end            = IRQ_DA8XX_RTC,
 661                 .flags          = IORESOURCE_IRQ,
 662         },
 663         { /* alarm irq */
 664                 .start          = IRQ_DA8XX_RTC,
 665                 .end            = IRQ_DA8XX_RTC,
 666                 .flags          = IORESOURCE_IRQ,
 667         },
 668 };
 669
 670 static struct platform_device da8xx_rtc_device = {
 671         .name           = "omap_rtc",
 672         .id             = -1,
 673         .num_resources  = ARRAY_SIZE(da8xx_rtc_resources),
 674         .resource       = da8xx_rtc_resources,
 675 };
 676
 677 int da8xx_register_rtc(void)
 678 {
 679         int ret;
 680         void __iomem *base;
 681
 682         base = ioremap(DA8XX_RTC_BASE, SZ_4K);
 683         if (WARN_ON(!base))
 684                 return -ENOMEM;
 685
 686         /* Unlock the rtc's registers */
 687         __raw_writel(0x83e70b13, base + 0x6c);
 688         __raw_writel(0x95a4f1e0, base + 0x70);
 689
 690         iounmap(base);
 691
 692         ret = platform_device_register(&da8xx_rtc_device);
 693         if (!ret)
 694                 /* Atleast on DA850, RTC is a wakeup source */
 695                 device_init_wakeup(&da8xx_rtc_device.dev, true);
 696
 697         return ret;
 698 }
 699
 700 static void __iomem *da8xx_ddr2_ctlr_base;
 701 void __iomem * __init da8xx_get_mem_ctlr(void)
 702 {
 703         if (da8xx_ddr2_ctlr_base)
 704                 return da8xx_ddr2_ctlr_base;
 705
 706         da8xx_ddr2_ctlr_base = ioremap(DA8XX_DDR2_CTL_BASE, SZ_32K);
 707         if (!da8xx_ddr2_ctlr_base)
 708                 pr_warning("%s: Unable to map DDR2 controller", __func__);
 709
 710         return da8xx_ddr2_ctlr_base;
 711 }
 712
 713 static struct resource da8xx_cpuidle_resources[] = {
 714         {
 715                 .start          = DA8XX_DDR2_CTL_BASE,
 716                 .end            = DA8XX_DDR2_CTL_BASE + SZ_32K - 1,
 717                 .flags          = IORESOURCE_MEM,
 718         },
 719 };
 720
 721 /* DA8XX devices support DDR2 power down */
 722 static struct davinci_cpuidle_config da8xx_cpuidle_pdata = {
 723         .ddr2_pdown     = 1,
 724 };
 725
 726
 727 static struct platform_device da8xx_cpuidle_device = {
 728         .name                   = "cpuidle-davinci",
 729         .num_resources          = ARRAY_SIZE(da8xx_cpuidle_resources),
 730         .resource               = da8xx_cpuidle_resources,
 731         .dev = {
 732                 .platform_data  = &da8xx_cpuidle_pdata,
 733         },
 734 };
 735
 736 int __init da8xx_register_cpuidle(void)
 737 {
 738         da8xx_cpuidle_pdata.ddr2_ctlr_base = da8xx_get_mem_ctlr();
 739
 740         return platform_device_register(&da8xx_cpuidle_device);
 741 }
 742
 743 static struct resource da8xx_spi0_resources[] = {
 744         [0] = {
 745                 .start  = DA8XX_SPI0_BASE,
 746                 .end    = DA8XX_SPI0_BASE + SZ_4K - 1,
 747                 .flags  = IORESOURCE_MEM,
 748         },
 749         [1] = {
 750                 .start  = IRQ_DA8XX_SPINT0,
 751                 .end    = IRQ_DA8XX_SPINT0,
 752                 .flags  = IORESOURCE_IRQ,
 753         },
 754         [2] = {
 755                 .start  = DA8XX_DMA_SPI0_RX,
 756                 .end    = DA8XX_DMA_SPI0_RX,
 757                 .flags  = IORESOURCE_DMA,
 758         },
 759         [3] = {
 760                 .start  = DA8XX_DMA_SPI0_TX,
 761                 .end    = DA8XX_DMA_SPI0_TX,
 762                 .flags  = IORESOURCE_DMA,
 763         },
 764 };
 765
 766 static struct resource da8xx_spi1_resources[] = {
 767         [0] = {
 768                 .start  = DA830_SPI1_BASE,
 769                 .end    = DA830_SPI1_BASE + SZ_4K - 1,
 770                 .flags  = IORESOURCE_MEM,
 771         },
 772         [1] = {
 773                 .start  = IRQ_DA8XX_SPINT1,
 774                 .end    = IRQ_DA8XX_SPINT1,
 775                 .flags  = IORESOURCE_IRQ,
 776         },
 777         [2] = {
 778                 .start  = DA8XX_DMA_SPI1_RX,
 779                 .end    = DA8XX_DMA_SPI1_RX,
 780                 .flags  = IORESOURCE_DMA,
 781         },
 782         [3] = {
 783                 .start  = DA8XX_DMA_SPI1_TX,
 784                 .end    = DA8XX_DMA_SPI1_TX,
 785                 .flags  = IORESOURCE_DMA,
 786         },
 787 };
 788
 789 struct davinci_spi_platform_data da8xx_spi_pdata[] = {
 790         [0] = {
 791                 .version        = SPI_VERSION_2,
 792                 .intr_line      = 1,
 793                 .dma_event_q    = EVENTQ_0,
 794         },
 795         [1] = {
 796                 .version        = SPI_VERSION_2,
 797                 .intr_line      = 1,
 798                 .dma_event_q    = EVENTQ_0,
 799         },
 800 };
 801
 802 static struct platform_device da8xx_spi_device[] = {
 803         [0] = {
 804                 .name           = "spi_davinci",
 805                 .id             = 0,
 806                 .num_resources  = ARRAY_SIZE(da8xx_spi0_resources),
 807                 .resource       = da8xx_spi0_resources,
 808                 .dev            = {
 809                         .platform_data = &da8xx_spi_pdata[0],
 810                 },
 811         },
 812         [1] = {
 813                 .name           = "spi_davinci",
 814                 .id             = 1,
 815                 .num_resources  = ARRAY_SIZE(da8xx_spi1_resources),
 816                 .resource       = da8xx_spi1_resources,
 817                 .dev            = {
 818                         .platform_data = &da8xx_spi_pdata[1],
 819                 },
 820         },
 821 };
 822
 823 int __init da8xx_register_spi(int instance, struct spi_board_info *info,
 824                               unsigned len)
 825 {
 826         int ret;
 827
 828         if (instance < 0 || instance > 1)
 829                 return -EINVAL;
 830
 831         ret = spi_register_board_info(info, len);
 832         if (ret)
 833                 pr_warning("%s: failed to register board info for spi %d :"
 834                            " %d\n", __func__, instance, ret);
 835
 836         da8xx_spi_pdata[instance].num_chipselect = len;
 837
 838         if (instance == 1 && cpu_is_davinci_da850()) {
 839                 da8xx_spi1_resources[0].start = DA850_SPI1_BASE;
 840                 da8xx_spi1_resources[0].end = DA850_SPI1_BASE + SZ_4K - 1;
 841         }
 842
 843         return platform_device_register(&da8xx_spi_device[instance]);
 844 }