Merge branch 'drm-patches' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied...
[pandora-kernel.git] / arch / arm / mach-at91rm9200 / at91sam9261.c
1 /*
2  * arch/arm/mach-at91rm9200/at91sam9261.c
3  *
4  *  Copyright (C) 2005 SAN People
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  */
12
13 #include <linux/module.h>
14
15 #include <asm/mach/arch.h>
16 #include <asm/mach/map.h>
17 #include <asm/arch/at91sam9261.h>
18 #include <asm/arch/at91_pmc.h>
19
20 #include "generic.h"
21 #include "clock.h"
22
23 static struct map_desc at91sam9261_io_desc[] __initdata = {
24         {
25                 .virtual        = AT91_VA_BASE_SYS,
26                 .pfn            = __phys_to_pfn(AT91_BASE_SYS),
27                 .length         = SZ_16K,
28                 .type           = MT_DEVICE,
29         }, {
30                 .virtual        = AT91_IO_VIRT_BASE - AT91SAM9261_SRAM_SIZE,
31                 .pfn            = __phys_to_pfn(AT91SAM9261_SRAM_BASE),
32                 .length         = AT91SAM9261_SRAM_SIZE,
33                 .type           = MT_DEVICE,
34         },
35 };
36
37 /* --------------------------------------------------------------------
38  *  Clocks
39  * -------------------------------------------------------------------- */
40
41 /*
42  * The peripheral clocks.
43  */
44 static struct clk pioA_clk = {
45         .name           = "pioA_clk",
46         .pmc_mask       = 1 << AT91SAM9261_ID_PIOA,
47         .type           = CLK_TYPE_PERIPHERAL,
48 };
49 static struct clk pioB_clk = {
50         .name           = "pioB_clk",
51         .pmc_mask       = 1 << AT91SAM9261_ID_PIOB,
52         .type           = CLK_TYPE_PERIPHERAL,
53 };
54 static struct clk pioC_clk = {
55         .name           = "pioC_clk",
56         .pmc_mask       = 1 << AT91SAM9261_ID_PIOC,
57         .type           = CLK_TYPE_PERIPHERAL,
58 };
59 static struct clk usart0_clk = {
60         .name           = "usart0_clk",
61         .pmc_mask       = 1 << AT91SAM9261_ID_US0,
62         .type           = CLK_TYPE_PERIPHERAL,
63 };
64 static struct clk usart1_clk = {
65         .name           = "usart1_clk",
66         .pmc_mask       = 1 << AT91SAM9261_ID_US1,
67         .type           = CLK_TYPE_PERIPHERAL,
68 };
69 static struct clk usart2_clk = {
70         .name           = "usart2_clk",
71         .pmc_mask       = 1 << AT91SAM9261_ID_US2,
72         .type           = CLK_TYPE_PERIPHERAL,
73 };
74 static struct clk mmc_clk = {
75         .name           = "mci_clk",
76         .pmc_mask       = 1 << AT91SAM9261_ID_MCI,
77         .type           = CLK_TYPE_PERIPHERAL,
78 };
79 static struct clk udc_clk = {
80         .name           = "udc_clk",
81         .pmc_mask       = 1 << AT91SAM9261_ID_UDP,
82         .type           = CLK_TYPE_PERIPHERAL,
83 };
84 static struct clk twi_clk = {
85         .name           = "twi_clk",
86         .pmc_mask       = 1 << AT91SAM9261_ID_TWI,
87         .type           = CLK_TYPE_PERIPHERAL,
88 };
89 static struct clk spi0_clk = {
90         .name           = "spi0_clk",
91         .pmc_mask       = 1 << AT91SAM9261_ID_SPI0,
92         .type           = CLK_TYPE_PERIPHERAL,
93 };
94 static struct clk spi1_clk = {
95         .name           = "spi1_clk",
96         .pmc_mask       = 1 << AT91SAM9261_ID_SPI1,
97         .type           = CLK_TYPE_PERIPHERAL,
98 };
99 static struct clk ohci_clk = {
100         .name           = "ohci_clk",
101         .pmc_mask       = 1 << AT91SAM9261_ID_UHP,
102         .type           = CLK_TYPE_PERIPHERAL,
103 };
104 static struct clk lcdc_clk = {
105         .name           = "lcdc_clk",
106         .pmc_mask       = 1 << AT91SAM9261_ID_LCDC,
107         .type           = CLK_TYPE_PERIPHERAL,
108 };
109
110 static struct clk *periph_clocks[] __initdata = {
111         &pioA_clk,
112         &pioB_clk,
113         &pioC_clk,
114         &usart0_clk,
115         &usart1_clk,
116         &usart2_clk,
117         &mmc_clk,
118         &udc_clk,
119         &twi_clk,
120         &spi0_clk,
121         &spi1_clk,
122         // ssc 0 .. ssc2
123         // tc0 .. tc2
124         &ohci_clk,
125         &lcdc_clk,
126         // irq0 .. irq2
127 };
128
129 /*
130  * The four programmable clocks.
131  * You must configure pin multiplexing to bring these signals out.
132  */
133 static struct clk pck0 = {
134         .name           = "pck0",
135         .pmc_mask       = AT91_PMC_PCK0,
136         .type           = CLK_TYPE_PROGRAMMABLE,
137         .id             = 0,
138 };
139 static struct clk pck1 = {
140         .name           = "pck1",
141         .pmc_mask       = AT91_PMC_PCK1,
142         .type           = CLK_TYPE_PROGRAMMABLE,
143         .id             = 1,
144 };
145 static struct clk pck2 = {
146         .name           = "pck2",
147         .pmc_mask       = AT91_PMC_PCK2,
148         .type           = CLK_TYPE_PROGRAMMABLE,
149         .id             = 2,
150 };
151 static struct clk pck3 = {
152         .name           = "pck3",
153         .pmc_mask       = AT91_PMC_PCK3,
154         .type           = CLK_TYPE_PROGRAMMABLE,
155         .id             = 3,
156 };
157
158 /* HClocks */
159 static struct clk hck0 = {
160         .name           = "hck0",
161         .pmc_mask       = AT91_PMC_HCK0,
162         .type           = CLK_TYPE_SYSTEM,
163         .id             = 0,
164 };
165 static struct clk hck1 = {
166         .name           = "hck1",
167         .pmc_mask       = AT91_PMC_HCK1,
168         .type           = CLK_TYPE_SYSTEM,
169         .id             = 1,
170 };
171
172 static void __init at91sam9261_register_clocks(void)
173 {
174         int i;
175
176         for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
177                 clk_register(periph_clocks[i]);
178
179         clk_register(&pck0);
180         clk_register(&pck1);
181         clk_register(&pck2);
182         clk_register(&pck3);
183
184         clk_register(&hck0);
185         clk_register(&hck1);
186 }
187
188 /* --------------------------------------------------------------------
189  *  GPIO
190  * -------------------------------------------------------------------- */
191
192 static struct at91_gpio_bank at91sam9261_gpio[] = {
193         {
194                 .id             = AT91SAM9261_ID_PIOA,
195                 .offset         = AT91_PIOA,
196                 .clock          = &pioA_clk,
197         }, {
198                 .id             = AT91SAM9261_ID_PIOB,
199                 .offset         = AT91_PIOB,
200                 .clock          = &pioB_clk,
201         }, {
202                 .id             = AT91SAM9261_ID_PIOC,
203                 .offset         = AT91_PIOC,
204                 .clock          = &pioC_clk,
205         }
206 };
207
208 static void at91sam9261_reset(void)
209 {
210 #warning "Implement CPU reset"
211 }
212
213
214 /* --------------------------------------------------------------------
215  *  AT91SAM9261 processor initialization
216  * -------------------------------------------------------------------- */
217
218 void __init at91sam9261_initialize(unsigned long main_clock)
219 {
220         /* Map peripherals */
221         iotable_init(at91sam9261_io_desc, ARRAY_SIZE(at91sam9261_io_desc));
222
223         at91_arch_reset = at91sam9261_reset;
224         at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1)
225                         | (1 << AT91SAM9261_ID_IRQ2);
226
227         /* Init clock subsystem */
228         at91_clock_init(main_clock);
229
230         /* Register the processor-specific clocks */
231         at91sam9261_register_clocks();
232
233         /* Register GPIO subsystem */
234         at91_gpio_init(at91sam9261_gpio, 3);
235 }
236
237 /* --------------------------------------------------------------------
238  *  Interrupt initialization
239  * -------------------------------------------------------------------- */
240
241 /*
242  * The default interrupt priority levels (0 = lowest, 7 = highest).
243  */
244 static unsigned int at91sam9261_default_irq_priority[NR_AIC_IRQS] __initdata = {
245         7,      /* Advanced Interrupt Controller */
246         7,      /* System Peripherals */
247         0,      /* Parallel IO Controller A */
248         0,      /* Parallel IO Controller B */
249         0,      /* Parallel IO Controller C */
250         0,
251         6,      /* USART 0 */
252         6,      /* USART 1 */
253         6,      /* USART 2 */
254         0,      /* Multimedia Card Interface */
255         4,      /* USB Device Port */
256         0,      /* Two-Wire Interface */
257         6,      /* Serial Peripheral Interface 0 */
258         6,      /* Serial Peripheral Interface 1 */
259         5,      /* Serial Synchronous Controller 0 */
260         5,      /* Serial Synchronous Controller 1 */
261         5,      /* Serial Synchronous Controller 2 */
262         0,      /* Timer Counter 0 */
263         0,      /* Timer Counter 1 */
264         0,      /* Timer Counter 2 */
265         3,      /* USB Host port */
266         3,      /* LCD Controller */
267         0,
268         0,
269         0,
270         0,
271         0,
272         0,
273         0,
274         0,      /* Advanced Interrupt Controller */
275         0,      /* Advanced Interrupt Controller */
276         0,      /* Advanced Interrupt Controller */
277 };
278
279 void __init at91sam9261_init_interrupts(unsigned int priority[NR_AIC_IRQS])
280 {
281         if (!priority)
282                 priority = at91sam9261_default_irq_priority;
283
284         /* Initialize the AIC interrupt controller */
285         at91_aic_init(priority);
286
287         /* Enable GPIO interrupts */
288         at91_gpio_irq_setup();
289 }