Merge branch 'for-linus' of git://git.infradead.org/users/eparis/selinux into for...
[pandora-kernel.git] / arch / arm / mach-at91 / include / mach / cpu.h
1 /*
2  * arch/arm/mach-at91/include/mach/cpu.h
3  *
4  *  Copyright (C) 2006 SAN People
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  */
12
13 #ifndef __ASM_ARCH_CPU_H
14 #define __ASM_ARCH_CPU_H
15
16 #include <mach/hardware.h>
17 #include <mach/at91_dbgu.h>
18
19
20 #define ARCH_ID_AT91RM9200      0x09290780
21 #define ARCH_ID_AT91SAM9260     0x019803a0
22 #define ARCH_ID_AT91SAM9261     0x019703a0
23 #define ARCH_ID_AT91SAM9263     0x019607a0
24 #define ARCH_ID_AT91SAM9G10     0x019903a0
25 #define ARCH_ID_AT91SAM9G20     0x019905a0
26 #define ARCH_ID_AT91SAM9RL64    0x019b03a0
27 #define ARCH_ID_AT91SAM9G45     0x819b05a0
28 #define ARCH_ID_AT91SAM9G45MRL  0x819b05a2      /* aka 9G45-ES2 & non ES lots */
29 #define ARCH_ID_AT91SAM9G45ES   0x819b05a1      /* 9G45-ES (Engineering Sample) */
30 #define ARCH_ID_AT91SAM9X5      0x819a05a0
31 #define ARCH_ID_AT91CAP9        0x039A03A0
32
33 #define ARCH_ID_AT91SAM9XE128   0x329973a0
34 #define ARCH_ID_AT91SAM9XE256   0x329a93a0
35 #define ARCH_ID_AT91SAM9XE512   0x329aa3a0
36
37 #define ARCH_ID_AT91M40800      0x14080044
38 #define ARCH_ID_AT91R40807      0x44080746
39 #define ARCH_ID_AT91M40807      0x14080745
40 #define ARCH_ID_AT91R40008      0x44000840
41
42 static inline unsigned long at91_cpu_identify(void)
43 {
44         return (at91_sys_read(AT91_DBGU_CIDR) & ~AT91_CIDR_VERSION);
45 }
46
47 static inline unsigned long at91_cpu_fully_identify(void)
48 {
49         return at91_sys_read(AT91_DBGU_CIDR);
50 }
51
52 #define ARCH_EXID_AT91SAM9M11   0x00000001
53 #define ARCH_EXID_AT91SAM9M10   0x00000002
54 #define ARCH_EXID_AT91SAM9G46   0x00000003
55 #define ARCH_EXID_AT91SAM9G45   0x00000004
56
57 #define ARCH_EXID_AT91SAM9G15   0x00000000
58 #define ARCH_EXID_AT91SAM9G35   0x00000001
59 #define ARCH_EXID_AT91SAM9X35   0x00000002
60 #define ARCH_EXID_AT91SAM9G25   0x00000003
61 #define ARCH_EXID_AT91SAM9X25   0x00000004
62
63 static inline unsigned long at91_exid_identify(void)
64 {
65         return at91_sys_read(AT91_DBGU_EXID);
66 }
67
68
69 #define ARCH_FAMILY_AT91X92     0x09200000
70 #define ARCH_FAMILY_AT91SAM9    0x01900000
71 #define ARCH_FAMILY_AT91SAM9XE  0x02900000
72
73 static inline unsigned long at91_arch_identify(void)
74 {
75         return (at91_sys_read(AT91_DBGU_CIDR) & AT91_CIDR_ARCH);
76 }
77
78 #ifdef CONFIG_ARCH_AT91CAP9
79 #include <mach/at91_pmc.h>
80
81 #define ARCH_REVISION_CAP9_B    0x399
82 #define ARCH_REVISION_CAP9_C    0x601
83
84 static inline unsigned long at91cap9_rev_identify(void)
85 {
86         return (at91_sys_read(AT91_PMC_VER));
87 }
88 #endif
89
90 #ifdef CONFIG_ARCH_AT91RM9200
91 extern int rm9200_type;
92 #define ARCH_REVISON_9200_BGA   (0 << 0)
93 #define ARCH_REVISON_9200_PQFP  (1 << 0)
94 #define cpu_is_at91rm9200()     (at91_cpu_identify() == ARCH_ID_AT91RM9200)
95 #define cpu_is_at91rm9200_bga() (!cpu_is_at91rm9200_pqfp())
96 #define cpu_is_at91rm9200_pqfp() (cpu_is_at91rm9200() && rm9200_type & ARCH_REVISON_9200_PQFP)
97 #else
98 #define cpu_is_at91rm9200()     (0)
99 #define cpu_is_at91rm9200_bga() (0)
100 #define cpu_is_at91rm9200_pqfp() (0)
101 #endif
102
103 #ifdef CONFIG_ARCH_AT91SAM9260
104 #define cpu_is_at91sam9xe()     (at91_arch_identify() == ARCH_FAMILY_AT91SAM9XE)
105 #define cpu_is_at91sam9260()    ((at91_cpu_identify() == ARCH_ID_AT91SAM9260) || cpu_is_at91sam9xe())
106 #else
107 #define cpu_is_at91sam9xe()     (0)
108 #define cpu_is_at91sam9260()    (0)
109 #endif
110
111 #ifdef CONFIG_ARCH_AT91SAM9G20
112 #define cpu_is_at91sam9g20()    (at91_cpu_identify() == ARCH_ID_AT91SAM9G20)
113 #else
114 #define cpu_is_at91sam9g20()    (0)
115 #endif
116
117 #ifdef CONFIG_ARCH_AT91SAM9261
118 #define cpu_is_at91sam9261()    (at91_cpu_identify() == ARCH_ID_AT91SAM9261)
119 #else
120 #define cpu_is_at91sam9261()    (0)
121 #endif
122
123 #ifdef CONFIG_ARCH_AT91SAM9G10
124 #define cpu_is_at91sam9g10()    ((at91_cpu_identify() & ~AT91_CIDR_EXT) == ARCH_ID_AT91SAM9G10)
125 #else
126 #define cpu_is_at91sam9g10()    (0)
127 #endif
128
129 #ifdef CONFIG_ARCH_AT91SAM9263
130 #define cpu_is_at91sam9263()    (at91_cpu_identify() == ARCH_ID_AT91SAM9263)
131 #else
132 #define cpu_is_at91sam9263()    (0)
133 #endif
134
135 #ifdef CONFIG_ARCH_AT91SAM9RL
136 #define cpu_is_at91sam9rl()     (at91_cpu_identify() == ARCH_ID_AT91SAM9RL64)
137 #else
138 #define cpu_is_at91sam9rl()     (0)
139 #endif
140
141 #ifdef CONFIG_ARCH_AT91SAM9G45
142 #define cpu_is_at91sam9g45()    (at91_cpu_identify() == ARCH_ID_AT91SAM9G45)
143 #define cpu_is_at91sam9g45es()  (at91_cpu_fully_identify() == ARCH_ID_AT91SAM9G45ES)
144 #define cpu_is_at91sam9m10()    (cpu_is_at91sam9g45() && \
145                                 (at91_exid_identify() == ARCH_EXID_AT91SAM9M10))
146 #define cpu_is_at91sam9m46()    (cpu_is_at91sam9g45() && \
147                                 (at91_exid_identify() == ARCH_EXID_AT91SAM9G46))
148 #define cpu_is_at91sam9m11()    (cpu_is_at91sam9g45() && \
149                                 (at91_exid_identify() == ARCH_EXID_AT91SAM9M11))
150 #else
151 #define cpu_is_at91sam9g45()    (0)
152 #define cpu_is_at91sam9g45es()  (0)
153 #define cpu_is_at91sam9m10()    (0)
154 #define cpu_is_at91sam9g46()    (0)
155 #define cpu_is_at91sam9m11()    (0)
156 #endif
157
158 #ifdef CONFIG_ARCH_AT91SAM9X5
159 #define cpu_is_at91sam9x5()     (at91_cpu_identify() == ARCH_ID_AT91SAM9X5)
160 #define cpu_is_at91sam9g15()    (cpu_is_at91sam9x5() && \
161                                 (at91_exid_identify() == ARCH_EXID_AT91SAM9G15))
162 #define cpu_is_at91sam9g35()    (cpu_is_at91sam9x5() && \
163                                 (at91_exid_identify() == ARCH_EXID_AT91SAM9G35))
164 #define cpu_is_at91sam9x35()    (cpu_is_at91sam9x5() && \
165                                 (at91_exid_identify() == ARCH_EXID_AT91SAM9X35))
166 #define cpu_is_at91sam9g25()    (cpu_is_at91sam9x5() && \
167                                 (at91_exid_identify() == ARCH_EXID_AT91SAM9G25))
168 #define cpu_is_at91sam9x25()    (cpu_is_at91sam9x5() && \
169                                 (at91_exid_identify() == ARCH_EXID_AT91SAM9X25))
170 #else
171 #define cpu_is_at91sam9x5()     (0)
172 #define cpu_is_at91sam9g15()    (0)
173 #define cpu_is_at91sam9g35()    (0)
174 #define cpu_is_at91sam9x35()    (0)
175 #define cpu_is_at91sam9g25()    (0)
176 #define cpu_is_at91sam9x25()    (0)
177 #endif
178
179 #ifdef CONFIG_ARCH_AT91CAP9
180 #define cpu_is_at91cap9()       (at91_cpu_identify() == ARCH_ID_AT91CAP9)
181 #define cpu_is_at91cap9_revB()  (at91cap9_rev_identify() == ARCH_REVISION_CAP9_B)
182 #define cpu_is_at91cap9_revC()  (at91cap9_rev_identify() == ARCH_REVISION_CAP9_C)
183 #else
184 #define cpu_is_at91cap9()       (0)
185 #define cpu_is_at91cap9_revB()  (0)
186 #define cpu_is_at91cap9_revC()  (0)
187 #endif
188
189 /*
190  * Since this is ARM, we will never run on any AVR32 CPU. But these
191  * definitions may reduce clutter in common drivers.
192  */
193 #define cpu_is_at32ap7000()     (0)
194
195 #endif