arch/arm/mach-at91/include/mach/cpu.h

   1 /*
   2  * arch/arm/mach-at91/include/mach/cpu.h
   3  *
   4  *  Copyright (C) 2006 SAN People
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  */
  12
  13 #ifndef __ASM_ARCH_CPU_H
  14 #define __ASM_ARCH_CPU_H
  15
  16 #include <mach/hardware.h>
  17 #include <mach/at91_dbgu.h>
  18
  19
  20 #define ARCH_ID_AT91RM9200      0x09290780
  21 #define ARCH_ID_AT91SAM9260     0x019803a0
  22 #define ARCH_ID_AT91SAM9261     0x019703a0
  23 #define ARCH_ID_AT91SAM9263     0x019607a0
  24 #define ARCH_ID_AT91SAM9G10     0x019903a0
  25 #define ARCH_ID_AT91SAM9G20     0x019905a0
  26 #define ARCH_ID_AT91SAM9RL64    0x019b03a0
  27 #define ARCH_ID_AT91SAM9G45     0x819b05a0
  28 #define ARCH_ID_AT91SAM9G45MRL  0x819b05a2      /* aka 9G45-ES2 & non ES lots */
  29 #define ARCH_ID_AT91SAM9G45ES   0x819b05a1      /* 9G45-ES (Engineering Sample) */
  30 #define ARCH_ID_AT91CAP9        0x039A03A0
  31
  32 #define ARCH_ID_AT91SAM9XE128   0x329973a0
  33 #define ARCH_ID_AT91SAM9XE256   0x329a93a0
  34 #define ARCH_ID_AT91SAM9XE512   0x329aa3a0
  35
  36 #define ARCH_ID_AT572D940HF     0x0e0303e0
  37
  38 #define ARCH_ID_AT91M40800      0x14080044
  39 #define ARCH_ID_AT91R40807      0x44080746
  40 #define ARCH_ID_AT91M40807      0x14080745
  41 #define ARCH_ID_AT91R40008      0x44000840
  42
  43 static inline unsigned long at91_cpu_identify(void)
  44 {
  45         return (at91_sys_read(AT91_DBGU_CIDR) & ~AT91_CIDR_VERSION);
  46 }
  47
  48 static inline unsigned long at91_cpu_fully_identify(void)
  49 {
  50         return at91_sys_read(AT91_DBGU_CIDR);
  51 }
  52
  53 #define ARCH_EXID_AT91SAM9M11   0x00000001
  54 #define ARCH_EXID_AT91SAM9M10   0x00000002
  55 #define ARCH_EXID_AT91SAM9G46   0x00000003
  56 #define ARCH_EXID_AT91SAM9G45   0x00000004
  57
  58 static inline unsigned long at91_exid_identify(void)
  59 {
  60         return at91_sys_read(AT91_DBGU_EXID);
  61 }
  62
  63
  64 #define ARCH_FAMILY_AT91X92     0x09200000
  65 #define ARCH_FAMILY_AT91SAM9    0x01900000
  66 #define ARCH_FAMILY_AT91SAM9XE  0x02900000
  67
  68 static inline unsigned long at91_arch_identify(void)
  69 {
  70         return (at91_sys_read(AT91_DBGU_CIDR) & AT91_CIDR_ARCH);
  71 }
  72
  73 #ifdef CONFIG_ARCH_AT91CAP9
  74 #include <mach/at91_pmc.h>
  75
  76 #define ARCH_REVISION_CAP9_B    0x399
  77 #define ARCH_REVISION_CAP9_C    0x601
  78
  79 static inline unsigned long at91cap9_rev_identify(void)
  80 {
  81         return (at91_sys_read(AT91_PMC_VER));
  82 }
  83 #endif
  84
  85 #ifdef CONFIG_ARCH_AT91RM9200
  86 #define cpu_is_at91rm9200()     (at91_cpu_identify() == ARCH_ID_AT91RM9200)
  87 #else
  88 #define cpu_is_at91rm9200()     (0)
  89 #endif
  90
  91 #ifdef CONFIG_ARCH_AT91SAM9260
  92 #define cpu_is_at91sam9xe()     (at91_arch_identify() == ARCH_FAMILY_AT91SAM9XE)
  93 #define cpu_is_at91sam9260()    ((at91_cpu_identify() == ARCH_ID_AT91SAM9260) || cpu_is_at91sam9xe())
  94 #else
  95 #define cpu_is_at91sam9xe()     (0)
  96 #define cpu_is_at91sam9260()    (0)
  97 #endif
  98
  99 #ifdef CONFIG_ARCH_AT91SAM9G20
 100 #define cpu_is_at91sam9g20()    (at91_cpu_identify() == ARCH_ID_AT91SAM9G20)
 101 #else
 102 #define cpu_is_at91sam9g20()    (0)
 103 #endif
 104
 105 #ifdef CONFIG_ARCH_AT91SAM9261
 106 #define cpu_is_at91sam9261()    (at91_cpu_identify() == ARCH_ID_AT91SAM9261)
 107 #else
 108 #define cpu_is_at91sam9261()    (0)
 109 #endif
 110
 111 #ifdef CONFIG_ARCH_AT91SAM9G10
 112 #define cpu_is_at91sam9g10()    ((at91_cpu_identify() & ~AT91_CIDR_EXT) == ARCH_ID_AT91SAM9G10)
 113 #else
 114 #define cpu_is_at91sam9g10()    (0)
 115 #endif
 116
 117 #ifdef CONFIG_ARCH_AT91SAM9263
 118 #define cpu_is_at91sam9263()    (at91_cpu_identify() == ARCH_ID_AT91SAM9263)
 119 #else
 120 #define cpu_is_at91sam9263()    (0)
 121 #endif
 122
 123 #ifdef CONFIG_ARCH_AT91SAM9RL
 124 #define cpu_is_at91sam9rl()     (at91_cpu_identify() == ARCH_ID_AT91SAM9RL64)
 125 #else
 126 #define cpu_is_at91sam9rl()     (0)
 127 #endif
 128
 129 #ifdef CONFIG_ARCH_AT91SAM9G45
 130 #define cpu_is_at91sam9g45()    (at91_cpu_identify() == ARCH_ID_AT91SAM9G45)
 131 #define cpu_is_at91sam9g45es()  (at91_cpu_fully_identify() == ARCH_ID_AT91SAM9G45ES)
 132 #define cpu_is_at91sam9m10()    (cpu_is_at91sam9g45() && \
 133                                 (at91_exid_identify() == ARCH_EXID_AT91SAM9M10))
 134 #define cpu_is_at91sam9m46()    (cpu_is_at91sam9g45() && \
 135                                 (at91_exid_identify() == ARCH_EXID_AT91SAM9G46))
 136 #define cpu_is_at91sam9m11()    (cpu_is_at91sam9g45() && \
 137                                 (at91_exid_identify() == ARCH_EXID_AT91SAM9M11))
 138 #else
 139 #define cpu_is_at91sam9g45()    (0)
 140 #define cpu_is_at91sam9g45es()  (0)
 141 #define cpu_is_at91sam9m10()    (0)
 142 #define cpu_is_at91sam9g46()    (0)
 143 #define cpu_is_at91sam9m11()    (0)
 144 #endif
 145
 146 #ifdef CONFIG_ARCH_AT91CAP9
 147 #define cpu_is_at91cap9()       (at91_cpu_identify() == ARCH_ID_AT91CAP9)
 148 #define cpu_is_at91cap9_revB()  (at91cap9_rev_identify() == ARCH_REVISION_CAP9_B)
 149 #define cpu_is_at91cap9_revC()  (at91cap9_rev_identify() == ARCH_REVISION_CAP9_C)
 150 #else
 151 #define cpu_is_at91cap9()       (0)
 152 #define cpu_is_at91cap9_revB()  (0)
 153 #define cpu_is_at91cap9_revC()  (0)
 154 #endif
 155
 156 #ifdef CONFIG_ARCH_AT572D940HF
 157 #define cpu_is_at572d940hf() (at91_cpu_identify() == ARCH_ID_AT572D940HF)
 158 #else
 159 #define cpu_is_at572d940hf() (0)
 160 #endif
 161
 162 /*
 163  * Since this is ARM, we will never run on any AVR32 CPU. But these
 164  * definitions may reduce clutter in common drivers.
 165  */
 166 #define cpu_is_at32ap7000()     (0)
 167
 168 #endif