arch/arm/mach-at91/board-sam9rlek.c

   1 /*
   2  *  Copyright (C) 2005 SAN People
   3  *  Copyright (C) 2007 Atmel Corporation
   4  *
   5  * This file is subject to the terms and conditions of the GNU General Public
   6  * License.  See the file COPYING in the main directory of this archive for
   7  * more details.
   8  */
   9
  10 #include <linux/types.h>
  11 #include <linux/init.h>
  12 #include <linux/mm.h>
  13 #include <linux/module.h>
  14 #include <linux/platform_device.h>
  15 #include <linux/spi/spi.h>
  16 #include <linux/fb.h>
  17 #include <linux/clk.h>
  18
  19 #include <video/atmel_lcdc.h>
  20
  21 #include <asm/setup.h>
  22 #include <asm/mach-types.h>
  23 #include <asm/irq.h>
  24
  25 #include <asm/mach/arch.h>
  26 #include <asm/mach/map.h>
  27 #include <asm/mach/irq.h>
  28
  29 #include <mach/hardware.h>
  30 #include <mach/board.h>
  31 #include <mach/gpio.h>
  32 #include <mach/at91sam9_smc.h>
  33 #include <mach/at91_shdwc.h>
  34
  35 #include "sam9_smc.h"
  36 #include "generic.h"
  37
  38
  39 static void __init ek_map_io(void)
  40 {
  41         /* Initialize processor: 12.000 MHz crystal */
  42         at91sam9rl_initialize(12000000);
  43
  44         /* DGBU on ttyS0. (Rx & Tx only) */
  45         at91_register_uart(0, 0, 0);
  46
  47         /* USART0 on ttyS1. (Rx, Tx, CTS, RTS) */
  48         at91_register_uart(AT91SAM9RL_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS);
  49
  50         /* set serial console to ttyS0 (ie, DBGU) */
  51         at91_set_serial_console(0);
  52 }
  53
  54 static void __init ek_init_irq(void)
  55 {
  56         at91sam9rl_init_interrupts(NULL);
  57 }
  58
  59
  60 /*
  61  * USB HS Device port
  62  */
  63 static struct usba_platform_data __initdata ek_usba_udc_data = {
  64         .vbus_pin       = AT91_PIN_PA8,
  65 };
  66
  67
  68 /*
  69  * MCI (SD/MMC)
  70  */
  71 static struct at91_mmc_data __initdata ek_mmc_data = {
  72         .wire4          = 1,
  73         .det_pin        = AT91_PIN_PA15,
  74 //      .wp_pin         = ... not connected
  75 //      .vcc_pin        = ... not connected
  76 };
  77
  78
  79 /*
  80  * NAND flash
  81  */
  82 static struct mtd_partition __initdata ek_nand_partition[] = {
  83         {
  84                 .name   = "Partition 1",
  85                 .offset = 0,
  86                 .size   = SZ_256K,
  87         },
  88         {
  89                 .name   = "Partition 2",
  90                 .offset = MTDPART_OFS_NXTBLK,
  91                 .size   = MTDPART_SIZ_FULL,
  92         },
  93 };
  94
  95 static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
  96 {
  97         *num_partitions = ARRAY_SIZE(ek_nand_partition);
  98         return ek_nand_partition;
  99 }
 100
 101 static struct atmel_nand_data __initdata ek_nand_data = {
 102         .ale            = 21,
 103         .cle            = 22,
 104 //      .det_pin        = ... not connected
 105         .rdy_pin        = AT91_PIN_PD17,
 106         .enable_pin     = AT91_PIN_PB6,
 107         .partition_info = nand_partitions,
 108 };
 109
 110 static struct sam9_smc_config __initdata ek_nand_smc_config = {
 111         .ncs_read_setup         = 0,
 112         .nrd_setup              = 1,
 113         .ncs_write_setup        = 0,
 114         .nwe_setup              = 1,
 115
 116         .ncs_read_pulse         = 3,
 117         .nrd_pulse              = 3,
 118         .ncs_write_pulse        = 3,
 119         .nwe_pulse              = 3,
 120
 121         .read_cycle             = 5,
 122         .write_cycle            = 5,
 123
 124         .mode                   = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_8,
 125         .tdf_cycles             = 2,
 126 };
 127
 128 static void __init ek_add_device_nand(void)
 129 {
 130         /* configure chip-select 3 (NAND) */
 131         sam9_smc_configure(3, &ek_nand_smc_config);
 132
 133         at91_add_device_nand(&ek_nand_data);
 134 }
 135
 136
 137 /*
 138  * SPI devices
 139  */
 140 static struct spi_board_info ek_spi_devices[] = {
 141         {       /* DataFlash chip */
 142                 .modalias       = "mtd_dataflash",
 143                 .chip_select    = 0,
 144                 .max_speed_hz   = 15 * 1000 * 1000,
 145                 .bus_num        = 0,
 146         },
 147 };
 148
 149
 150 /*
 151  * LCD Controller
 152  */
 153 #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
 154 static struct fb_videomode at91_tft_vga_modes[] = {
 155         {
 156                 .name           = "TX09D50VM1CCA @ 60",
 157                 .refresh        = 60,
 158                 .xres           = 240,          .yres           = 320,
 159                 .pixclock       = KHZ2PICOS(4965),
 160
 161                 .left_margin    = 1,            .right_margin   = 33,
 162                 .upper_margin   = 1,            .lower_margin   = 0,
 163                 .hsync_len      = 5,            .vsync_len      = 1,
 164
 165                 .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
 166                 .vmode          = FB_VMODE_NONINTERLACED,
 167         },
 168 };
 169
 170 static struct fb_monspecs at91fb_default_monspecs = {
 171         .manufacturer   = "HIT",
 172         .monitor        = "TX09D50VM1CCA",
 173
 174         .modedb         = at91_tft_vga_modes,
 175         .modedb_len     = ARRAY_SIZE(at91_tft_vga_modes),
 176         .hfmin          = 15000,
 177         .hfmax          = 64000,
 178         .vfmin          = 50,
 179         .vfmax          = 150,
 180 };
 181
 182 #define AT91SAM9RL_DEFAULT_LCDCON2      (ATMEL_LCDC_MEMOR_LITTLE \
 183                                         | ATMEL_LCDC_DISTYPE_TFT \
 184                                         | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE)
 185
 186 static void at91_lcdc_power_control(int on)
 187 {
 188         if (on)
 189                 at91_set_gpio_value(AT91_PIN_PC1, 0);   /* power up */
 190         else
 191                 at91_set_gpio_value(AT91_PIN_PC1, 1);   /* power down */
 192 }
 193
 194 /* Driver datas */
 195 static struct atmel_lcdfb_info __initdata ek_lcdc_data = {
 196         .lcdcon_is_backlight            = true,
 197         .default_bpp                    = 16,
 198         .default_dmacon                 = ATMEL_LCDC_DMAEN,
 199         .default_lcdcon2                = AT91SAM9RL_DEFAULT_LCDCON2,
 200         .default_monspecs               = &at91fb_default_monspecs,
 201         .atmel_lcdfb_power_control      = at91_lcdc_power_control,
 202         .guard_time                     = 1,
 203         .lcd_wiring_mode                = ATMEL_LCDC_WIRING_RGB,
 204 };
 205
 206 #else
 207 static struct atmel_lcdfb_info __initdata ek_lcdc_data;
 208 #endif
 209
 210
 211 static void __init ek_board_init(void)
 212 {
 213         /* Serial */
 214         at91_add_device_serial();
 215         /* USB HS */
 216         at91_add_device_usba(&ek_usba_udc_data);
 217         /* I2C */
 218         at91_add_device_i2c(NULL, 0);
 219         /* NAND */
 220         ek_add_device_nand();
 221         /* SPI */
 222         at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
 223         /* MMC */
 224         at91_add_device_mmc(0, &ek_mmc_data);
 225         /* LCD Controller */
 226         at91_add_device_lcdc(&ek_lcdc_data);
 227         /* Touch Screen Controller */
 228         at91_add_device_tsadcc();
 229 }
 230
 231 MACHINE_START(AT91SAM9RLEK, "Atmel AT91SAM9RL-EK")
 232         /* Maintainer: Atmel */
 233         .phys_io        = AT91_BASE_SYS,
 234         .io_pg_offst    = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
 235         .boot_params    = AT91_SDRAM_BASE + 0x100,
 236         .timer          = &at91sam926x_timer,
 237         .map_io         = ek_map_io,
 238         .init_irq       = ek_init_irq,
 239         .init_machine   = ek_board_init,
 240 MACHINE_END