arch/arm/mach-at91/at91sam9rl_devices.c

   1 /*
   2  *  Copyright (C) 2007 Atmel Corporation
   3  *
   4  * This file is subject to the terms and conditions of the GNU General Public
   5  * License.  See the file COPYING in the main directory of this archive for
   6  * more details.
   7  */
   8
   9 #include <asm/mach/arch.h>
  10 #include <asm/mach/map.h>
  11
  12 #include <linux/dma-mapping.h>
  13 #include <linux/platform_device.h>
  14 #include <linux/i2c-gpio.h>
  15
  16 #include <linux/fb.h>
  17 #include <video/atmel_lcdc.h>
  18
  19 #include <mach/board.h>
  20 #include <mach/gpio.h>
  21 #include <mach/at91sam9rl.h>
  22 #include <mach/at91sam9rl_matrix.h>
  23 #include <mach/at91sam9_smc.h>
  24 #include <mach/at_hdmac.h>
  25
  26 #include "generic.h"
  27
  28
  29 /* --------------------------------------------------------------------
  30  *  HDMAC - AHB DMA Controller
  31  * -------------------------------------------------------------------- */
  32
  33 #if defined(CONFIG_AT_HDMAC) || defined(CONFIG_AT_HDMAC_MODULE)
  34 static u64 hdmac_dmamask = DMA_BIT_MASK(32);
  35
  36 static struct at_dma_platform_data atdma_pdata = {
  37         .nr_channels    = 2,
  38 };
  39
  40 static struct resource hdmac_resources[] = {
  41         [0] = {
  42                 .start  = AT91_BASE_SYS + AT91_DMA,
  43                 .end    = AT91_BASE_SYS + AT91_DMA + SZ_512 - 1,
  44                 .flags  = IORESOURCE_MEM,
  45         },
  46         [2] = {
  47                 .start  = AT91SAM9RL_ID_DMA,
  48                 .end    = AT91SAM9RL_ID_DMA,
  49                 .flags  = IORESOURCE_IRQ,
  50         },
  51 };
  52
  53 static struct platform_device at_hdmac_device = {
  54         .name           = "at_hdmac",
  55         .id             = -1,
  56         .dev            = {
  57                                 .dma_mask               = &hdmac_dmamask,
  58                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
  59                                 .platform_data          = &atdma_pdata,
  60         },
  61         .resource       = hdmac_resources,
  62         .num_resources  = ARRAY_SIZE(hdmac_resources),
  63 };
  64
  65 void __init at91_add_device_hdmac(void)
  66 {
  67         dma_cap_set(DMA_MEMCPY, atdma_pdata.cap_mask);
  68         platform_device_register(&at_hdmac_device);
  69 }
  70 #else
  71 void __init at91_add_device_hdmac(void) {}
  72 #endif
  73
  74 /* --------------------------------------------------------------------
  75  *  USB HS Device (Gadget)
  76  * -------------------------------------------------------------------- */
  77
  78 #if defined(CONFIG_USB_GADGET_ATMEL_USBA) || defined(CONFIG_USB_GADGET_ATMEL_USBA_MODULE)
  79
  80 static struct resource usba_udc_resources[] = {
  81         [0] = {
  82                 .start  = AT91SAM9RL_UDPHS_FIFO,
  83                 .end    = AT91SAM9RL_UDPHS_FIFO + SZ_512K - 1,
  84                 .flags  = IORESOURCE_MEM,
  85         },
  86         [1] = {
  87                 .start  = AT91SAM9RL_BASE_UDPHS,
  88                 .end    = AT91SAM9RL_BASE_UDPHS + SZ_1K - 1,
  89                 .flags  = IORESOURCE_MEM,
  90         },
  91         [2] = {
  92                 .start  = AT91SAM9RL_ID_UDPHS,
  93                 .end    = AT91SAM9RL_ID_UDPHS,
  94                 .flags  = IORESOURCE_IRQ,
  95         },
  96 };
  97
  98 #define EP(nam, idx, maxpkt, maxbk, dma, isoc)                  \
  99         [idx] = {                                               \
 100                 .name           = nam,                          \
 101                 .index          = idx,                          \
 102                 .fifo_size      = maxpkt,                       \
 103                 .nr_banks       = maxbk,                        \
 104                 .can_dma        = dma,                          \
 105                 .can_isoc       = isoc,                         \
 106         }
 107
 108 static struct usba_ep_data usba_udc_ep[] __initdata = {
 109         EP("ep0", 0, 64, 1, 0, 0),
 110         EP("ep1", 1, 1024, 2, 1, 1),
 111         EP("ep2", 2, 1024, 2, 1, 1),
 112         EP("ep3", 3, 1024, 3, 1, 0),
 113         EP("ep4", 4, 1024, 3, 1, 0),
 114         EP("ep5", 5, 1024, 3, 1, 1),
 115         EP("ep6", 6, 1024, 3, 1, 1),
 116 };
 117
 118 #undef EP
 119
 120 /*
 121  * pdata doesn't have room for any endpoints, so we need to
 122  * append room for the ones we need right after it.
 123  */
 124 static struct {
 125         struct usba_platform_data pdata;
 126         struct usba_ep_data ep[7];
 127 } usba_udc_data;
 128
 129 static struct platform_device at91_usba_udc_device = {
 130         .name           = "atmel_usba_udc",
 131         .id             = -1,
 132         .dev            = {
 133                                 .platform_data  = &usba_udc_data.pdata,
 134         },
 135         .resource       = usba_udc_resources,
 136         .num_resources  = ARRAY_SIZE(usba_udc_resources),
 137 };
 138
 139 void __init at91_add_device_usba(struct usba_platform_data *data)
 140 {
 141         /*
 142          * Invalid pins are 0 on AT91, but the usba driver is shared
 143          * with AVR32, which use negative values instead. Once/if
 144          * gpio_is_valid() is ported to AT91, revisit this code.
 145          */
 146         usba_udc_data.pdata.vbus_pin = -EINVAL;
 147         usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep);
 148         memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep));
 149
 150         if (data && data->vbus_pin > 0) {
 151                 at91_set_gpio_input(data->vbus_pin, 0);
 152                 at91_set_deglitch(data->vbus_pin, 1);
 153                 usba_udc_data.pdata.vbus_pin = data->vbus_pin;
 154         }
 155
 156         /* Pullup pin is handled internally by USB device peripheral */
 157
 158         platform_device_register(&at91_usba_udc_device);
 159 }
 160 #else
 161 void __init at91_add_device_usba(struct usba_platform_data *data) {}
 162 #endif
 163
 164
 165 /* --------------------------------------------------------------------
 166  *  MMC / SD
 167  * -------------------------------------------------------------------- */
 168
 169 #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
 170 static u64 mmc_dmamask = DMA_BIT_MASK(32);
 171 static struct at91_mmc_data mmc_data;
 172
 173 static struct resource mmc_resources[] = {
 174         [0] = {
 175                 .start  = AT91SAM9RL_BASE_MCI,
 176                 .end    = AT91SAM9RL_BASE_MCI + SZ_16K - 1,
 177                 .flags  = IORESOURCE_MEM,
 178         },
 179         [1] = {
 180                 .start  = AT91SAM9RL_ID_MCI,
 181                 .end    = AT91SAM9RL_ID_MCI,
 182                 .flags  = IORESOURCE_IRQ,
 183         },
 184 };
 185
 186 static struct platform_device at91sam9rl_mmc_device = {
 187         .name           = "at91_mci",
 188         .id             = -1,
 189         .dev            = {
 190                                 .dma_mask               = &mmc_dmamask,
 191                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 192                                 .platform_data          = &mmc_data,
 193         },
 194         .resource       = mmc_resources,
 195         .num_resources  = ARRAY_SIZE(mmc_resources),
 196 };
 197
 198 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
 199 {
 200         if (!data)
 201                 return;
 202
 203         /* input/irq */
 204         if (data->det_pin) {
 205                 at91_set_gpio_input(data->det_pin, 1);
 206                 at91_set_deglitch(data->det_pin, 1);
 207         }
 208         if (data->wp_pin)
 209                 at91_set_gpio_input(data->wp_pin, 1);
 210         if (data->vcc_pin)
 211                 at91_set_gpio_output(data->vcc_pin, 0);
 212
 213         /* CLK */
 214         at91_set_A_periph(AT91_PIN_PA2, 0);
 215
 216         /* CMD */
 217         at91_set_A_periph(AT91_PIN_PA1, 1);
 218
 219         /* DAT0, maybe DAT1..DAT3 */
 220         at91_set_A_periph(AT91_PIN_PA0, 1);
 221         if (data->wire4) {
 222                 at91_set_A_periph(AT91_PIN_PA3, 1);
 223                 at91_set_A_periph(AT91_PIN_PA4, 1);
 224                 at91_set_A_periph(AT91_PIN_PA5, 1);
 225         }
 226
 227         mmc_data = *data;
 228         platform_device_register(&at91sam9rl_mmc_device);
 229 }
 230 #else
 231 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
 232 #endif
 233
 234
 235 /* --------------------------------------------------------------------
 236  *  NAND / SmartMedia
 237  * -------------------------------------------------------------------- */
 238
 239 #if defined(CONFIG_MTD_NAND_ATMEL) || defined(CONFIG_MTD_NAND_ATMEL_MODULE)
 240 static struct atmel_nand_data nand_data;
 241
 242 #define NAND_BASE       AT91_CHIPSELECT_3
 243
 244 static struct resource nand_resources[] = {
 245         [0] = {
 246                 .start  = NAND_BASE,
 247                 .end    = NAND_BASE + SZ_256M - 1,
 248                 .flags  = IORESOURCE_MEM,
 249         },
 250         [1] = {
 251                 .start  = AT91_BASE_SYS + AT91_ECC,
 252                 .end    = AT91_BASE_SYS + AT91_ECC + SZ_512 - 1,
 253                 .flags  = IORESOURCE_MEM,
 254         }
 255 };
 256
 257 static struct platform_device atmel_nand_device = {
 258         .name           = "atmel_nand",
 259         .id             = -1,
 260         .dev            = {
 261                                 .platform_data  = &nand_data,
 262         },
 263         .resource       = nand_resources,
 264         .num_resources  = ARRAY_SIZE(nand_resources),
 265 };
 266
 267 void __init at91_add_device_nand(struct atmel_nand_data *data)
 268 {
 269         unsigned long csa;
 270
 271         if (!data)
 272                 return;
 273
 274         csa = at91_sys_read(AT91_MATRIX_EBICSA);
 275         at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
 276
 277         /* enable pin */
 278         if (data->enable_pin)
 279                 at91_set_gpio_output(data->enable_pin, 1);
 280
 281         /* ready/busy pin */
 282         if (data->rdy_pin)
 283                 at91_set_gpio_input(data->rdy_pin, 1);
 284
 285         /* card detect pin */
 286         if (data->det_pin)
 287                 at91_set_gpio_input(data->det_pin, 1);
 288
 289         at91_set_A_periph(AT91_PIN_PB4, 0);             /* NANDOE */
 290         at91_set_A_periph(AT91_PIN_PB5, 0);             /* NANDWE */
 291
 292         nand_data = *data;
 293         platform_device_register(&atmel_nand_device);
 294 }
 295
 296 #else
 297 void __init at91_add_device_nand(struct atmel_nand_data *data) {}
 298 #endif
 299
 300
 301 /* --------------------------------------------------------------------
 302  *  TWI (i2c)
 303  * -------------------------------------------------------------------- */
 304
 305 /*
 306  * Prefer the GPIO code since the TWI controller isn't robust
 307  * (gets overruns and underruns under load) and can only issue
 308  * repeated STARTs in one scenario (the driver doesn't yet handle them).
 309  */
 310 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
 311
 312 static struct i2c_gpio_platform_data pdata = {
 313         .sda_pin                = AT91_PIN_PA23,
 314         .sda_is_open_drain      = 1,
 315         .scl_pin                = AT91_PIN_PA24,
 316         .scl_is_open_drain      = 1,
 317         .udelay                 = 2,            /* ~100 kHz */
 318 };
 319
 320 static struct platform_device at91sam9rl_twi_device = {
 321         .name                   = "i2c-gpio",
 322         .id                     = -1,
 323         .dev.platform_data      = &pdata,
 324 };
 325
 326 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
 327 {
 328         at91_set_GPIO_periph(AT91_PIN_PA23, 1);         /* TWD (SDA) */
 329         at91_set_multi_drive(AT91_PIN_PA23, 1);
 330
 331         at91_set_GPIO_periph(AT91_PIN_PA24, 1);         /* TWCK (SCL) */
 332         at91_set_multi_drive(AT91_PIN_PA24, 1);
 333
 334         i2c_register_board_info(0, devices, nr_devices);
 335         platform_device_register(&at91sam9rl_twi_device);
 336 }
 337
 338 #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
 339
 340 static struct resource twi_resources[] = {
 341         [0] = {
 342                 .start  = AT91SAM9RL_BASE_TWI0,
 343                 .end    = AT91SAM9RL_BASE_TWI0 + SZ_16K - 1,
 344                 .flags  = IORESOURCE_MEM,
 345         },
 346         [1] = {
 347                 .start  = AT91SAM9RL_ID_TWI0,
 348                 .end    = AT91SAM9RL_ID_TWI0,
 349                 .flags  = IORESOURCE_IRQ,
 350         },
 351 };
 352
 353 static struct platform_device at91sam9rl_twi_device = {
 354         .name           = "at91_i2c",
 355         .id             = -1,
 356         .resource       = twi_resources,
 357         .num_resources  = ARRAY_SIZE(twi_resources),
 358 };
 359
 360 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
 361 {
 362         /* pins used for TWI interface */
 363         at91_set_A_periph(AT91_PIN_PA23, 0);            /* TWD */
 364         at91_set_multi_drive(AT91_PIN_PA23, 1);
 365
 366         at91_set_A_periph(AT91_PIN_PA24, 0);            /* TWCK */
 367         at91_set_multi_drive(AT91_PIN_PA24, 1);
 368
 369         i2c_register_board_info(0, devices, nr_devices);
 370         platform_device_register(&at91sam9rl_twi_device);
 371 }
 372 #else
 373 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
 374 #endif
 375
 376
 377 /* --------------------------------------------------------------------
 378  *  SPI
 379  * -------------------------------------------------------------------- */
 380
 381 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
 382 static u64 spi_dmamask = DMA_BIT_MASK(32);
 383
 384 static struct resource spi_resources[] = {
 385         [0] = {
 386                 .start  = AT91SAM9RL_BASE_SPI,
 387                 .end    = AT91SAM9RL_BASE_SPI + SZ_16K - 1,
 388                 .flags  = IORESOURCE_MEM,
 389         },
 390         [1] = {
 391                 .start  = AT91SAM9RL_ID_SPI,
 392                 .end    = AT91SAM9RL_ID_SPI,
 393                 .flags  = IORESOURCE_IRQ,
 394         },
 395 };
 396
 397 static struct platform_device at91sam9rl_spi_device = {
 398         .name           = "atmel_spi",
 399         .id             = 0,
 400         .dev            = {
 401                                 .dma_mask               = &spi_dmamask,
 402                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 403         },
 404         .resource       = spi_resources,
 405         .num_resources  = ARRAY_SIZE(spi_resources),
 406 };
 407
 408 static const unsigned spi_standard_cs[4] = { AT91_PIN_PA28, AT91_PIN_PB7, AT91_PIN_PD8, AT91_PIN_PD9 };
 409
 410
 411 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
 412 {
 413         int i;
 414         unsigned long cs_pin;
 415
 416         at91_set_A_periph(AT91_PIN_PA25, 0);    /* MISO */
 417         at91_set_A_periph(AT91_PIN_PA26, 0);    /* MOSI */
 418         at91_set_A_periph(AT91_PIN_PA27, 0);    /* SPCK */
 419
 420         /* Enable SPI chip-selects */
 421         for (i = 0; i < nr_devices; i++) {
 422                 if (devices[i].controller_data)
 423                         cs_pin = (unsigned long) devices[i].controller_data;
 424                 else
 425                         cs_pin = spi_standard_cs[devices[i].chip_select];
 426
 427                 /* enable chip-select pin */
 428                 at91_set_gpio_output(cs_pin, 1);
 429
 430                 /* pass chip-select pin to driver */
 431                 devices[i].controller_data = (void *) cs_pin;
 432         }
 433
 434         spi_register_board_info(devices, nr_devices);
 435         platform_device_register(&at91sam9rl_spi_device);
 436 }
 437 #else
 438 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
 439 #endif
 440
 441
 442 /* --------------------------------------------------------------------
 443  *  AC97
 444  * -------------------------------------------------------------------- */
 445
 446 #if defined(CONFIG_SND_ATMEL_AC97C) || defined(CONFIG_SND_ATMEL_AC97C_MODULE)
 447 static u64 ac97_dmamask = DMA_BIT_MASK(32);
 448 static struct ac97c_platform_data ac97_data;
 449
 450 static struct resource ac97_resources[] = {
 451         [0] = {
 452                 .start  = AT91SAM9RL_BASE_AC97C,
 453                 .end    = AT91SAM9RL_BASE_AC97C + SZ_16K - 1,
 454                 .flags  = IORESOURCE_MEM,
 455         },
 456         [1] = {
 457                 .start  = AT91SAM9RL_ID_AC97C,
 458                 .end    = AT91SAM9RL_ID_AC97C,
 459                 .flags  = IORESOURCE_IRQ,
 460         },
 461 };
 462
 463 static struct platform_device at91sam9rl_ac97_device = {
 464         .name           = "atmel_ac97c",
 465         .id             = 0,
 466         .dev            = {
 467                                 .dma_mask               = &ac97_dmamask,
 468                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 469                                 .platform_data          = &ac97_data,
 470         },
 471         .resource       = ac97_resources,
 472         .num_resources  = ARRAY_SIZE(ac97_resources),
 473 };
 474
 475 void __init at91_add_device_ac97(struct ac97c_platform_data *data)
 476 {
 477         if (!data)
 478                 return;
 479
 480         at91_set_A_periph(AT91_PIN_PD1, 0);     /* AC97FS */
 481         at91_set_A_periph(AT91_PIN_PD2, 0);     /* AC97CK */
 482         at91_set_A_periph(AT91_PIN_PD3, 0);     /* AC97TX */
 483         at91_set_A_periph(AT91_PIN_PD4, 0);     /* AC97RX */
 484
 485         /* reset */
 486         if (data->reset_pin)
 487                 at91_set_gpio_output(data->reset_pin, 0);
 488
 489         ac97_data = *data;
 490         platform_device_register(&at91sam9rl_ac97_device);
 491 }
 492 #else
 493 void __init at91_add_device_ac97(struct ac97c_platform_data *data) {}
 494 #endif
 495
 496
 497 /* --------------------------------------------------------------------
 498  *  LCD Controller
 499  * -------------------------------------------------------------------- */
 500
 501 #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
 502 static u64 lcdc_dmamask = DMA_BIT_MASK(32);
 503 static struct atmel_lcdfb_info lcdc_data;
 504
 505 static struct resource lcdc_resources[] = {
 506         [0] = {
 507                 .start  = AT91SAM9RL_LCDC_BASE,
 508                 .end    = AT91SAM9RL_LCDC_BASE + SZ_4K - 1,
 509                 .flags  = IORESOURCE_MEM,
 510         },
 511         [1] = {
 512                 .start  = AT91SAM9RL_ID_LCDC,
 513                 .end    = AT91SAM9RL_ID_LCDC,
 514                 .flags  = IORESOURCE_IRQ,
 515         },
 516 };
 517
 518 static struct platform_device at91_lcdc_device = {
 519         .name           = "atmel_lcdfb",
 520         .id             = 0,
 521         .dev            = {
 522                                 .dma_mask               = &lcdc_dmamask,
 523                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 524                                 .platform_data          = &lcdc_data,
 525         },
 526         .resource       = lcdc_resources,
 527         .num_resources  = ARRAY_SIZE(lcdc_resources),
 528 };
 529
 530 void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
 531 {
 532         if (!data) {
 533                 return;
 534         }
 535
 536         at91_set_B_periph(AT91_PIN_PC1, 0);     /* LCDPWR */
 537         at91_set_A_periph(AT91_PIN_PC5, 0);     /* LCDHSYNC */
 538         at91_set_A_periph(AT91_PIN_PC6, 0);     /* LCDDOTCK */
 539         at91_set_A_periph(AT91_PIN_PC7, 0);     /* LCDDEN */
 540         at91_set_A_periph(AT91_PIN_PC3, 0);     /* LCDCC */
 541         at91_set_B_periph(AT91_PIN_PC9, 0);     /* LCDD3 */
 542         at91_set_B_periph(AT91_PIN_PC10, 0);    /* LCDD4 */
 543         at91_set_B_periph(AT91_PIN_PC11, 0);    /* LCDD5 */
 544         at91_set_B_periph(AT91_PIN_PC12, 0);    /* LCDD6 */
 545         at91_set_B_periph(AT91_PIN_PC13, 0);    /* LCDD7 */
 546         at91_set_B_periph(AT91_PIN_PC15, 0);    /* LCDD11 */
 547         at91_set_B_periph(AT91_PIN_PC16, 0);    /* LCDD12 */
 548         at91_set_B_periph(AT91_PIN_PC17, 0);    /* LCDD13 */
 549         at91_set_B_periph(AT91_PIN_PC18, 0);    /* LCDD14 */
 550         at91_set_B_periph(AT91_PIN_PC19, 0);    /* LCDD15 */
 551         at91_set_B_periph(AT91_PIN_PC20, 0);    /* LCDD18 */
 552         at91_set_B_periph(AT91_PIN_PC21, 0);    /* LCDD19 */
 553         at91_set_B_periph(AT91_PIN_PC22, 0);    /* LCDD20 */
 554         at91_set_B_periph(AT91_PIN_PC23, 0);    /* LCDD21 */
 555         at91_set_B_periph(AT91_PIN_PC24, 0);    /* LCDD22 */
 556         at91_set_B_periph(AT91_PIN_PC25, 0);    /* LCDD23 */
 557
 558         lcdc_data = *data;
 559         platform_device_register(&at91_lcdc_device);
 560 }
 561 #else
 562 void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {}
 563 #endif
 564
 565
 566 /* --------------------------------------------------------------------
 567  *  Timer/Counter block
 568  * -------------------------------------------------------------------- */
 569
 570 #ifdef CONFIG_ATMEL_TCLIB
 571
 572 static struct resource tcb_resources[] = {
 573         [0] = {
 574                 .start  = AT91SAM9RL_BASE_TCB0,
 575                 .end    = AT91SAM9RL_BASE_TCB0 + SZ_16K - 1,
 576                 .flags  = IORESOURCE_MEM,
 577         },
 578         [1] = {
 579                 .start  = AT91SAM9RL_ID_TC0,
 580                 .end    = AT91SAM9RL_ID_TC0,
 581                 .flags  = IORESOURCE_IRQ,
 582         },
 583         [2] = {
 584                 .start  = AT91SAM9RL_ID_TC1,
 585                 .end    = AT91SAM9RL_ID_TC1,
 586                 .flags  = IORESOURCE_IRQ,
 587         },
 588         [3] = {
 589                 .start  = AT91SAM9RL_ID_TC2,
 590                 .end    = AT91SAM9RL_ID_TC2,
 591                 .flags  = IORESOURCE_IRQ,
 592         },
 593 };
 594
 595 static struct platform_device at91sam9rl_tcb_device = {
 596         .name           = "atmel_tcb",
 597         .id             = 0,
 598         .resource       = tcb_resources,
 599         .num_resources  = ARRAY_SIZE(tcb_resources),
 600 };
 601
 602 static void __init at91_add_device_tc(void)
 603 {
 604         platform_device_register(&at91sam9rl_tcb_device);
 605 }
 606 #else
 607 static void __init at91_add_device_tc(void) { }
 608 #endif
 609
 610
 611 /* --------------------------------------------------------------------
 612  *  Touchscreen
 613  * -------------------------------------------------------------------- */
 614
 615 #if defined(CONFIG_TOUCHSCREEN_ATMEL_TSADCC) || defined(CONFIG_TOUCHSCREEN_ATMEL_TSADCC_MODULE)
 616 static u64 tsadcc_dmamask = DMA_BIT_MASK(32);
 617 static struct at91_tsadcc_data tsadcc_data;
 618
 619 static struct resource tsadcc_resources[] = {
 620         [0] = {
 621                 .start  = AT91SAM9RL_BASE_TSC,
 622                 .end    = AT91SAM9RL_BASE_TSC + SZ_16K - 1,
 623                 .flags  = IORESOURCE_MEM,
 624         },
 625         [1] = {
 626                 .start  = AT91SAM9RL_ID_TSC,
 627                 .end    = AT91SAM9RL_ID_TSC,
 628                 .flags  = IORESOURCE_IRQ,
 629         }
 630 };
 631
 632 static struct platform_device at91sam9rl_tsadcc_device = {
 633         .name           = "atmel_tsadcc",
 634         .id             = -1,
 635         .dev            = {
 636                                 .dma_mask               = &tsadcc_dmamask,
 637                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 638                                 .platform_data          = &tsadcc_data,
 639         },
 640         .resource       = tsadcc_resources,
 641         .num_resources  = ARRAY_SIZE(tsadcc_resources),
 642 };
 643
 644 void __init at91_add_device_tsadcc(struct at91_tsadcc_data *data)
 645 {
 646         if (!data)
 647                 return;
 648
 649         at91_set_A_periph(AT91_PIN_PA17, 0);    /* AD0_XR */
 650         at91_set_A_periph(AT91_PIN_PA18, 0);    /* AD1_XL */
 651         at91_set_A_periph(AT91_PIN_PA19, 0);    /* AD2_YT */
 652         at91_set_A_periph(AT91_PIN_PA20, 0);    /* AD3_TB */
 653
 654         tsadcc_data = *data;
 655         platform_device_register(&at91sam9rl_tsadcc_device);
 656 }
 657 #else
 658 void __init at91_add_device_tsadcc(struct at91_tsadcc_data *data) {}
 659 #endif
 660
 661
 662 /* --------------------------------------------------------------------
 663  *  RTC
 664  * -------------------------------------------------------------------- */
 665
 666 #if defined(CONFIG_RTC_DRV_AT91RM9200) || defined(CONFIG_RTC_DRV_AT91RM9200_MODULE)
 667 static struct platform_device at91sam9rl_rtc_device = {
 668         .name           = "at91_rtc",
 669         .id             = -1,
 670         .num_resources  = 0,
 671 };
 672
 673 static void __init at91_add_device_rtc(void)
 674 {
 675         platform_device_register(&at91sam9rl_rtc_device);
 676 }
 677 #else
 678 static void __init at91_add_device_rtc(void) {}
 679 #endif
 680
 681
 682 /* --------------------------------------------------------------------
 683  *  RTT
 684  * -------------------------------------------------------------------- */
 685
 686 static struct resource rtt_resources[] = {
 687         {
 688                 .start  = AT91_BASE_SYS + AT91_RTT,
 689                 .end    = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1,
 690                 .flags  = IORESOURCE_MEM,
 691         }
 692 };
 693
 694 static struct platform_device at91sam9rl_rtt_device = {
 695         .name           = "at91_rtt",
 696         .id             = 0,
 697         .resource       = rtt_resources,
 698         .num_resources  = ARRAY_SIZE(rtt_resources),
 699 };
 700
 701 static void __init at91_add_device_rtt(void)
 702 {
 703         platform_device_register(&at91sam9rl_rtt_device);
 704 }
 705
 706
 707 /* --------------------------------------------------------------------
 708  *  Watchdog
 709  * -------------------------------------------------------------------- */
 710
 711 #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
 712 static struct platform_device at91sam9rl_wdt_device = {
 713         .name           = "at91_wdt",
 714         .id             = -1,
 715         .num_resources  = 0,
 716 };
 717
 718 static void __init at91_add_device_watchdog(void)
 719 {
 720         platform_device_register(&at91sam9rl_wdt_device);
 721 }
 722 #else
 723 static void __init at91_add_device_watchdog(void) {}
 724 #endif
 725
 726
 727 /* --------------------------------------------------------------------
 728  *  PWM
 729  * --------------------------------------------------------------------*/
 730
 731 #if defined(CONFIG_ATMEL_PWM)
 732 static u32 pwm_mask;
 733
 734 static struct resource pwm_resources[] = {
 735         [0] = {
 736                 .start  = AT91SAM9RL_BASE_PWMC,
 737                 .end    = AT91SAM9RL_BASE_PWMC + SZ_16K - 1,
 738                 .flags  = IORESOURCE_MEM,
 739         },
 740         [1] = {
 741                 .start  = AT91SAM9RL_ID_PWMC,
 742                 .end    = AT91SAM9RL_ID_PWMC,
 743                 .flags  = IORESOURCE_IRQ,
 744         },
 745 };
 746
 747 static struct platform_device at91sam9rl_pwm0_device = {
 748         .name   = "atmel_pwm",
 749         .id     = -1,
 750         .dev    = {
 751                 .platform_data          = &pwm_mask,
 752         },
 753         .resource       = pwm_resources,
 754         .num_resources  = ARRAY_SIZE(pwm_resources),
 755 };
 756
 757 void __init at91_add_device_pwm(u32 mask)
 758 {
 759         if (mask & (1 << AT91_PWM0))
 760                 at91_set_B_periph(AT91_PIN_PB8, 1);     /* enable PWM0 */
 761
 762         if (mask & (1 << AT91_PWM1))
 763                 at91_set_B_periph(AT91_PIN_PB9, 1);     /* enable PWM1 */
 764
 765         if (mask & (1 << AT91_PWM2))
 766                 at91_set_B_periph(AT91_PIN_PD5, 1);     /* enable PWM2 */
 767
 768         if (mask & (1 << AT91_PWM3))
 769                 at91_set_B_periph(AT91_PIN_PD8, 1);     /* enable PWM3 */
 770
 771         pwm_mask = mask;
 772
 773         platform_device_register(&at91sam9rl_pwm0_device);
 774 }
 775 #else
 776 void __init at91_add_device_pwm(u32 mask) {}
 777 #endif
 778
 779
 780 /* --------------------------------------------------------------------
 781  *  SSC -- Synchronous Serial Controller
 782  * -------------------------------------------------------------------- */
 783
 784 #if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
 785 static u64 ssc0_dmamask = DMA_BIT_MASK(32);
 786
 787 static struct resource ssc0_resources[] = {
 788         [0] = {
 789                 .start  = AT91SAM9RL_BASE_SSC0,
 790                 .end    = AT91SAM9RL_BASE_SSC0 + SZ_16K - 1,
 791                 .flags  = IORESOURCE_MEM,
 792         },
 793         [1] = {
 794                 .start  = AT91SAM9RL_ID_SSC0,
 795                 .end    = AT91SAM9RL_ID_SSC0,
 796                 .flags  = IORESOURCE_IRQ,
 797         },
 798 };
 799
 800 static struct platform_device at91sam9rl_ssc0_device = {
 801         .name   = "ssc",
 802         .id     = 0,
 803         .dev    = {
 804                 .dma_mask               = &ssc0_dmamask,
 805                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 806         },
 807         .resource       = ssc0_resources,
 808         .num_resources  = ARRAY_SIZE(ssc0_resources),
 809 };
 810
 811 static inline void configure_ssc0_pins(unsigned pins)
 812 {
 813         if (pins & ATMEL_SSC_TF)
 814                 at91_set_A_periph(AT91_PIN_PC0, 1);
 815         if (pins & ATMEL_SSC_TK)
 816                 at91_set_A_periph(AT91_PIN_PC1, 1);
 817         if (pins & ATMEL_SSC_TD)
 818                 at91_set_A_periph(AT91_PIN_PA15, 1);
 819         if (pins & ATMEL_SSC_RD)
 820                 at91_set_A_periph(AT91_PIN_PA16, 1);
 821         if (pins & ATMEL_SSC_RK)
 822                 at91_set_B_periph(AT91_PIN_PA10, 1);
 823         if (pins & ATMEL_SSC_RF)
 824                 at91_set_B_periph(AT91_PIN_PA22, 1);
 825 }
 826
 827 static u64 ssc1_dmamask = DMA_BIT_MASK(32);
 828
 829 static struct resource ssc1_resources[] = {
 830         [0] = {
 831                 .start  = AT91SAM9RL_BASE_SSC1,
 832                 .end    = AT91SAM9RL_BASE_SSC1 + SZ_16K - 1,
 833                 .flags  = IORESOURCE_MEM,
 834         },
 835         [1] = {
 836                 .start  = AT91SAM9RL_ID_SSC1,
 837                 .end    = AT91SAM9RL_ID_SSC1,
 838                 .flags  = IORESOURCE_IRQ,
 839         },
 840 };
 841
 842 static struct platform_device at91sam9rl_ssc1_device = {
 843         .name   = "ssc",
 844         .id     = 1,
 845         .dev    = {
 846                 .dma_mask               = &ssc1_dmamask,
 847                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 848         },
 849         .resource       = ssc1_resources,
 850         .num_resources  = ARRAY_SIZE(ssc1_resources),
 851 };
 852
 853 static inline void configure_ssc1_pins(unsigned pins)
 854 {
 855         if (pins & ATMEL_SSC_TF)
 856                 at91_set_B_periph(AT91_PIN_PA29, 1);
 857         if (pins & ATMEL_SSC_TK)
 858                 at91_set_B_periph(AT91_PIN_PA30, 1);
 859         if (pins & ATMEL_SSC_TD)
 860                 at91_set_B_periph(AT91_PIN_PA13, 1);
 861         if (pins & ATMEL_SSC_RD)
 862                 at91_set_B_periph(AT91_PIN_PA14, 1);
 863         if (pins & ATMEL_SSC_RK)
 864                 at91_set_B_periph(AT91_PIN_PA9, 1);
 865         if (pins & ATMEL_SSC_RF)
 866                 at91_set_B_periph(AT91_PIN_PA8, 1);
 867 }
 868
 869 /*
 870  * SSC controllers are accessed through library code, instead of any
 871  * kind of all-singing/all-dancing driver.  For example one could be
 872  * used by a particular I2S audio codec's driver, while another one
 873  * on the same system might be used by a custom data capture driver.
 874  */
 875 void __init at91_add_device_ssc(unsigned id, unsigned pins)
 876 {
 877         struct platform_device *pdev;
 878
 879         /*
 880          * NOTE: caller is responsible for passing information matching
 881          * "pins" to whatever will be using each particular controller.
 882          */
 883         switch (id) {
 884         case AT91SAM9RL_ID_SSC0:
 885                 pdev = &at91sam9rl_ssc0_device;
 886                 configure_ssc0_pins(pins);
 887                 break;
 888         case AT91SAM9RL_ID_SSC1:
 889                 pdev = &at91sam9rl_ssc1_device;
 890                 configure_ssc1_pins(pins);
 891                 break;
 892         default:
 893                 return;
 894         }
 895
 896         platform_device_register(pdev);
 897 }
 898
 899 #else
 900 void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
 901 #endif
 902
 903
 904 /* --------------------------------------------------------------------
 905  *  UART
 906  * -------------------------------------------------------------------- */
 907
 908 #if defined(CONFIG_SERIAL_ATMEL)
 909 static struct resource dbgu_resources[] = {
 910         [0] = {
 911                 .start  = AT91_VA_BASE_SYS + AT91_DBGU,
 912                 .end    = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
 913                 .flags  = IORESOURCE_MEM,
 914         },
 915         [1] = {
 916                 .start  = AT91_ID_SYS,
 917                 .end    = AT91_ID_SYS,
 918                 .flags  = IORESOURCE_IRQ,
 919         },
 920 };
 921
 922 static struct atmel_uart_data dbgu_data = {
 923         .use_dma_tx     = 0,
 924         .use_dma_rx     = 0,            /* DBGU not capable of receive DMA */
 925         .regs           = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
 926 };
 927
 928 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
 929
 930 static struct platform_device at91sam9rl_dbgu_device = {
 931         .name           = "atmel_usart",
 932         .id             = 0,
 933         .dev            = {
 934                                 .dma_mask               = &dbgu_dmamask,
 935                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 936                                 .platform_data          = &dbgu_data,
 937         },
 938         .resource       = dbgu_resources,
 939         .num_resources  = ARRAY_SIZE(dbgu_resources),
 940 };
 941
 942 static inline void configure_dbgu_pins(void)
 943 {
 944         at91_set_A_periph(AT91_PIN_PA21, 0);            /* DRXD */
 945         at91_set_A_periph(AT91_PIN_PA22, 1);            /* DTXD */
 946 }
 947
 948 static struct resource uart0_resources[] = {
 949         [0] = {
 950                 .start  = AT91SAM9RL_BASE_US0,
 951                 .end    = AT91SAM9RL_BASE_US0 + SZ_16K - 1,
 952                 .flags  = IORESOURCE_MEM,
 953         },
 954         [1] = {
 955                 .start  = AT91SAM9RL_ID_US0,
 956                 .end    = AT91SAM9RL_ID_US0,
 957                 .flags  = IORESOURCE_IRQ,
 958         },
 959 };
 960
 961 static struct atmel_uart_data uart0_data = {
 962         .use_dma_tx     = 1,
 963         .use_dma_rx     = 1,
 964 };
 965
 966 static u64 uart0_dmamask = DMA_BIT_MASK(32);
 967
 968 static struct platform_device at91sam9rl_uart0_device = {
 969         .name           = "atmel_usart",
 970         .id             = 1,
 971         .dev            = {
 972                                 .dma_mask               = &uart0_dmamask,
 973                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 974                                 .platform_data          = &uart0_data,
 975         },
 976         .resource       = uart0_resources,
 977         .num_resources  = ARRAY_SIZE(uart0_resources),
 978 };
 979
 980 static inline void configure_usart0_pins(unsigned pins)
 981 {
 982         at91_set_A_periph(AT91_PIN_PA6, 1);             /* TXD0 */
 983         at91_set_A_periph(AT91_PIN_PA7, 0);             /* RXD0 */
 984
 985         if (pins & ATMEL_UART_RTS)
 986                 at91_set_A_periph(AT91_PIN_PA9, 0);     /* RTS0 */
 987         if (pins & ATMEL_UART_CTS)
 988                 at91_set_A_periph(AT91_PIN_PA10, 0);    /* CTS0 */
 989         if (pins & ATMEL_UART_DSR)
 990                 at91_set_A_periph(AT91_PIN_PD14, 0);    /* DSR0 */
 991         if (pins & ATMEL_UART_DTR)
 992                 at91_set_A_periph(AT91_PIN_PD15, 0);    /* DTR0 */
 993         if (pins & ATMEL_UART_DCD)
 994                 at91_set_A_periph(AT91_PIN_PD16, 0);    /* DCD0 */
 995         if (pins & ATMEL_UART_RI)
 996                 at91_set_A_periph(AT91_PIN_PD17, 0);    /* RI0 */
 997 }
 998
 999 static struct resource uart1_resources[] = {
1000         [0] = {
1001                 .start  = AT91SAM9RL_BASE_US1,
1002                 .end    = AT91SAM9RL_BASE_US1 + SZ_16K - 1,
1003                 .flags  = IORESOURCE_MEM,
1004         },
1005         [1] = {
1006                 .start  = AT91SAM9RL_ID_US1,
1007                 .end    = AT91SAM9RL_ID_US1,
1008                 .flags  = IORESOURCE_IRQ,
1009         },
1010 };
1011
1012 static struct atmel_uart_data uart1_data = {
1013         .use_dma_tx     = 1,
1014         .use_dma_rx     = 1,
1015 };
1016
1017 static u64 uart1_dmamask = DMA_BIT_MASK(32);
1018
1019 static struct platform_device at91sam9rl_uart1_device = {
1020         .name           = "atmel_usart",
1021         .id             = 2,
1022         .dev            = {
1023                                 .dma_mask               = &uart1_dmamask,
1024                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1025                                 .platform_data          = &uart1_data,
1026         },
1027         .resource       = uart1_resources,
1028         .num_resources  = ARRAY_SIZE(uart1_resources),
1029 };
1030
1031 static inline void configure_usart1_pins(unsigned pins)
1032 {
1033         at91_set_A_periph(AT91_PIN_PA11, 1);            /* TXD1 */
1034         at91_set_A_periph(AT91_PIN_PA12, 0);            /* RXD1 */
1035
1036         if (pins & ATMEL_UART_RTS)
1037                 at91_set_B_periph(AT91_PIN_PA18, 0);    /* RTS1 */
1038         if (pins & ATMEL_UART_CTS)
1039                 at91_set_B_periph(AT91_PIN_PA19, 0);    /* CTS1 */
1040 }
1041
1042 static struct resource uart2_resources[] = {
1043         [0] = {
1044                 .start  = AT91SAM9RL_BASE_US2,
1045                 .end    = AT91SAM9RL_BASE_US2 + SZ_16K - 1,
1046                 .flags  = IORESOURCE_MEM,
1047         },
1048         [1] = {
1049                 .start  = AT91SAM9RL_ID_US2,
1050                 .end    = AT91SAM9RL_ID_US2,
1051                 .flags  = IORESOURCE_IRQ,
1052         },
1053 };
1054
1055 static struct atmel_uart_data uart2_data = {
1056         .use_dma_tx     = 1,
1057         .use_dma_rx     = 1,
1058 };
1059
1060 static u64 uart2_dmamask = DMA_BIT_MASK(32);
1061
1062 static struct platform_device at91sam9rl_uart2_device = {
1063         .name           = "atmel_usart",
1064         .id             = 3,
1065         .dev            = {
1066                                 .dma_mask               = &uart2_dmamask,
1067                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1068                                 .platform_data          = &uart2_data,
1069         },
1070         .resource       = uart2_resources,
1071         .num_resources  = ARRAY_SIZE(uart2_resources),
1072 };
1073
1074 static inline void configure_usart2_pins(unsigned pins)
1075 {
1076         at91_set_A_periph(AT91_PIN_PA13, 1);            /* TXD2 */
1077         at91_set_A_periph(AT91_PIN_PA14, 0);            /* RXD2 */
1078
1079         if (pins & ATMEL_UART_RTS)
1080                 at91_set_A_periph(AT91_PIN_PA29, 0);    /* RTS2 */
1081         if (pins & ATMEL_UART_CTS)
1082                 at91_set_A_periph(AT91_PIN_PA30, 0);    /* CTS2 */
1083 }
1084
1085 static struct resource uart3_resources[] = {
1086         [0] = {
1087                 .start  = AT91SAM9RL_BASE_US3,
1088                 .end    = AT91SAM9RL_BASE_US3 + SZ_16K - 1,
1089                 .flags  = IORESOURCE_MEM,
1090         },
1091         [1] = {
1092                 .start  = AT91SAM9RL_ID_US3,
1093                 .end    = AT91SAM9RL_ID_US3,
1094                 .flags  = IORESOURCE_IRQ,
1095         },
1096 };
1097
1098 static struct atmel_uart_data uart3_data = {
1099         .use_dma_tx     = 1,
1100         .use_dma_rx     = 1,
1101 };
1102
1103 static u64 uart3_dmamask = DMA_BIT_MASK(32);
1104
1105 static struct platform_device at91sam9rl_uart3_device = {
1106         .name           = "atmel_usart",
1107         .id             = 4,
1108         .dev            = {
1109                                 .dma_mask               = &uart3_dmamask,
1110                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1111                                 .platform_data          = &uart3_data,
1112         },
1113         .resource       = uart3_resources,
1114         .num_resources  = ARRAY_SIZE(uart3_resources),
1115 };
1116
1117 static inline void configure_usart3_pins(unsigned pins)
1118 {
1119         at91_set_A_periph(AT91_PIN_PB0, 1);             /* TXD3 */
1120         at91_set_A_periph(AT91_PIN_PB1, 0);             /* RXD3 */
1121
1122         if (pins & ATMEL_UART_RTS)
1123                 at91_set_B_periph(AT91_PIN_PD4, 0);     /* RTS3 */
1124         if (pins & ATMEL_UART_CTS)
1125                 at91_set_B_periph(AT91_PIN_PD3, 0);     /* CTS3 */
1126 }
1127
1128 static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART];   /* the UARTs to use */
1129 struct platform_device *atmel_default_console_device;   /* the serial console device */
1130
1131 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
1132 {
1133         struct platform_device *pdev;
1134         struct atmel_uart_data *pdata;
1135
1136         switch (id) {
1137                 case 0:         /* DBGU */
1138                         pdev = &at91sam9rl_dbgu_device;
1139                         configure_dbgu_pins();
1140                         break;
1141                 case AT91SAM9RL_ID_US0:
1142                         pdev = &at91sam9rl_uart0_device;
1143                         configure_usart0_pins(pins);
1144                         break;
1145                 case AT91SAM9RL_ID_US1:
1146                         pdev = &at91sam9rl_uart1_device;
1147                         configure_usart1_pins(pins);
1148                         break;
1149                 case AT91SAM9RL_ID_US2:
1150                         pdev = &at91sam9rl_uart2_device;
1151                         configure_usart2_pins(pins);
1152                         break;
1153                 case AT91SAM9RL_ID_US3:
1154                         pdev = &at91sam9rl_uart3_device;
1155                         configure_usart3_pins(pins);
1156                         break;
1157                 default:
1158                         return;
1159         }
1160         pdata = pdev->dev.platform_data;
1161         pdata->num = portnr;            /* update to mapped ID */
1162
1163         if (portnr < ATMEL_MAX_UART)
1164                 at91_uarts[portnr] = pdev;
1165 }
1166
1167 void __init at91_set_serial_console(unsigned portnr)
1168 {
1169         if (portnr < ATMEL_MAX_UART) {
1170                 atmel_default_console_device = at91_uarts[portnr];
1171                 at91sam9rl_set_console_clock(at91_uarts[portnr]->id);
1172         }
1173 }
1174
1175 void __init at91_add_device_serial(void)
1176 {
1177         int i;
1178
1179         for (i = 0; i < ATMEL_MAX_UART; i++) {
1180                 if (at91_uarts[i])
1181                         platform_device_register(at91_uarts[i]);
1182         }
1183
1184         if (!atmel_default_console_device)
1185                 printk(KERN_INFO "AT91: No default serial console defined.\n");
1186 }
1187 #else
1188 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
1189 void __init at91_set_serial_console(unsigned portnr) {}
1190 void __init at91_add_device_serial(void) {}
1191 #endif
1192
1193
1194 /* -------------------------------------------------------------------- */
1195
1196 /*
1197  * These devices are always present and don't need any board-specific
1198  * setup.
1199  */
1200 static int __init at91_add_standard_devices(void)
1201 {
1202         at91_add_device_hdmac();
1203         at91_add_device_rtc();
1204         at91_add_device_rtt();
1205         at91_add_device_watchdog();
1206         at91_add_device_tc();
1207         return 0;
1208 }
1209
1210 arch_initcall(at91_add_standard_devices);