arch/arm/mach-at91/at91rm9200_devices.c

   1 /*
   2  * arch/arm/mach-at91/at91rm9200_devices.c
   3  *
   4  *  Copyright (C) 2005 Thibaut VARENE <varenet@parisc-linux.org>
   5  *  Copyright (C) 2005 David Brownell
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  *
  12  */
  13 #include <asm/mach/arch.h>
  14 #include <asm/mach/map.h>
  15
  16 #include <linux/dma-mapping.h>
  17 #include <linux/gpio.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/i2c-gpio.h>
  20
  21 #include <mach/board.h>
  22 #include <mach/at91rm9200.h>
  23 #include <mach/at91rm9200_mc.h>
  24
  25 #include "generic.h"
  26
  27
  28 /* --------------------------------------------------------------------
  29  *  USB Host
  30  * -------------------------------------------------------------------- */
  31
  32 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
  33 static u64 ohci_dmamask = DMA_BIT_MASK(32);
  34 static struct at91_usbh_data usbh_data;
  35
  36 static struct resource usbh_resources[] = {
  37         [0] = {
  38                 .start  = AT91RM9200_UHP_BASE,
  39                 .end    = AT91RM9200_UHP_BASE + SZ_1M - 1,
  40                 .flags  = IORESOURCE_MEM,
  41         },
  42         [1] = {
  43                 .start  = AT91RM9200_ID_UHP,
  44                 .end    = AT91RM9200_ID_UHP,
  45                 .flags  = IORESOURCE_IRQ,
  46         },
  47 };
  48
  49 static struct platform_device at91rm9200_usbh_device = {
  50         .name           = "at91_ohci",
  51         .id             = -1,
  52         .dev            = {
  53                                 .dma_mask               = &ohci_dmamask,
  54                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
  55                                 .platform_data          = &usbh_data,
  56         },
  57         .resource       = usbh_resources,
  58         .num_resources  = ARRAY_SIZE(usbh_resources),
  59 };
  60
  61 void __init at91_add_device_usbh(struct at91_usbh_data *data)
  62 {
  63         int i;
  64
  65         if (!data)
  66                 return;
  67
  68         /* Enable overcurrent notification */
  69         for (i = 0; i < data->ports; i++) {
  70                 if (data->overcurrent_pin[i])
  71                         at91_set_gpio_input(data->overcurrent_pin[i], 1);
  72         }
  73
  74         usbh_data = *data;
  75         platform_device_register(&at91rm9200_usbh_device);
  76 }
  77 #else
  78 void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
  79 #endif
  80
  81
  82 /* --------------------------------------------------------------------
  83  *  USB Device (Gadget)
  84  * -------------------------------------------------------------------- */
  85
  86 #ifdef CONFIG_USB_GADGET_AT91
  87 static struct at91_udc_data udc_data;
  88
  89 static struct resource udc_resources[] = {
  90         [0] = {
  91                 .start  = AT91RM9200_BASE_UDP,
  92                 .end    = AT91RM9200_BASE_UDP + SZ_16K - 1,
  93                 .flags  = IORESOURCE_MEM,
  94         },
  95         [1] = {
  96                 .start  = AT91RM9200_ID_UDP,
  97                 .end    = AT91RM9200_ID_UDP,
  98                 .flags  = IORESOURCE_IRQ,
  99         },
 100 };
 101
 102 static struct platform_device at91rm9200_udc_device = {
 103         .name           = "at91_udc",
 104         .id             = -1,
 105         .dev            = {
 106                                 .platform_data          = &udc_data,
 107         },
 108         .resource       = udc_resources,
 109         .num_resources  = ARRAY_SIZE(udc_resources),
 110 };
 111
 112 void __init at91_add_device_udc(struct at91_udc_data *data)
 113 {
 114         if (!data)
 115                 return;
 116
 117         if (data->vbus_pin) {
 118                 at91_set_gpio_input(data->vbus_pin, 0);
 119                 at91_set_deglitch(data->vbus_pin, 1);
 120         }
 121         if (data->pullup_pin)
 122                 at91_set_gpio_output(data->pullup_pin, 0);
 123
 124         udc_data = *data;
 125         platform_device_register(&at91rm9200_udc_device);
 126 }
 127 #else
 128 void __init at91_add_device_udc(struct at91_udc_data *data) {}
 129 #endif
 130
 131
 132 /* --------------------------------------------------------------------
 133  *  Ethernet
 134  * -------------------------------------------------------------------- */
 135
 136 #if defined(CONFIG_ARM_AT91_ETHER) || defined(CONFIG_ARM_AT91_ETHER_MODULE)
 137 static u64 eth_dmamask = DMA_BIT_MASK(32);
 138 static struct at91_eth_data eth_data;
 139
 140 static struct resource eth_resources[] = {
 141         [0] = {
 142                 .start  = AT91_VA_BASE_EMAC,
 143                 .end    = AT91_VA_BASE_EMAC + SZ_16K - 1,
 144                 .flags  = IORESOURCE_MEM,
 145         },
 146         [1] = {
 147                 .start  = AT91RM9200_ID_EMAC,
 148                 .end    = AT91RM9200_ID_EMAC,
 149                 .flags  = IORESOURCE_IRQ,
 150         },
 151 };
 152
 153 static struct platform_device at91rm9200_eth_device = {
 154         .name           = "at91_ether",
 155         .id             = -1,
 156         .dev            = {
 157                                 .dma_mask               = &eth_dmamask,
 158                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 159                                 .platform_data          = &eth_data,
 160         },
 161         .resource       = eth_resources,
 162         .num_resources  = ARRAY_SIZE(eth_resources),
 163 };
 164
 165 void __init at91_add_device_eth(struct at91_eth_data *data)
 166 {
 167         if (!data)
 168                 return;
 169
 170         if (data->phy_irq_pin) {
 171                 at91_set_gpio_input(data->phy_irq_pin, 0);
 172                 at91_set_deglitch(data->phy_irq_pin, 1);
 173         }
 174
 175         /* Pins used for MII and RMII */
 176         at91_set_A_periph(AT91_PIN_PA16, 0);    /* EMDIO */
 177         at91_set_A_periph(AT91_PIN_PA15, 0);    /* EMDC */
 178         at91_set_A_periph(AT91_PIN_PA14, 0);    /* ERXER */
 179         at91_set_A_periph(AT91_PIN_PA13, 0);    /* ERX1 */
 180         at91_set_A_periph(AT91_PIN_PA12, 0);    /* ERX0 */
 181         at91_set_A_periph(AT91_PIN_PA11, 0);    /* ECRS_ECRSDV */
 182         at91_set_A_periph(AT91_PIN_PA10, 0);    /* ETX1 */
 183         at91_set_A_periph(AT91_PIN_PA9, 0);     /* ETX0 */
 184         at91_set_A_periph(AT91_PIN_PA8, 0);     /* ETXEN */
 185         at91_set_A_periph(AT91_PIN_PA7, 0);     /* ETXCK_EREFCK */
 186
 187         if (!data->is_rmii) {
 188                 at91_set_B_periph(AT91_PIN_PB19, 0);    /* ERXCK */
 189                 at91_set_B_periph(AT91_PIN_PB18, 0);    /* ECOL */
 190                 at91_set_B_periph(AT91_PIN_PB17, 0);    /* ERXDV */
 191                 at91_set_B_periph(AT91_PIN_PB16, 0);    /* ERX3 */
 192                 at91_set_B_periph(AT91_PIN_PB15, 0);    /* ERX2 */
 193                 at91_set_B_periph(AT91_PIN_PB14, 0);    /* ETXER */
 194                 at91_set_B_periph(AT91_PIN_PB13, 0);    /* ETX3 */
 195                 at91_set_B_periph(AT91_PIN_PB12, 0);    /* ETX2 */
 196         }
 197
 198         eth_data = *data;
 199         platform_device_register(&at91rm9200_eth_device);
 200 }
 201 #else
 202 void __init at91_add_device_eth(struct at91_eth_data *data) {}
 203 #endif
 204
 205
 206 /* --------------------------------------------------------------------
 207  *  Compact Flash / PCMCIA
 208  * -------------------------------------------------------------------- */
 209
 210 #if defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE)
 211 static struct at91_cf_data cf_data;
 212
 213 #define CF_BASE         AT91_CHIPSELECT_4
 214
 215 static struct resource cf_resources[] = {
 216         [0] = {
 217                 .start  = CF_BASE,
 218                 /* ties up CS4, CS5 and CS6 */
 219                 .end    = CF_BASE + (0x30000000 - 1),
 220                 .flags  = IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT,
 221         },
 222 };
 223
 224 static struct platform_device at91rm9200_cf_device = {
 225         .name           = "at91_cf",
 226         .id             = -1,
 227         .dev            = {
 228                                 .platform_data          = &cf_data,
 229         },
 230         .resource       = cf_resources,
 231         .num_resources  = ARRAY_SIZE(cf_resources),
 232 };
 233
 234 void __init at91_add_device_cf(struct at91_cf_data *data)
 235 {
 236         unsigned int csa;
 237
 238         if (!data)
 239                 return;
 240
 241         data->chipselect = 4;           /* can only use EBI ChipSelect 4 */
 242
 243         /* CF takes over CS4, CS5, CS6 */
 244         csa = at91_sys_read(AT91_EBI_CSA);
 245         at91_sys_write(AT91_EBI_CSA, csa | AT91_EBI_CS4A_SMC_COMPACTFLASH);
 246
 247         /*
 248          * Static memory controller timing adjustments.
 249          * REVISIT:  these timings are in terms of MCK cycles, so
 250          * when MCK changes (cpufreq etc) so must these values...
 251          */
 252         at91_sys_write(AT91_SMC_CSR(4),
 253                                   AT91_SMC_ACSS_STD
 254                                 | AT91_SMC_DBW_16
 255                                 | AT91_SMC_BAT
 256                                 | AT91_SMC_WSEN
 257                                 | AT91_SMC_NWS_(32)     /* wait states */
 258                                 | AT91_SMC_RWSETUP_(6)  /* setup time */
 259                                 | AT91_SMC_RWHOLD_(4)   /* hold time */
 260         );
 261
 262         /* input/irq */
 263         if (data->irq_pin) {
 264                 at91_set_gpio_input(data->irq_pin, 1);
 265                 at91_set_deglitch(data->irq_pin, 1);
 266         }
 267         at91_set_gpio_input(data->det_pin, 1);
 268         at91_set_deglitch(data->det_pin, 1);
 269
 270         /* outputs, initially off */
 271         if (data->vcc_pin)
 272                 at91_set_gpio_output(data->vcc_pin, 0);
 273         at91_set_gpio_output(data->rst_pin, 0);
 274
 275         /* force poweron defaults for these pins ... */
 276         at91_set_A_periph(AT91_PIN_PC9, 0);     /* A25/CFRNW */
 277         at91_set_A_periph(AT91_PIN_PC10, 0);    /* NCS4/CFCS */
 278         at91_set_A_periph(AT91_PIN_PC11, 0);    /* NCS5/CFCE1 */
 279         at91_set_A_periph(AT91_PIN_PC12, 0);    /* NCS6/CFCE2 */
 280
 281         /* nWAIT is _not_ a default setting */
 282         at91_set_A_periph(AT91_PIN_PC6, 1);     /* nWAIT */
 283
 284         cf_data = *data;
 285         platform_device_register(&at91rm9200_cf_device);
 286 }
 287 #else
 288 void __init at91_add_device_cf(struct at91_cf_data *data) {}
 289 #endif
 290
 291
 292 /* --------------------------------------------------------------------
 293  *  MMC / SD
 294  * -------------------------------------------------------------------- */
 295
 296 #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
 297 static u64 mmc_dmamask = DMA_BIT_MASK(32);
 298 static struct at91_mmc_data mmc_data;
 299
 300 static struct resource mmc_resources[] = {
 301         [0] = {
 302                 .start  = AT91RM9200_BASE_MCI,
 303                 .end    = AT91RM9200_BASE_MCI + SZ_16K - 1,
 304                 .flags  = IORESOURCE_MEM,
 305         },
 306         [1] = {
 307                 .start  = AT91RM9200_ID_MCI,
 308                 .end    = AT91RM9200_ID_MCI,
 309                 .flags  = IORESOURCE_IRQ,
 310         },
 311 };
 312
 313 static struct platform_device at91rm9200_mmc_device = {
 314         .name           = "at91_mci",
 315         .id             = -1,
 316         .dev            = {
 317                                 .dma_mask               = &mmc_dmamask,
 318                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 319                                 .platform_data          = &mmc_data,
 320         },
 321         .resource       = mmc_resources,
 322         .num_resources  = ARRAY_SIZE(mmc_resources),
 323 };
 324
 325 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
 326 {
 327         if (!data)
 328                 return;
 329
 330         /* input/irq */
 331         if (data->det_pin) {
 332                 at91_set_gpio_input(data->det_pin, 1);
 333                 at91_set_deglitch(data->det_pin, 1);
 334         }
 335         if (data->wp_pin)
 336                 at91_set_gpio_input(data->wp_pin, 1);
 337         if (data->vcc_pin)
 338                 at91_set_gpio_output(data->vcc_pin, 0);
 339
 340         /* CLK */
 341         at91_set_A_periph(AT91_PIN_PA27, 0);
 342
 343         if (data->slot_b) {
 344                 /* CMD */
 345                 at91_set_B_periph(AT91_PIN_PA8, 1);
 346
 347                 /* DAT0, maybe DAT1..DAT3 */
 348                 at91_set_B_periph(AT91_PIN_PA9, 1);
 349                 if (data->wire4) {
 350                         at91_set_B_periph(AT91_PIN_PA10, 1);
 351                         at91_set_B_periph(AT91_PIN_PA11, 1);
 352                         at91_set_B_periph(AT91_PIN_PA12, 1);
 353                 }
 354         } else {
 355                 /* CMD */
 356                 at91_set_A_periph(AT91_PIN_PA28, 1);
 357
 358                 /* DAT0, maybe DAT1..DAT3 */
 359                 at91_set_A_periph(AT91_PIN_PA29, 1);
 360                 if (data->wire4) {
 361                         at91_set_B_periph(AT91_PIN_PB3, 1);
 362                         at91_set_B_periph(AT91_PIN_PB4, 1);
 363                         at91_set_B_periph(AT91_PIN_PB5, 1);
 364                 }
 365         }
 366
 367         mmc_data = *data;
 368         platform_device_register(&at91rm9200_mmc_device);
 369 }
 370 #else
 371 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
 372 #endif
 373
 374
 375 /* --------------------------------------------------------------------
 376  *  NAND / SmartMedia
 377  * -------------------------------------------------------------------- */
 378
 379 #if defined(CONFIG_MTD_NAND_ATMEL) || defined(CONFIG_MTD_NAND_ATMEL_MODULE)
 380 static struct atmel_nand_data nand_data;
 381
 382 #define NAND_BASE       AT91_CHIPSELECT_3
 383
 384 static struct resource nand_resources[] = {
 385         {
 386                 .start  = NAND_BASE,
 387                 .end    = NAND_BASE + SZ_256M - 1,
 388                 .flags  = IORESOURCE_MEM,
 389         }
 390 };
 391
 392 static struct platform_device at91rm9200_nand_device = {
 393         .name           = "atmel_nand",
 394         .id             = -1,
 395         .dev            = {
 396                                 .platform_data  = &nand_data,
 397         },
 398         .resource       = nand_resources,
 399         .num_resources  = ARRAY_SIZE(nand_resources),
 400 };
 401
 402 void __init at91_add_device_nand(struct atmel_nand_data *data)
 403 {
 404         unsigned int csa;
 405
 406         if (!data)
 407                 return;
 408
 409         /* enable the address range of CS3 */
 410         csa = at91_sys_read(AT91_EBI_CSA);
 411         at91_sys_write(AT91_EBI_CSA, csa | AT91_EBI_CS3A_SMC_SMARTMEDIA);
 412
 413         /* set the bus interface characteristics */
 414         at91_sys_write(AT91_SMC_CSR(3), AT91_SMC_ACSS_STD | AT91_SMC_DBW_8 | AT91_SMC_WSEN
 415                 | AT91_SMC_NWS_(5)
 416                 | AT91_SMC_TDF_(1)
 417                 | AT91_SMC_RWSETUP_(0)  /* tDS Data Set up Time 30 - ns */
 418                 | AT91_SMC_RWHOLD_(1)   /* tDH Data Hold Time 20 - ns */
 419         );
 420
 421         /* enable pin */
 422         if (data->enable_pin)
 423                 at91_set_gpio_output(data->enable_pin, 1);
 424
 425         /* ready/busy pin */
 426         if (data->rdy_pin)
 427                 at91_set_gpio_input(data->rdy_pin, 1);
 428
 429         /* card detect pin */
 430         if (data->det_pin)
 431                 at91_set_gpio_input(data->det_pin, 1);
 432
 433         at91_set_A_periph(AT91_PIN_PC1, 0);             /* SMOE */
 434         at91_set_A_periph(AT91_PIN_PC3, 0);             /* SMWE */
 435
 436         nand_data = *data;
 437         platform_device_register(&at91rm9200_nand_device);
 438 }
 439 #else
 440 void __init at91_add_device_nand(struct atmel_nand_data *data) {}
 441 #endif
 442
 443
 444 /* --------------------------------------------------------------------
 445  *  TWI (i2c)
 446  * -------------------------------------------------------------------- */
 447
 448 /*
 449  * Prefer the GPIO code since the TWI controller isn't robust
 450  * (gets overruns and underruns under load) and can only issue
 451  * repeated STARTs in one scenario (the driver doesn't yet handle them).
 452  */
 453 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
 454
 455 static struct i2c_gpio_platform_data pdata = {
 456         .sda_pin                = AT91_PIN_PA25,
 457         .sda_is_open_drain      = 1,
 458         .scl_pin                = AT91_PIN_PA26,
 459         .scl_is_open_drain      = 1,
 460         .udelay                 = 2,            /* ~100 kHz */
 461 };
 462
 463 static struct platform_device at91rm9200_twi_device = {
 464         .name                   = "i2c-gpio",
 465         .id                     = -1,
 466         .dev.platform_data      = &pdata,
 467 };
 468
 469 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
 470 {
 471         at91_set_GPIO_periph(AT91_PIN_PA25, 1);         /* TWD (SDA) */
 472         at91_set_multi_drive(AT91_PIN_PA25, 1);
 473
 474         at91_set_GPIO_periph(AT91_PIN_PA26, 1);         /* TWCK (SCL) */
 475         at91_set_multi_drive(AT91_PIN_PA26, 1);
 476
 477         i2c_register_board_info(0, devices, nr_devices);
 478         platform_device_register(&at91rm9200_twi_device);
 479 }
 480
 481 #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
 482
 483 static struct resource twi_resources[] = {
 484         [0] = {
 485                 .start  = AT91RM9200_BASE_TWI,
 486                 .end    = AT91RM9200_BASE_TWI + SZ_16K - 1,
 487                 .flags  = IORESOURCE_MEM,
 488         },
 489         [1] = {
 490                 .start  = AT91RM9200_ID_TWI,
 491                 .end    = AT91RM9200_ID_TWI,
 492                 .flags  = IORESOURCE_IRQ,
 493         },
 494 };
 495
 496 static struct platform_device at91rm9200_twi_device = {
 497         .name           = "at91_i2c",
 498         .id             = -1,
 499         .resource       = twi_resources,
 500         .num_resources  = ARRAY_SIZE(twi_resources),
 501 };
 502
 503 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
 504 {
 505         /* pins used for TWI interface */
 506         at91_set_A_periph(AT91_PIN_PA25, 0);            /* TWD */
 507         at91_set_multi_drive(AT91_PIN_PA25, 1);
 508
 509         at91_set_A_periph(AT91_PIN_PA26, 0);            /* TWCK */
 510         at91_set_multi_drive(AT91_PIN_PA26, 1);
 511
 512         i2c_register_board_info(0, devices, nr_devices);
 513         platform_device_register(&at91rm9200_twi_device);
 514 }
 515 #else
 516 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
 517 #endif
 518
 519
 520 /* --------------------------------------------------------------------
 521  *  SPI
 522  * -------------------------------------------------------------------- */
 523
 524 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
 525 static u64 spi_dmamask = DMA_BIT_MASK(32);
 526
 527 static struct resource spi_resources[] = {
 528         [0] = {
 529                 .start  = AT91RM9200_BASE_SPI,
 530                 .end    = AT91RM9200_BASE_SPI + SZ_16K - 1,
 531                 .flags  = IORESOURCE_MEM,
 532         },
 533         [1] = {
 534                 .start  = AT91RM9200_ID_SPI,
 535                 .end    = AT91RM9200_ID_SPI,
 536                 .flags  = IORESOURCE_IRQ,
 537         },
 538 };
 539
 540 static struct platform_device at91rm9200_spi_device = {
 541         .name           = "atmel_spi",
 542         .id             = 0,
 543         .dev            = {
 544                                 .dma_mask               = &spi_dmamask,
 545                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 546         },
 547         .resource       = spi_resources,
 548         .num_resources  = ARRAY_SIZE(spi_resources),
 549 };
 550
 551 static const unsigned spi_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PA5, AT91_PIN_PA6 };
 552
 553 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
 554 {
 555         int i;
 556         unsigned long cs_pin;
 557
 558         at91_set_A_periph(AT91_PIN_PA0, 0);     /* MISO */
 559         at91_set_A_periph(AT91_PIN_PA1, 0);     /* MOSI */
 560         at91_set_A_periph(AT91_PIN_PA2, 0);     /* SPCK */
 561
 562         /* Enable SPI chip-selects */
 563         for (i = 0; i < nr_devices; i++) {
 564                 if (devices[i].controller_data)
 565                         cs_pin = (unsigned long) devices[i].controller_data;
 566                 else
 567                         cs_pin = spi_standard_cs[devices[i].chip_select];
 568
 569                 if (devices[i].chip_select == 0)        /* for CS0 errata */
 570                         at91_set_A_periph(cs_pin, 0);
 571                 else
 572                         at91_set_gpio_output(cs_pin, 1);
 573
 574
 575                 /* pass chip-select pin to driver */
 576                 devices[i].controller_data = (void *) cs_pin;
 577         }
 578
 579         spi_register_board_info(devices, nr_devices);
 580         platform_device_register(&at91rm9200_spi_device);
 581 }
 582 #else
 583 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
 584 #endif
 585
 586
 587 /* --------------------------------------------------------------------
 588  *  Timer/Counter blocks
 589  * -------------------------------------------------------------------- */
 590
 591 #ifdef CONFIG_ATMEL_TCLIB
 592
 593 static struct resource tcb0_resources[] = {
 594         [0] = {
 595                 .start  = AT91RM9200_BASE_TCB0,
 596                 .end    = AT91RM9200_BASE_TCB0 + SZ_16K - 1,
 597                 .flags  = IORESOURCE_MEM,
 598         },
 599         [1] = {
 600                 .start  = AT91RM9200_ID_TC0,
 601                 .end    = AT91RM9200_ID_TC0,
 602                 .flags  = IORESOURCE_IRQ,
 603         },
 604         [2] = {
 605                 .start  = AT91RM9200_ID_TC1,
 606                 .end    = AT91RM9200_ID_TC1,
 607                 .flags  = IORESOURCE_IRQ,
 608         },
 609         [3] = {
 610                 .start  = AT91RM9200_ID_TC2,
 611                 .end    = AT91RM9200_ID_TC2,
 612                 .flags  = IORESOURCE_IRQ,
 613         },
 614 };
 615
 616 static struct platform_device at91rm9200_tcb0_device = {
 617         .name           = "atmel_tcb",
 618         .id             = 0,
 619         .resource       = tcb0_resources,
 620         .num_resources  = ARRAY_SIZE(tcb0_resources),
 621 };
 622
 623 static struct resource tcb1_resources[] = {
 624         [0] = {
 625                 .start  = AT91RM9200_BASE_TCB1,
 626                 .end    = AT91RM9200_BASE_TCB1 + SZ_16K - 1,
 627                 .flags  = IORESOURCE_MEM,
 628         },
 629         [1] = {
 630                 .start  = AT91RM9200_ID_TC3,
 631                 .end    = AT91RM9200_ID_TC3,
 632                 .flags  = IORESOURCE_IRQ,
 633         },
 634         [2] = {
 635                 .start  = AT91RM9200_ID_TC4,
 636                 .end    = AT91RM9200_ID_TC4,
 637                 .flags  = IORESOURCE_IRQ,
 638         },
 639         [3] = {
 640                 .start  = AT91RM9200_ID_TC5,
 641                 .end    = AT91RM9200_ID_TC5,
 642                 .flags  = IORESOURCE_IRQ,
 643         },
 644 };
 645
 646 static struct platform_device at91rm9200_tcb1_device = {
 647         .name           = "atmel_tcb",
 648         .id             = 1,
 649         .resource       = tcb1_resources,
 650         .num_resources  = ARRAY_SIZE(tcb1_resources),
 651 };
 652
 653 static void __init at91_add_device_tc(void)
 654 {
 655         platform_device_register(&at91rm9200_tcb0_device);
 656         platform_device_register(&at91rm9200_tcb1_device);
 657 }
 658 #else
 659 static void __init at91_add_device_tc(void) { }
 660 #endif
 661
 662
 663 /* --------------------------------------------------------------------
 664  *  RTC
 665  * -------------------------------------------------------------------- */
 666
 667 #if defined(CONFIG_RTC_DRV_AT91RM9200) || defined(CONFIG_RTC_DRV_AT91RM9200_MODULE)
 668 static struct platform_device at91rm9200_rtc_device = {
 669         .name           = "at91_rtc",
 670         .id             = -1,
 671         .num_resources  = 0,
 672 };
 673
 674 static void __init at91_add_device_rtc(void)
 675 {
 676         platform_device_register(&at91rm9200_rtc_device);
 677 }
 678 #else
 679 static void __init at91_add_device_rtc(void) {}
 680 #endif
 681
 682
 683 /* --------------------------------------------------------------------
 684  *  Watchdog
 685  * -------------------------------------------------------------------- */
 686
 687 #if defined(CONFIG_AT91RM9200_WATCHDOG) || defined(CONFIG_AT91RM9200_WATCHDOG_MODULE)
 688 static struct platform_device at91rm9200_wdt_device = {
 689         .name           = "at91_wdt",
 690         .id             = -1,
 691         .num_resources  = 0,
 692 };
 693
 694 static void __init at91_add_device_watchdog(void)
 695 {
 696         platform_device_register(&at91rm9200_wdt_device);
 697 }
 698 #else
 699 static void __init at91_add_device_watchdog(void) {}
 700 #endif
 701
 702
 703 /* --------------------------------------------------------------------
 704  *  SSC -- Synchronous Serial Controller
 705  * -------------------------------------------------------------------- */
 706
 707 #if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
 708 static u64 ssc0_dmamask = DMA_BIT_MASK(32);
 709
 710 static struct resource ssc0_resources[] = {
 711         [0] = {
 712                 .start  = AT91RM9200_BASE_SSC0,
 713                 .end    = AT91RM9200_BASE_SSC0 + SZ_16K - 1,
 714                 .flags  = IORESOURCE_MEM,
 715         },
 716         [1] = {
 717                 .start  = AT91RM9200_ID_SSC0,
 718                 .end    = AT91RM9200_ID_SSC0,
 719                 .flags  = IORESOURCE_IRQ,
 720         },
 721 };
 722
 723 static struct platform_device at91rm9200_ssc0_device = {
 724         .name   = "ssc",
 725         .id     = 0,
 726         .dev    = {
 727                 .dma_mask               = &ssc0_dmamask,
 728                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 729         },
 730         .resource       = ssc0_resources,
 731         .num_resources  = ARRAY_SIZE(ssc0_resources),
 732 };
 733
 734 static inline void configure_ssc0_pins(unsigned pins)
 735 {
 736         if (pins & ATMEL_SSC_TF)
 737                 at91_set_A_periph(AT91_PIN_PB0, 1);
 738         if (pins & ATMEL_SSC_TK)
 739                 at91_set_A_periph(AT91_PIN_PB1, 1);
 740         if (pins & ATMEL_SSC_TD)
 741                 at91_set_A_periph(AT91_PIN_PB2, 1);
 742         if (pins & ATMEL_SSC_RD)
 743                 at91_set_A_periph(AT91_PIN_PB3, 1);
 744         if (pins & ATMEL_SSC_RK)
 745                 at91_set_A_periph(AT91_PIN_PB4, 1);
 746         if (pins & ATMEL_SSC_RF)
 747                 at91_set_A_periph(AT91_PIN_PB5, 1);
 748 }
 749
 750 static u64 ssc1_dmamask = DMA_BIT_MASK(32);
 751
 752 static struct resource ssc1_resources[] = {
 753         [0] = {
 754                 .start  = AT91RM9200_BASE_SSC1,
 755                 .end    = AT91RM9200_BASE_SSC1 + SZ_16K - 1,
 756                 .flags  = IORESOURCE_MEM,
 757         },
 758         [1] = {
 759                 .start  = AT91RM9200_ID_SSC1,
 760                 .end    = AT91RM9200_ID_SSC1,
 761                 .flags  = IORESOURCE_IRQ,
 762         },
 763 };
 764
 765 static struct platform_device at91rm9200_ssc1_device = {
 766         .name   = "ssc",
 767         .id     = 1,
 768         .dev    = {
 769                 .dma_mask               = &ssc1_dmamask,
 770                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 771         },
 772         .resource       = ssc1_resources,
 773         .num_resources  = ARRAY_SIZE(ssc1_resources),
 774 };
 775
 776 static inline void configure_ssc1_pins(unsigned pins)
 777 {
 778         if (pins & ATMEL_SSC_TF)
 779                 at91_set_A_periph(AT91_PIN_PB6, 1);
 780         if (pins & ATMEL_SSC_TK)
 781                 at91_set_A_periph(AT91_PIN_PB7, 1);
 782         if (pins & ATMEL_SSC_TD)
 783                 at91_set_A_periph(AT91_PIN_PB8, 1);
 784         if (pins & ATMEL_SSC_RD)
 785                 at91_set_A_periph(AT91_PIN_PB9, 1);
 786         if (pins & ATMEL_SSC_RK)
 787                 at91_set_A_periph(AT91_PIN_PB10, 1);
 788         if (pins & ATMEL_SSC_RF)
 789                 at91_set_A_periph(AT91_PIN_PB11, 1);
 790 }
 791
 792 static u64 ssc2_dmamask = DMA_BIT_MASK(32);
 793
 794 static struct resource ssc2_resources[] = {
 795         [0] = {
 796                 .start  = AT91RM9200_BASE_SSC2,
 797                 .end    = AT91RM9200_BASE_SSC2 + SZ_16K - 1,
 798                 .flags  = IORESOURCE_MEM,
 799         },
 800         [1] = {
 801                 .start  = AT91RM9200_ID_SSC2,
 802                 .end    = AT91RM9200_ID_SSC2,
 803                 .flags  = IORESOURCE_IRQ,
 804         },
 805 };
 806
 807 static struct platform_device at91rm9200_ssc2_device = {
 808         .name   = "ssc",
 809         .id     = 2,
 810         .dev    = {
 811                 .dma_mask               = &ssc2_dmamask,
 812                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 813         },
 814         .resource       = ssc2_resources,
 815         .num_resources  = ARRAY_SIZE(ssc2_resources),
 816 };
 817
 818 static inline void configure_ssc2_pins(unsigned pins)
 819 {
 820         if (pins & ATMEL_SSC_TF)
 821                 at91_set_A_periph(AT91_PIN_PB12, 1);
 822         if (pins & ATMEL_SSC_TK)
 823                 at91_set_A_periph(AT91_PIN_PB13, 1);
 824         if (pins & ATMEL_SSC_TD)
 825                 at91_set_A_periph(AT91_PIN_PB14, 1);
 826         if (pins & ATMEL_SSC_RD)
 827                 at91_set_A_periph(AT91_PIN_PB15, 1);
 828         if (pins & ATMEL_SSC_RK)
 829                 at91_set_A_periph(AT91_PIN_PB16, 1);
 830         if (pins & ATMEL_SSC_RF)
 831                 at91_set_A_periph(AT91_PIN_PB17, 1);
 832 }
 833
 834 /*
 835  * SSC controllers are accessed through library code, instead of any
 836  * kind of all-singing/all-dancing driver.  For example one could be
 837  * used by a particular I2S audio codec's driver, while another one
 838  * on the same system might be used by a custom data capture driver.
 839  */
 840 void __init at91_add_device_ssc(unsigned id, unsigned pins)
 841 {
 842         struct platform_device *pdev;
 843
 844         /*
 845          * NOTE: caller is responsible for passing information matching
 846          * "pins" to whatever will be using each particular controller.
 847          */
 848         switch (id) {
 849         case AT91RM9200_ID_SSC0:
 850                 pdev = &at91rm9200_ssc0_device;
 851                 configure_ssc0_pins(pins);
 852                 break;
 853         case AT91RM9200_ID_SSC1:
 854                 pdev = &at91rm9200_ssc1_device;
 855                 configure_ssc1_pins(pins);
 856                 break;
 857         case AT91RM9200_ID_SSC2:
 858                 pdev = &at91rm9200_ssc2_device;
 859                 configure_ssc2_pins(pins);
 860                 break;
 861         default:
 862                 return;
 863         }
 864
 865         platform_device_register(pdev);
 866 }
 867
 868 #else
 869 void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
 870 #endif
 871
 872
 873 /* --------------------------------------------------------------------
 874  *  UART
 875  * -------------------------------------------------------------------- */
 876
 877 #if defined(CONFIG_SERIAL_ATMEL)
 878 static struct resource dbgu_resources[] = {
 879         [0] = {
 880                 .start  = AT91_VA_BASE_SYS + AT91_DBGU,
 881                 .end    = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
 882                 .flags  = IORESOURCE_MEM,
 883         },
 884         [1] = {
 885                 .start  = AT91_ID_SYS,
 886                 .end    = AT91_ID_SYS,
 887                 .flags  = IORESOURCE_IRQ,
 888         },
 889 };
 890
 891 static struct atmel_uart_data dbgu_data = {
 892         .use_dma_tx     = 0,
 893         .use_dma_rx     = 0,            /* DBGU not capable of receive DMA */
 894         .regs           = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
 895 };
 896
 897 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
 898
 899 static struct platform_device at91rm9200_dbgu_device = {
 900         .name           = "atmel_usart",
 901         .id             = 0,
 902         .dev            = {
 903                                 .dma_mask               = &dbgu_dmamask,
 904                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 905                                 .platform_data          = &dbgu_data,
 906         },
 907         .resource       = dbgu_resources,
 908         .num_resources  = ARRAY_SIZE(dbgu_resources),
 909 };
 910
 911 static inline void configure_dbgu_pins(void)
 912 {
 913         at91_set_A_periph(AT91_PIN_PA30, 0);            /* DRXD */
 914         at91_set_A_periph(AT91_PIN_PA31, 1);            /* DTXD */
 915 }
 916
 917 static struct resource uart0_resources[] = {
 918         [0] = {
 919                 .start  = AT91RM9200_BASE_US0,
 920                 .end    = AT91RM9200_BASE_US0 + SZ_16K - 1,
 921                 .flags  = IORESOURCE_MEM,
 922         },
 923         [1] = {
 924                 .start  = AT91RM9200_ID_US0,
 925                 .end    = AT91RM9200_ID_US0,
 926                 .flags  = IORESOURCE_IRQ,
 927         },
 928 };
 929
 930 static struct atmel_uart_data uart0_data = {
 931         .use_dma_tx     = 1,
 932         .use_dma_rx     = 1,
 933 };
 934
 935 static u64 uart0_dmamask = DMA_BIT_MASK(32);
 936
 937 static struct platform_device at91rm9200_uart0_device = {
 938         .name           = "atmel_usart",
 939         .id             = 1,
 940         .dev            = {
 941                                 .dma_mask               = &uart0_dmamask,
 942                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 943                                 .platform_data          = &uart0_data,
 944         },
 945         .resource       = uart0_resources,
 946         .num_resources  = ARRAY_SIZE(uart0_resources),
 947 };
 948
 949 static inline void configure_usart0_pins(unsigned pins)
 950 {
 951         at91_set_A_periph(AT91_PIN_PA17, 1);            /* TXD0 */
 952         at91_set_A_periph(AT91_PIN_PA18, 0);            /* RXD0 */
 953
 954         if (pins & ATMEL_UART_CTS)
 955                 at91_set_A_periph(AT91_PIN_PA20, 0);    /* CTS0 */
 956
 957         if (pins & ATMEL_UART_RTS) {
 958                 /*
 959                  * AT91RM9200 Errata #39 - RTS0 is not internally connected to PA21.
 960                  *  We need to drive the pin manually.  Default is off (RTS is active low).
 961                  */
 962                 at91_set_gpio_output(AT91_PIN_PA21, 1);
 963         }
 964 }
 965
 966 static struct resource uart1_resources[] = {
 967         [0] = {
 968                 .start  = AT91RM9200_BASE_US1,
 969                 .end    = AT91RM9200_BASE_US1 + SZ_16K - 1,
 970                 .flags  = IORESOURCE_MEM,
 971         },
 972         [1] = {
 973                 .start  = AT91RM9200_ID_US1,
 974                 .end    = AT91RM9200_ID_US1,
 975                 .flags  = IORESOURCE_IRQ,
 976         },
 977 };
 978
 979 static struct atmel_uart_data uart1_data = {
 980         .use_dma_tx     = 1,
 981         .use_dma_rx     = 1,
 982 };
 983
 984 static u64 uart1_dmamask = DMA_BIT_MASK(32);
 985
 986 static struct platform_device at91rm9200_uart1_device = {
 987         .name           = "atmel_usart",
 988         .id             = 2,
 989         .dev            = {
 990                                 .dma_mask               = &uart1_dmamask,
 991                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 992                                 .platform_data          = &uart1_data,
 993         },
 994         .resource       = uart1_resources,
 995         .num_resources  = ARRAY_SIZE(uart1_resources),
 996 };
 997
 998 static inline void configure_usart1_pins(unsigned pins)
 999 {
1000         at91_set_A_periph(AT91_PIN_PB20, 1);            /* TXD1 */
1001         at91_set_A_periph(AT91_PIN_PB21, 0);            /* RXD1 */
1002
1003         if (pins & ATMEL_UART_RI)
1004                 at91_set_A_periph(AT91_PIN_PB18, 0);    /* RI1 */
1005         if (pins & ATMEL_UART_DTR)
1006                 at91_set_A_periph(AT91_PIN_PB19, 0);    /* DTR1 */
1007         if (pins & ATMEL_UART_DCD)
1008                 at91_set_A_periph(AT91_PIN_PB23, 0);    /* DCD1 */
1009         if (pins & ATMEL_UART_CTS)
1010                 at91_set_A_periph(AT91_PIN_PB24, 0);    /* CTS1 */
1011         if (pins & ATMEL_UART_DSR)
1012                 at91_set_A_periph(AT91_PIN_PB25, 0);    /* DSR1 */
1013         if (pins & ATMEL_UART_RTS)
1014                 at91_set_A_periph(AT91_PIN_PB26, 0);    /* RTS1 */
1015 }
1016
1017 static struct resource uart2_resources[] = {
1018         [0] = {
1019                 .start  = AT91RM9200_BASE_US2,
1020                 .end    = AT91RM9200_BASE_US2 + SZ_16K - 1,
1021                 .flags  = IORESOURCE_MEM,
1022         },
1023         [1] = {
1024                 .start  = AT91RM9200_ID_US2,
1025                 .end    = AT91RM9200_ID_US2,
1026                 .flags  = IORESOURCE_IRQ,
1027         },
1028 };
1029
1030 static struct atmel_uart_data uart2_data = {
1031         .use_dma_tx     = 1,
1032         .use_dma_rx     = 1,
1033 };
1034
1035 static u64 uart2_dmamask = DMA_BIT_MASK(32);
1036
1037 static struct platform_device at91rm9200_uart2_device = {
1038         .name           = "atmel_usart",
1039         .id             = 3,
1040         .dev            = {
1041                                 .dma_mask               = &uart2_dmamask,
1042                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1043                                 .platform_data          = &uart2_data,
1044         },
1045         .resource       = uart2_resources,
1046         .num_resources  = ARRAY_SIZE(uart2_resources),
1047 };
1048
1049 static inline void configure_usart2_pins(unsigned pins)
1050 {
1051         at91_set_A_periph(AT91_PIN_PA22, 0);            /* RXD2 */
1052         at91_set_A_periph(AT91_PIN_PA23, 1);            /* TXD2 */
1053
1054         if (pins & ATMEL_UART_CTS)
1055                 at91_set_B_periph(AT91_PIN_PA30, 0);    /* CTS2 */
1056         if (pins & ATMEL_UART_RTS)
1057                 at91_set_B_periph(AT91_PIN_PA31, 0);    /* RTS2 */
1058 }
1059
1060 static struct resource uart3_resources[] = {
1061         [0] = {
1062                 .start  = AT91RM9200_BASE_US3,
1063                 .end    = AT91RM9200_BASE_US3 + SZ_16K - 1,
1064                 .flags  = IORESOURCE_MEM,
1065         },
1066         [1] = {
1067                 .start  = AT91RM9200_ID_US3,
1068                 .end    = AT91RM9200_ID_US3,
1069                 .flags  = IORESOURCE_IRQ,
1070         },
1071 };
1072
1073 static struct atmel_uart_data uart3_data = {
1074         .use_dma_tx     = 1,
1075         .use_dma_rx     = 1,
1076 };
1077
1078 static u64 uart3_dmamask = DMA_BIT_MASK(32);
1079
1080 static struct platform_device at91rm9200_uart3_device = {
1081         .name           = "atmel_usart",
1082         .id             = 4,
1083         .dev            = {
1084                                 .dma_mask               = &uart3_dmamask,
1085                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1086                                 .platform_data          = &uart3_data,
1087         },
1088         .resource       = uart3_resources,
1089         .num_resources  = ARRAY_SIZE(uart3_resources),
1090 };
1091
1092 static inline void configure_usart3_pins(unsigned pins)
1093 {
1094         at91_set_B_periph(AT91_PIN_PA5, 1);             /* TXD3 */
1095         at91_set_B_periph(AT91_PIN_PA6, 0);             /* RXD3 */
1096
1097         if (pins & ATMEL_UART_CTS)
1098                 at91_set_B_periph(AT91_PIN_PB1, 0);     /* CTS3 */
1099         if (pins & ATMEL_UART_RTS)
1100                 at91_set_B_periph(AT91_PIN_PB0, 0);     /* RTS3 */
1101 }
1102
1103 static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART];   /* the UARTs to use */
1104 struct platform_device *atmel_default_console_device;   /* the serial console device */
1105
1106 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
1107 {
1108         struct platform_device *pdev;
1109         struct atmel_uart_data *pdata;
1110
1111         switch (id) {
1112                 case 0:         /* DBGU */
1113                         pdev = &at91rm9200_dbgu_device;
1114                         configure_dbgu_pins();
1115                         break;
1116                 case AT91RM9200_ID_US0:
1117                         pdev = &at91rm9200_uart0_device;
1118                         configure_usart0_pins(pins);
1119                         break;
1120                 case AT91RM9200_ID_US1:
1121                         pdev = &at91rm9200_uart1_device;
1122                         configure_usart1_pins(pins);
1123                         break;
1124                 case AT91RM9200_ID_US2:
1125                         pdev = &at91rm9200_uart2_device;
1126                         configure_usart2_pins(pins);
1127                         break;
1128                 case AT91RM9200_ID_US3:
1129                         pdev = &at91rm9200_uart3_device;
1130                         configure_usart3_pins(pins);
1131                         break;
1132                 default:
1133                         return;
1134         }
1135         pdata = pdev->dev.platform_data;
1136         pdata->num = portnr;            /* update to mapped ID */
1137
1138         if (portnr < ATMEL_MAX_UART)
1139                 at91_uarts[portnr] = pdev;
1140 }
1141
1142 void __init at91_set_serial_console(unsigned portnr)
1143 {
1144         if (portnr < ATMEL_MAX_UART) {
1145                 atmel_default_console_device = at91_uarts[portnr];
1146                 at91rm9200_set_console_clock(at91_uarts[portnr]->id);
1147         }
1148 }
1149
1150 void __init at91_add_device_serial(void)
1151 {
1152         int i;
1153
1154         for (i = 0; i < ATMEL_MAX_UART; i++) {
1155                 if (at91_uarts[i])
1156                         platform_device_register(at91_uarts[i]);
1157         }
1158
1159         if (!atmel_default_console_device)
1160                 printk(KERN_INFO "AT91: No default serial console defined.\n");
1161 }
1162 #else
1163 void __init __deprecated at91_init_serial(struct at91_uart_config *config) {}
1164 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
1165 void __init at91_set_serial_console(unsigned portnr) {}
1166 void __init at91_add_device_serial(void) {}
1167 #endif
1168
1169
1170 /* -------------------------------------------------------------------- */
1171
1172 /*
1173  * These devices are always present and don't need any board-specific
1174  * setup.
1175  */
1176 static int __init at91_add_standard_devices(void)
1177 {
1178         at91_add_device_rtc();
1179         at91_add_device_watchdog();
1180         at91_add_device_tc();
1181         return 0;
1182 }
1183
1184 arch_initcall(at91_add_standard_devices);