2 * linux/arch/arm/common/sa1111.c
6 * Original code by John Dorsey
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
12 * This file contains all generic SA1111 support.
14 * All initialization functions provided here are intended to be called
15 * from machine specific code with proper arguments when required.
17 #include <linux/module.h>
18 #include <linux/init.h>
19 #include <linux/kernel.h>
20 #include <linux/delay.h>
21 #include <linux/errno.h>
22 #include <linux/ioport.h>
23 #include <linux/platform_device.h>
24 #include <linux/slab.h>
25 #include <linux/spinlock.h>
26 #include <linux/dma-mapping.h>
27 #include <linux/clk.h>
30 #include <mach/hardware.h>
31 #include <asm/mach-types.h>
33 #include <asm/mach/irq.h>
34 #include <asm/sizes.h>
36 #include <asm/hardware/sa1111.h>
39 #define IRQ_GPAIN0 (0)
40 #define IRQ_GPAIN1 (1)
41 #define IRQ_GPAIN2 (2)
42 #define IRQ_GPAIN3 (3)
43 #define IRQ_GPBIN0 (4)
44 #define IRQ_GPBIN1 (5)
45 #define IRQ_GPBIN2 (6)
46 #define IRQ_GPBIN3 (7)
47 #define IRQ_GPBIN4 (8)
48 #define IRQ_GPBIN5 (9)
49 #define IRQ_GPCIN0 (10)
50 #define IRQ_GPCIN1 (11)
51 #define IRQ_GPCIN2 (12)
52 #define IRQ_GPCIN3 (13)
53 #define IRQ_GPCIN4 (14)
54 #define IRQ_GPCIN5 (15)
55 #define IRQ_GPCIN6 (16)
56 #define IRQ_GPCIN7 (17)
57 #define IRQ_MSTXINT (18)
58 #define IRQ_MSRXINT (19)
59 #define IRQ_MSSTOPERRINT (20)
60 #define IRQ_TPTXINT (21)
61 #define IRQ_TPRXINT (22)
62 #define IRQ_TPSTOPERRINT (23)
63 #define SSPXMTINT (24)
64 #define SSPRCVINT (25)
66 #define AUDXMTDMADONEA (32)
67 #define AUDRCVDMADONEA (33)
68 #define AUDXMTDMADONEB (34)
69 #define AUDRCVDMADONEB (35)
77 #define IRQ_USBPWR (43)
79 #define IRQ_HCIBUFFACC (45)
80 #define IRQ_HCIRMTWKP (46)
81 #define IRQ_NHCIMFCIR (47)
82 #define IRQ_USB_PORT_RESUME (48)
83 #define IRQ_S0_READY_NINT (49)
84 #define IRQ_S1_READY_NINT (50)
85 #define IRQ_S0_CD_VALID (51)
86 #define IRQ_S1_CD_VALID (52)
87 #define IRQ_S0_BVD1_STSCHG (53)
88 #define IRQ_S1_BVD1_STSCHG (54)
90 extern void __init sa1110_mb_enable(void);
93 * We keep the following data for the overall SA1111. Note that the
94 * struct device and struct resource are "fake"; they should be supplied
95 * by the bus above us. However, in the interests of getting all SA1111
96 * drivers converted over to the device model, we provide this as an
97 * anchor point for all the other drivers.
104 int irq_base; /* base for cascaded on-chip IRQs */
113 * We _really_ need to eliminate this. Its only users
114 * are the PWM and DMA checking code.
116 static struct sa1111 *g_sa1111;
118 struct sa1111_dev_info {
119 unsigned long offset;
120 unsigned long skpcr_mask;
125 static struct sa1111_dev_info sa1111_devices[] = {
127 .offset = SA1111_USB,
128 .skpcr_mask = SKPCR_UCLKEN,
129 .devid = SA1111_DEVID_USB,
141 .skpcr_mask = SKPCR_I2SCLKEN | SKPCR_L3CLKEN,
142 .devid = SA1111_DEVID_SAC,
152 .skpcr_mask = SKPCR_SCLKEN,
153 .devid = SA1111_DEVID_SSP,
156 .offset = SA1111_KBD,
157 .skpcr_mask = SKPCR_PTCLKEN,
158 .devid = SA1111_DEVID_PS2,
165 .offset = SA1111_MSE,
166 .skpcr_mask = SKPCR_PMCLKEN,
167 .devid = SA1111_DEVID_PS2,
176 .devid = SA1111_DEVID_PCMCIA,
189 * SA1111 interrupt support. Since clearing an IRQ while there are
190 * active IRQs causes the interrupt output to pulse, the upper levels
191 * will call us again if there are more interrupts to process.
194 sa1111_irq_handler(unsigned int irq, struct irq_desc *desc)
196 unsigned int stat0, stat1, i;
197 struct sa1111 *sachip = irq_get_handler_data(irq);
198 void __iomem *mapbase = sachip->base + SA1111_INTC;
200 stat0 = sa1111_readl(mapbase + SA1111_INTSTATCLR0);
201 stat1 = sa1111_readl(mapbase + SA1111_INTSTATCLR1);
203 sa1111_writel(stat0, mapbase + SA1111_INTSTATCLR0);
205 desc->irq_data.chip->irq_ack(&desc->irq_data);
207 sa1111_writel(stat1, mapbase + SA1111_INTSTATCLR1);
209 if (stat0 == 0 && stat1 == 0) {
210 do_bad_IRQ(irq, desc);
214 for (i = 0; stat0; i++, stat0 >>= 1)
216 generic_handle_irq(i + sachip->irq_base);
218 for (i = 32; stat1; i++, stat1 >>= 1)
220 generic_handle_irq(i + sachip->irq_base);
222 /* For level-based interrupts */
223 desc->irq_data.chip->irq_unmask(&desc->irq_data);
226 #define SA1111_IRQMASK_LO(x) (1 << (x - sachip->irq_base))
227 #define SA1111_IRQMASK_HI(x) (1 << (x - sachip->irq_base - 32))
229 static void sa1111_ack_irq(struct irq_data *d)
233 static void sa1111_mask_lowirq(struct irq_data *d)
235 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
236 void __iomem *mapbase = sachip->base + SA1111_INTC;
239 ie0 = sa1111_readl(mapbase + SA1111_INTEN0);
240 ie0 &= ~SA1111_IRQMASK_LO(d->irq);
241 writel(ie0, mapbase + SA1111_INTEN0);
244 static void sa1111_unmask_lowirq(struct irq_data *d)
246 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
247 void __iomem *mapbase = sachip->base + SA1111_INTC;
250 ie0 = sa1111_readl(mapbase + SA1111_INTEN0);
251 ie0 |= SA1111_IRQMASK_LO(d->irq);
252 sa1111_writel(ie0, mapbase + SA1111_INTEN0);
256 * Attempt to re-trigger the interrupt. The SA1111 contains a register
257 * (INTSET) which claims to do this. However, in practice no amount of
258 * manipulation of INTEN and INTSET guarantees that the interrupt will
259 * be triggered. In fact, its very difficult, if not impossible to get
260 * INTSET to re-trigger the interrupt.
262 static int sa1111_retrigger_lowirq(struct irq_data *d)
264 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
265 void __iomem *mapbase = sachip->base + SA1111_INTC;
266 unsigned int mask = SA1111_IRQMASK_LO(d->irq);
270 ip0 = sa1111_readl(mapbase + SA1111_INTPOL0);
271 for (i = 0; i < 8; i++) {
272 sa1111_writel(ip0 ^ mask, mapbase + SA1111_INTPOL0);
273 sa1111_writel(ip0, mapbase + SA1111_INTPOL0);
274 if (sa1111_readl(mapbase + SA1111_INTSTATCLR0) & mask)
279 printk(KERN_ERR "Danger Will Robinson: failed to "
280 "re-trigger IRQ%d\n", d->irq);
281 return i == 8 ? -1 : 0;
284 static int sa1111_type_lowirq(struct irq_data *d, unsigned int flags)
286 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
287 void __iomem *mapbase = sachip->base + SA1111_INTC;
288 unsigned int mask = SA1111_IRQMASK_LO(d->irq);
291 if (flags == IRQ_TYPE_PROBE)
294 if ((!(flags & IRQ_TYPE_EDGE_RISING) ^ !(flags & IRQ_TYPE_EDGE_FALLING)) == 0)
297 ip0 = sa1111_readl(mapbase + SA1111_INTPOL0);
298 if (flags & IRQ_TYPE_EDGE_RISING)
302 sa1111_writel(ip0, mapbase + SA1111_INTPOL0);
303 sa1111_writel(ip0, mapbase + SA1111_WAKEPOL0);
308 static int sa1111_wake_lowirq(struct irq_data *d, unsigned int on)
310 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
311 void __iomem *mapbase = sachip->base + SA1111_INTC;
312 unsigned int mask = SA1111_IRQMASK_LO(d->irq);
315 we0 = sa1111_readl(mapbase + SA1111_WAKEEN0);
320 sa1111_writel(we0, mapbase + SA1111_WAKEEN0);
325 static struct irq_chip sa1111_low_chip = {
327 .irq_ack = sa1111_ack_irq,
328 .irq_mask = sa1111_mask_lowirq,
329 .irq_unmask = sa1111_unmask_lowirq,
330 .irq_retrigger = sa1111_retrigger_lowirq,
331 .irq_set_type = sa1111_type_lowirq,
332 .irq_set_wake = sa1111_wake_lowirq,
335 static void sa1111_mask_highirq(struct irq_data *d)
337 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
338 void __iomem *mapbase = sachip->base + SA1111_INTC;
341 ie1 = sa1111_readl(mapbase + SA1111_INTEN1);
342 ie1 &= ~SA1111_IRQMASK_HI(d->irq);
343 sa1111_writel(ie1, mapbase + SA1111_INTEN1);
346 static void sa1111_unmask_highirq(struct irq_data *d)
348 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
349 void __iomem *mapbase = sachip->base + SA1111_INTC;
352 ie1 = sa1111_readl(mapbase + SA1111_INTEN1);
353 ie1 |= SA1111_IRQMASK_HI(d->irq);
354 sa1111_writel(ie1, mapbase + SA1111_INTEN1);
358 * Attempt to re-trigger the interrupt. The SA1111 contains a register
359 * (INTSET) which claims to do this. However, in practice no amount of
360 * manipulation of INTEN and INTSET guarantees that the interrupt will
361 * be triggered. In fact, its very difficult, if not impossible to get
362 * INTSET to re-trigger the interrupt.
364 static int sa1111_retrigger_highirq(struct irq_data *d)
366 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
367 void __iomem *mapbase = sachip->base + SA1111_INTC;
368 unsigned int mask = SA1111_IRQMASK_HI(d->irq);
372 ip1 = sa1111_readl(mapbase + SA1111_INTPOL1);
373 for (i = 0; i < 8; i++) {
374 sa1111_writel(ip1 ^ mask, mapbase + SA1111_INTPOL1);
375 sa1111_writel(ip1, mapbase + SA1111_INTPOL1);
376 if (sa1111_readl(mapbase + SA1111_INTSTATCLR1) & mask)
381 printk(KERN_ERR "Danger Will Robinson: failed to "
382 "re-trigger IRQ%d\n", d->irq);
383 return i == 8 ? -1 : 0;
386 static int sa1111_type_highirq(struct irq_data *d, unsigned int flags)
388 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
389 void __iomem *mapbase = sachip->base + SA1111_INTC;
390 unsigned int mask = SA1111_IRQMASK_HI(d->irq);
393 if (flags == IRQ_TYPE_PROBE)
396 if ((!(flags & IRQ_TYPE_EDGE_RISING) ^ !(flags & IRQ_TYPE_EDGE_FALLING)) == 0)
399 ip1 = sa1111_readl(mapbase + SA1111_INTPOL1);
400 if (flags & IRQ_TYPE_EDGE_RISING)
404 sa1111_writel(ip1, mapbase + SA1111_INTPOL1);
405 sa1111_writel(ip1, mapbase + SA1111_WAKEPOL1);
410 static int sa1111_wake_highirq(struct irq_data *d, unsigned int on)
412 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
413 void __iomem *mapbase = sachip->base + SA1111_INTC;
414 unsigned int mask = SA1111_IRQMASK_HI(d->irq);
417 we1 = sa1111_readl(mapbase + SA1111_WAKEEN1);
422 sa1111_writel(we1, mapbase + SA1111_WAKEEN1);
427 static struct irq_chip sa1111_high_chip = {
429 .irq_ack = sa1111_ack_irq,
430 .irq_mask = sa1111_mask_highirq,
431 .irq_unmask = sa1111_unmask_highirq,
432 .irq_retrigger = sa1111_retrigger_highirq,
433 .irq_set_type = sa1111_type_highirq,
434 .irq_set_wake = sa1111_wake_highirq,
437 static void sa1111_setup_irq(struct sa1111 *sachip)
439 void __iomem *irqbase = sachip->base + SA1111_INTC;
443 * We're guaranteed that this region hasn't been taken.
445 request_mem_region(sachip->phys + SA1111_INTC, 512, "irq");
447 /* disable all IRQs */
448 sa1111_writel(0, irqbase + SA1111_INTEN0);
449 sa1111_writel(0, irqbase + SA1111_INTEN1);
450 sa1111_writel(0, irqbase + SA1111_WAKEEN0);
451 sa1111_writel(0, irqbase + SA1111_WAKEEN1);
454 * detect on rising edge. Note: Feb 2001 Errata for SA1111
455 * specifies that S0ReadyInt and S1ReadyInt should be '1'.
457 sa1111_writel(0, irqbase + SA1111_INTPOL0);
458 sa1111_writel(SA1111_IRQMASK_HI(IRQ_S0_READY_NINT) |
459 SA1111_IRQMASK_HI(IRQ_S1_READY_NINT),
460 irqbase + SA1111_INTPOL1);
463 sa1111_writel(~0, irqbase + SA1111_INTSTATCLR0);
464 sa1111_writel(~0, irqbase + SA1111_INTSTATCLR1);
466 for (irq = IRQ_GPAIN0; irq <= SSPROR; irq++) {
467 irq_set_chip_and_handler(irq, &sa1111_low_chip,
469 irq_set_chip_data(irq, sachip);
470 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
473 for (irq = AUDXMTDMADONEA; irq <= IRQ_S1_BVD1_STSCHG; irq++) {
474 irq_set_chip_and_handler(irq, &sa1111_high_chip,
476 irq_set_chip_data(irq, sachip);
477 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
481 * Register SA1111 interrupt
483 irq_set_irq_type(sachip->irq, IRQ_TYPE_EDGE_RISING);
484 irq_set_handler_data(sachip->irq, sachip);
485 irq_set_chained_handler(sachip->irq, sa1111_irq_handler);
489 * Bring the SA1111 out of reset. This requires a set procedure:
490 * 1. nRESET asserted (by hardware)
491 * 2. CLK turned on from SA1110
492 * 3. nRESET deasserted
493 * 4. VCO turned on, PLL_BYPASS turned off
494 * 5. Wait lock time, then assert RCLKEn
495 * 7. PCR set to allow clocking of individual functions
497 * Until we've done this, the only registers we can access are:
502 static void sa1111_wake(struct sa1111 *sachip)
504 unsigned long flags, r;
506 spin_lock_irqsave(&sachip->lock, flags);
508 clk_enable(sachip->clk);
511 * Turn VCO on, and disable PLL Bypass.
513 r = sa1111_readl(sachip->base + SA1111_SKCR);
515 sa1111_writel(r, sachip->base + SA1111_SKCR);
516 r |= SKCR_PLL_BYPASS | SKCR_OE_EN;
517 sa1111_writel(r, sachip->base + SA1111_SKCR);
520 * Wait lock time. SA1111 manual _doesn't_
521 * specify a figure for this! We choose 100us.
526 * Enable RCLK. We also ensure that RDYEN is set.
528 r |= SKCR_RCLKEN | SKCR_RDYEN;
529 sa1111_writel(r, sachip->base + SA1111_SKCR);
532 * Wait 14 RCLK cycles for the chip to finish coming out
533 * of reset. (RCLK=24MHz). This is 590ns.
538 * Ensure all clocks are initially off.
540 sa1111_writel(0, sachip->base + SA1111_SKPCR);
542 spin_unlock_irqrestore(&sachip->lock, flags);
545 #ifdef CONFIG_ARCH_SA1100
547 static u32 sa1111_dma_mask[] = {
559 * Configure the SA1111 shared memory controller.
562 sa1111_configure_smc(struct sa1111 *sachip, int sdram, unsigned int drac,
563 unsigned int cas_latency)
565 unsigned int smcr = SMCR_DTIM | SMCR_MBGE | FInsrt(drac, SMCR_DRAC);
567 if (cas_latency == 3)
570 sa1111_writel(smcr, sachip->base + SA1111_SMCR);
573 * Now clear the bits in the DMA mask to work around the SA1111
574 * DMA erratum (Intel StrongARM SA-1111 Microprocessor Companion
575 * Chip Specification Update, June 2000, Erratum #7).
577 if (sachip->dev->dma_mask)
578 *sachip->dev->dma_mask &= sa1111_dma_mask[drac >> 2];
580 sachip->dev->coherent_dma_mask &= sa1111_dma_mask[drac >> 2];
584 #ifdef CONFIG_DMABOUNCE
586 * According to the "Intel StrongARM SA-1111 Microprocessor Companion
587 * Chip Specification Update" (June 2000), erratum #7, there is a
588 * significant bug in the SA1111 SDRAM shared memory controller. If
589 * an access to a region of memory above 1MB relative to the bank base,
590 * it is important that address bit 10 _NOT_ be asserted. Depending
591 * on the configuration of the RAM, bit 10 may correspond to one
592 * of several different (processor-relative) address bits.
594 * This routine only identifies whether or not a given DMA address
595 * is susceptible to the bug.
597 * This should only get called for sa1111_device types due to the
598 * way we configure our device dma_masks.
600 static int sa1111_needs_bounce(struct device *dev, dma_addr_t addr, size_t size)
603 * Section 4.6 of the "Intel StrongARM SA-1111 Development Module
604 * User's Guide" mentions that jumpers R51 and R52 control the
605 * target of SA-1111 DMA (either SDRAM bank 0 on Assabet, or
606 * SDRAM bank 1 on Neponset). The default configuration selects
607 * Assabet, so any address in bank 1 is necessarily invalid.
609 return (machine_is_assabet() || machine_is_pfs168()) &&
610 (addr >= 0xc8000000 || (addr + size) >= 0xc8000000);
614 static void sa1111_dev_release(struct device *_dev)
616 struct sa1111_dev *dev = SA1111_DEV(_dev);
618 release_resource(&dev->res);
623 sa1111_init_one_child(struct sa1111 *sachip, struct resource *parent,
624 struct sa1111_dev_info *info)
626 struct sa1111_dev *dev;
629 dev = kzalloc(sizeof(struct sa1111_dev), GFP_KERNEL);
635 dev_set_name(&dev->dev, "%4.4lx", info->offset);
636 dev->devid = info->devid;
637 dev->dev.parent = sachip->dev;
638 dev->dev.bus = &sa1111_bus_type;
639 dev->dev.release = sa1111_dev_release;
640 dev->dev.coherent_dma_mask = sachip->dev->coherent_dma_mask;
641 dev->res.start = sachip->phys + info->offset;
642 dev->res.end = dev->res.start + 511;
643 dev->res.name = dev_name(&dev->dev);
644 dev->res.flags = IORESOURCE_MEM;
645 dev->mapbase = sachip->base + info->offset;
646 dev->skpcr_mask = info->skpcr_mask;
647 memmove(dev->irq, info->irq, sizeof(dev->irq));
649 ret = request_resource(parent, &dev->res);
651 printk("SA1111: failed to allocate resource for %s\n",
653 dev_set_name(&dev->dev, NULL);
659 ret = device_register(&dev->dev);
661 release_resource(&dev->res);
666 #ifdef CONFIG_DMABOUNCE
668 * If the parent device has a DMA mask associated with it,
669 * propagate it down to the children.
671 if (sachip->dev->dma_mask) {
672 dev->dma_mask = *sachip->dev->dma_mask;
673 dev->dev.dma_mask = &dev->dma_mask;
675 if (dev->dma_mask != 0xffffffffUL) {
676 ret = dmabounce_register_dev(&dev->dev, 1024, 4096,
677 sa1111_needs_bounce);
679 dev_err(&dev->dev, "SA1111: Failed to register"
680 " with dmabounce\n");
681 device_unregister(&dev->dev);
692 * sa1111_probe - probe for a single SA1111 chip.
693 * @phys_addr: physical address of device.
695 * Probe for a SA1111 chip. This must be called
696 * before any other SA1111-specific code.
699 * %-ENODEV device not found.
700 * %-EBUSY physical address already marked in-use.
704 __sa1111_probe(struct device *me, struct resource *mem, int irq)
706 struct sa1111 *sachip;
708 unsigned int has_devs;
709 int i, ret = -ENODEV;
711 sachip = kzalloc(sizeof(struct sa1111), GFP_KERNEL);
715 sachip->clk = clk_get(me, "SA1111_CLK");
716 if (IS_ERR(sachip->clk)) {
717 ret = PTR_ERR(sachip->clk);
721 spin_lock_init(&sachip->lock);
724 dev_set_drvdata(sachip->dev, sachip);
726 sachip->phys = mem->start;
730 * Map the whole region. This also maps the
731 * registers for our children.
733 sachip->base = ioremap(mem->start, PAGE_SIZE * 2);
740 * Probe for the chip. Only touch the SBI registers.
742 id = sa1111_readl(sachip->base + SA1111_SKID);
743 if ((id & SKID_ID_MASK) != SKID_SA1111_ID) {
744 printk(KERN_DEBUG "SA1111 not detected: ID = %08lx\n", id);
749 printk(KERN_INFO "SA1111 Microprocessor Companion Chip: "
750 "silicon revision %lx, metal revision %lx\n",
751 (id & SKID_SIREV_MASK)>>4, (id & SKID_MTREV_MASK));
754 * We found it. Wake the chip up, and initialise.
758 #ifdef CONFIG_ARCH_SA1100
763 * The SDRAM configuration of the SA1110 and the SA1111 must
764 * match. This is very important to ensure that SA1111 accesses
765 * don't corrupt the SDRAM. Note that this ungates the SA1111's
766 * MBGNT signal, so we must have called sa1110_mb_disable()
769 sa1111_configure_smc(sachip, 1,
770 FExtr(MDCNFG, MDCNFG_SA1110_DRAC0),
771 FExtr(MDCNFG, MDCNFG_SA1110_TDL0));
774 * We only need to turn on DCLK whenever we want to use the
775 * DMA. It can otherwise be held firmly in the off position.
776 * (currently, we always enable it.)
778 val = sa1111_readl(sachip->base + SA1111_SKPCR);
779 sa1111_writel(val | SKPCR_DCLKEN, sachip->base + SA1111_SKPCR);
782 * Enable the SA1110 memory bus request and grant signals.
789 * The interrupt controller must be initialised before any
790 * other device to ensure that the interrupts are available.
792 if (sachip->irq != NO_IRQ)
793 sa1111_setup_irq(sachip);
798 if (machine_is_assabet() || machine_is_jornada720() ||
800 has_devs &= ~(1 << 4);
802 has_devs &= ~(1 << 1);
804 for (i = 0; i < ARRAY_SIZE(sa1111_devices); i++)
805 if (has_devs & (1 << i))
806 sa1111_init_one_child(sachip, mem, &sa1111_devices[i]);
811 iounmap(sachip->base);
813 clk_put(sachip->clk);
819 static int sa1111_remove_one(struct device *dev, void *data)
821 device_unregister(dev);
825 static void __sa1111_remove(struct sa1111 *sachip)
827 void __iomem *irqbase = sachip->base + SA1111_INTC;
829 device_for_each_child(sachip->dev, NULL, sa1111_remove_one);
831 /* disable all IRQs */
832 sa1111_writel(0, irqbase + SA1111_INTEN0);
833 sa1111_writel(0, irqbase + SA1111_INTEN1);
834 sa1111_writel(0, irqbase + SA1111_WAKEEN0);
835 sa1111_writel(0, irqbase + SA1111_WAKEEN1);
837 clk_disable(sachip->clk);
839 if (sachip->irq != NO_IRQ) {
840 irq_set_chained_handler(sachip->irq, NULL);
841 irq_set_handler_data(sachip->irq, NULL);
843 release_mem_region(sachip->phys + SA1111_INTC, 512);
846 iounmap(sachip->base);
847 clk_put(sachip->clk);
851 struct sa1111_save_data {
856 unsigned char skpwm0;
857 unsigned char skpwm1;
860 * Interrupt controller
862 unsigned int intpol0;
863 unsigned int intpol1;
866 unsigned int wakepol0;
867 unsigned int wakepol1;
868 unsigned int wakeen0;
869 unsigned int wakeen1;
874 static int sa1111_suspend(struct platform_device *dev, pm_message_t state)
876 struct sa1111 *sachip = platform_get_drvdata(dev);
877 struct sa1111_save_data *save;
882 save = kmalloc(sizeof(struct sa1111_save_data), GFP_KERNEL);
885 sachip->saved_state = save;
887 spin_lock_irqsave(&sachip->lock, flags);
893 save->skcr = sa1111_readl(base + SA1111_SKCR);
894 save->skpcr = sa1111_readl(base + SA1111_SKPCR);
895 save->skcdr = sa1111_readl(base + SA1111_SKCDR);
896 save->skaud = sa1111_readl(base + SA1111_SKAUD);
897 save->skpwm0 = sa1111_readl(base + SA1111_SKPWM0);
898 save->skpwm1 = sa1111_readl(base + SA1111_SKPWM1);
900 base = sachip->base + SA1111_INTC;
901 save->intpol0 = sa1111_readl(base + SA1111_INTPOL0);
902 save->intpol1 = sa1111_readl(base + SA1111_INTPOL1);
903 save->inten0 = sa1111_readl(base + SA1111_INTEN0);
904 save->inten1 = sa1111_readl(base + SA1111_INTEN1);
905 save->wakepol0 = sa1111_readl(base + SA1111_WAKEPOL0);
906 save->wakepol1 = sa1111_readl(base + SA1111_WAKEPOL1);
907 save->wakeen0 = sa1111_readl(base + SA1111_WAKEEN0);
908 save->wakeen1 = sa1111_readl(base + SA1111_WAKEEN1);
913 val = sa1111_readl(sachip->base + SA1111_SKCR);
914 sa1111_writel(val | SKCR_SLEEP, sachip->base + SA1111_SKCR);
915 sa1111_writel(0, sachip->base + SA1111_SKPWM0);
916 sa1111_writel(0, sachip->base + SA1111_SKPWM1);
918 clk_disable(sachip->clk);
920 spin_unlock_irqrestore(&sachip->lock, flags);
926 * sa1111_resume - Restore the SA1111 device state.
927 * @dev: device to restore
929 * Restore the general state of the SA1111; clock control and
930 * interrupt controller. Other parts of the SA1111 must be
931 * restored by their respective drivers, and must be called
932 * via LDM after this function.
934 static int sa1111_resume(struct platform_device *dev)
936 struct sa1111 *sachip = platform_get_drvdata(dev);
937 struct sa1111_save_data *save;
938 unsigned long flags, id;
941 save = sachip->saved_state;
946 * Ensure that the SA1111 is still here.
947 * FIXME: shouldn't do this here.
949 id = sa1111_readl(sachip->base + SA1111_SKID);
950 if ((id & SKID_ID_MASK) != SKID_SA1111_ID) {
951 __sa1111_remove(sachip);
952 platform_set_drvdata(dev, NULL);
958 * First of all, wake up the chip.
963 * Only lock for write ops. Also, sa1111_wake must be called with
966 spin_lock_irqsave(&sachip->lock, flags);
968 sa1111_writel(0, sachip->base + SA1111_INTC + SA1111_INTEN0);
969 sa1111_writel(0, sachip->base + SA1111_INTC + SA1111_INTEN1);
972 sa1111_writel(save->skcr, base + SA1111_SKCR);
973 sa1111_writel(save->skpcr, base + SA1111_SKPCR);
974 sa1111_writel(save->skcdr, base + SA1111_SKCDR);
975 sa1111_writel(save->skaud, base + SA1111_SKAUD);
976 sa1111_writel(save->skpwm0, base + SA1111_SKPWM0);
977 sa1111_writel(save->skpwm1, base + SA1111_SKPWM1);
979 base = sachip->base + SA1111_INTC;
980 sa1111_writel(save->intpol0, base + SA1111_INTPOL0);
981 sa1111_writel(save->intpol1, base + SA1111_INTPOL1);
982 sa1111_writel(save->inten0, base + SA1111_INTEN0);
983 sa1111_writel(save->inten1, base + SA1111_INTEN1);
984 sa1111_writel(save->wakepol0, base + SA1111_WAKEPOL0);
985 sa1111_writel(save->wakepol1, base + SA1111_WAKEPOL1);
986 sa1111_writel(save->wakeen0, base + SA1111_WAKEEN0);
987 sa1111_writel(save->wakeen1, base + SA1111_WAKEEN1);
989 spin_unlock_irqrestore(&sachip->lock, flags);
991 sachip->saved_state = NULL;
998 #define sa1111_suspend NULL
999 #define sa1111_resume NULL
1002 static int __devinit sa1111_probe(struct platform_device *pdev)
1004 struct resource *mem;
1007 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1010 irq = platform_get_irq(pdev, 0);
1014 return __sa1111_probe(&pdev->dev, mem, irq);
1017 static int sa1111_remove(struct platform_device *pdev)
1019 struct sa1111 *sachip = platform_get_drvdata(pdev);
1023 kfree(sachip->saved_state);
1024 sachip->saved_state = NULL;
1026 __sa1111_remove(sachip);
1027 platform_set_drvdata(pdev, NULL);
1034 * Not sure if this should be on the system bus or not yet.
1035 * We really want some way to register a system device at
1036 * the per-machine level, and then have this driver pick
1037 * up the registered devices.
1039 * We also need to handle the SDRAM configuration for
1040 * PXA250/SA1110 machine classes.
1042 static struct platform_driver sa1111_device_driver = {
1043 .probe = sa1111_probe,
1044 .remove = sa1111_remove,
1045 .suspend = sa1111_suspend,
1046 .resume = sa1111_resume,
1053 * Get the parent device driver (us) structure
1054 * from a child function device
1056 static inline struct sa1111 *sa1111_chip_driver(struct sa1111_dev *sadev)
1058 return (struct sa1111 *)dev_get_drvdata(sadev->dev.parent);
1062 * The bits in the opdiv field are non-linear.
1064 static unsigned char opdiv_table[] = { 1, 4, 2, 8 };
1066 static unsigned int __sa1111_pll_clock(struct sa1111 *sachip)
1068 unsigned int skcdr, fbdiv, ipdiv, opdiv;
1070 skcdr = sa1111_readl(sachip->base + SA1111_SKCDR);
1072 fbdiv = (skcdr & 0x007f) + 2;
1073 ipdiv = ((skcdr & 0x0f80) >> 7) + 2;
1074 opdiv = opdiv_table[(skcdr & 0x3000) >> 12];
1076 return 3686400 * fbdiv / (ipdiv * opdiv);
1080 * sa1111_pll_clock - return the current PLL clock frequency.
1081 * @sadev: SA1111 function block
1083 * BUG: we should look at SKCR. We also blindly believe that
1084 * the chip is being fed with the 3.6864MHz clock.
1086 * Returns the PLL clock in Hz.
1088 unsigned int sa1111_pll_clock(struct sa1111_dev *sadev)
1090 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1092 return __sa1111_pll_clock(sachip);
1094 EXPORT_SYMBOL(sa1111_pll_clock);
1097 * sa1111_select_audio_mode - select I2S or AC link mode
1098 * @sadev: SA1111 function block
1099 * @mode: One of %SA1111_AUDIO_ACLINK or %SA1111_AUDIO_I2S
1101 * Frob the SKCR to select AC Link mode or I2S mode for
1104 void sa1111_select_audio_mode(struct sa1111_dev *sadev, int mode)
1106 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1107 unsigned long flags;
1110 spin_lock_irqsave(&sachip->lock, flags);
1112 val = sa1111_readl(sachip->base + SA1111_SKCR);
1113 if (mode == SA1111_AUDIO_I2S) {
1118 sa1111_writel(val, sachip->base + SA1111_SKCR);
1120 spin_unlock_irqrestore(&sachip->lock, flags);
1122 EXPORT_SYMBOL(sa1111_select_audio_mode);
1125 * sa1111_set_audio_rate - set the audio sample rate
1126 * @sadev: SA1111 SAC function block
1127 * @rate: sample rate to select
1129 int sa1111_set_audio_rate(struct sa1111_dev *sadev, int rate)
1131 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1134 if (sadev->devid != SA1111_DEVID_SAC)
1137 div = (__sa1111_pll_clock(sachip) / 256 + rate / 2) / rate;
1143 sa1111_writel(div - 1, sachip->base + SA1111_SKAUD);
1147 EXPORT_SYMBOL(sa1111_set_audio_rate);
1150 * sa1111_get_audio_rate - get the audio sample rate
1151 * @sadev: SA1111 SAC function block device
1153 int sa1111_get_audio_rate(struct sa1111_dev *sadev)
1155 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1158 if (sadev->devid != SA1111_DEVID_SAC)
1161 div = sa1111_readl(sachip->base + SA1111_SKAUD) + 1;
1163 return __sa1111_pll_clock(sachip) / (256 * div);
1165 EXPORT_SYMBOL(sa1111_get_audio_rate);
1167 void sa1111_set_io_dir(struct sa1111_dev *sadev,
1168 unsigned int bits, unsigned int dir,
1169 unsigned int sleep_dir)
1171 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1172 unsigned long flags;
1174 void __iomem *gpio = sachip->base + SA1111_GPIO;
1176 #define MODIFY_BITS(port, mask, dir) \
1178 val = sa1111_readl(port); \
1180 val |= (dir) & (mask); \
1181 sa1111_writel(val, port); \
1184 spin_lock_irqsave(&sachip->lock, flags);
1185 MODIFY_BITS(gpio + SA1111_GPIO_PADDR, bits & 15, dir);
1186 MODIFY_BITS(gpio + SA1111_GPIO_PBDDR, (bits >> 8) & 255, dir >> 8);
1187 MODIFY_BITS(gpio + SA1111_GPIO_PCDDR, (bits >> 16) & 255, dir >> 16);
1189 MODIFY_BITS(gpio + SA1111_GPIO_PASDR, bits & 15, sleep_dir);
1190 MODIFY_BITS(gpio + SA1111_GPIO_PBSDR, (bits >> 8) & 255, sleep_dir >> 8);
1191 MODIFY_BITS(gpio + SA1111_GPIO_PCSDR, (bits >> 16) & 255, sleep_dir >> 16);
1192 spin_unlock_irqrestore(&sachip->lock, flags);
1194 EXPORT_SYMBOL(sa1111_set_io_dir);
1196 void sa1111_set_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v)
1198 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1199 unsigned long flags;
1201 void __iomem *gpio = sachip->base + SA1111_GPIO;
1203 spin_lock_irqsave(&sachip->lock, flags);
1204 MODIFY_BITS(gpio + SA1111_GPIO_PADWR, bits & 15, v);
1205 MODIFY_BITS(gpio + SA1111_GPIO_PBDWR, (bits >> 8) & 255, v >> 8);
1206 MODIFY_BITS(gpio + SA1111_GPIO_PCDWR, (bits >> 16) & 255, v >> 16);
1207 spin_unlock_irqrestore(&sachip->lock, flags);
1209 EXPORT_SYMBOL(sa1111_set_io);
1211 void sa1111_set_sleep_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v)
1213 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1214 unsigned long flags;
1216 void __iomem *gpio = sachip->base + SA1111_GPIO;
1218 spin_lock_irqsave(&sachip->lock, flags);
1219 MODIFY_BITS(gpio + SA1111_GPIO_PASSR, bits & 15, v);
1220 MODIFY_BITS(gpio + SA1111_GPIO_PBSSR, (bits >> 8) & 255, v >> 8);
1221 MODIFY_BITS(gpio + SA1111_GPIO_PCSSR, (bits >> 16) & 255, v >> 16);
1222 spin_unlock_irqrestore(&sachip->lock, flags);
1224 EXPORT_SYMBOL(sa1111_set_sleep_io);
1227 * Individual device operations.
1231 * sa1111_enable_device - enable an on-chip SA1111 function block
1232 * @sadev: SA1111 function block device to enable
1234 void sa1111_enable_device(struct sa1111_dev *sadev)
1236 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1237 unsigned long flags;
1240 spin_lock_irqsave(&sachip->lock, flags);
1241 val = sa1111_readl(sachip->base + SA1111_SKPCR);
1242 sa1111_writel(val | sadev->skpcr_mask, sachip->base + SA1111_SKPCR);
1243 spin_unlock_irqrestore(&sachip->lock, flags);
1245 EXPORT_SYMBOL(sa1111_enable_device);
1248 * sa1111_disable_device - disable an on-chip SA1111 function block
1249 * @sadev: SA1111 function block device to disable
1251 void sa1111_disable_device(struct sa1111_dev *sadev)
1253 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1254 unsigned long flags;
1257 spin_lock_irqsave(&sachip->lock, flags);
1258 val = sa1111_readl(sachip->base + SA1111_SKPCR);
1259 sa1111_writel(val & ~sadev->skpcr_mask, sachip->base + SA1111_SKPCR);
1260 spin_unlock_irqrestore(&sachip->lock, flags);
1262 EXPORT_SYMBOL(sa1111_disable_device);
1265 * SA1111 "Register Access Bus."
1267 * We model this as a regular bus type, and hang devices directly
1270 static int sa1111_match(struct device *_dev, struct device_driver *_drv)
1272 struct sa1111_dev *dev = SA1111_DEV(_dev);
1273 struct sa1111_driver *drv = SA1111_DRV(_drv);
1275 return dev->devid == drv->devid;
1278 static int sa1111_bus_suspend(struct device *dev, pm_message_t state)
1280 struct sa1111_dev *sadev = SA1111_DEV(dev);
1281 struct sa1111_driver *drv = SA1111_DRV(dev->driver);
1284 if (drv && drv->suspend)
1285 ret = drv->suspend(sadev, state);
1289 static int sa1111_bus_resume(struct device *dev)
1291 struct sa1111_dev *sadev = SA1111_DEV(dev);
1292 struct sa1111_driver *drv = SA1111_DRV(dev->driver);
1295 if (drv && drv->resume)
1296 ret = drv->resume(sadev);
1300 static int sa1111_bus_probe(struct device *dev)
1302 struct sa1111_dev *sadev = SA1111_DEV(dev);
1303 struct sa1111_driver *drv = SA1111_DRV(dev->driver);
1307 ret = drv->probe(sadev);
1311 static int sa1111_bus_remove(struct device *dev)
1313 struct sa1111_dev *sadev = SA1111_DEV(dev);
1314 struct sa1111_driver *drv = SA1111_DRV(dev->driver);
1318 ret = drv->remove(sadev);
1322 struct bus_type sa1111_bus_type = {
1323 .name = "sa1111-rab",
1324 .match = sa1111_match,
1325 .probe = sa1111_bus_probe,
1326 .remove = sa1111_bus_remove,
1327 .suspend = sa1111_bus_suspend,
1328 .resume = sa1111_bus_resume,
1330 EXPORT_SYMBOL(sa1111_bus_type);
1332 int sa1111_driver_register(struct sa1111_driver *driver)
1334 driver->drv.bus = &sa1111_bus_type;
1335 return driver_register(&driver->drv);
1337 EXPORT_SYMBOL(sa1111_driver_register);
1339 void sa1111_driver_unregister(struct sa1111_driver *driver)
1341 driver_unregister(&driver->drv);
1343 EXPORT_SYMBOL(sa1111_driver_unregister);
1345 static int __init sa1111_init(void)
1347 int ret = bus_register(&sa1111_bus_type);
1349 platform_driver_register(&sa1111_device_driver);
1353 static void __exit sa1111_exit(void)
1355 platform_driver_unregister(&sa1111_device_driver);
1356 bus_unregister(&sa1111_bus_type);
1359 subsys_initcall(sa1111_init);
1360 module_exit(sa1111_exit);
1362 MODULE_DESCRIPTION("Intel Corporation SA1111 core driver");
1363 MODULE_LICENSE("GPL");