arch/arm/boot/dts/atlas7.dtsi

   1 /*
   2  * DTS file for CSR SiRFatlas7 SoC
   3  *
   4  * Copyright (c) 2014 Cambridge Silicon Radio Limited, a CSR plc group company.
   5  *
   6  * Licensed under GPLv2 or later.
   7  */
   8
   9 /include/ "skeleton.dtsi"
  10 / {
  11         compatible = "sirf,atlas7";
  12         #address-cells = <1>;
  13         #size-cells = <1>;
  14         interrupt-parent = <&gic>;
  15         aliases {
  16                 serial0 = &uart0;
  17                 serial1 = &uart1;
  18                 serial2 = &uart2;
  19                 serial3 = &uart3;
  20                 serial4 = &uart4;
  21                 serial5 = &uart5;
  22                 serial6 = &uart6;
  23                 serial9 = &usp2;
  24         };
  25         cpus {
  26                 #address-cells = <1>;
  27                 #size-cells = <0>;
  28
  29                 cpu@0 {
  30                         device_type = "cpu";
  31                         compatible = "arm,cortex-a7";
  32                         reg = <0>;
  33                 };
  34                 cpu@1 {
  35                         device_type = "cpu";
  36                         compatible = "arm,cortex-a7";
  37                         reg = <1>;
  38                 };
  39         };
  40
  41         noc {
  42                 compatible = "simple-bus";
  43                 #address-cells = <1>;
  44                 #size-cells = <1>;
  45                 ranges = <0x10000000 0x10000000 0xc0000000>;
  46
  47                 gic: interrupt-controller@10301000 {
  48                         compatible = "arm,cortex-a9-gic";
  49                         interrupt-controller;
  50                         #interrupt-cells = <3>;
  51                         reg = <0x10301000 0x1000>,
  52                              <0x10302000 0x0100>;
  53                 };
  54
  55                 pmu_regulator: pmu_regulator@10E30020 {
  56                         compatible = "sirf,atlas7-pmu-ldo";
  57                         reg = <0x10E30020 0x4>;
  58                         ldo: ldo {
  59                                 regulator-name = "ldo";
  60                         };
  61                 };
  62
  63                 atlas7_codec: atlas7_codec@10E30000 {
  64                         #sound-dai-cells = <0>;
  65                         compatible = "sirf,atlas7-codec";
  66                         reg = <0x10E30000 0x400>;
  67                         clocks = <&car 62>;
  68                         ldo-supply = <&ldo>;
  69                 };
  70
  71                 atlas7_iacc: atlas7_iacc@10D01000 {
  72                         #sound-dai-cells = <0>;
  73                         compatible = "sirf,atlas7-iacc";
  74                         reg = <0x10D01000 0x100>;
  75                         dmas = <&dmac3 0>, <&dmac3 7>, <&dmac3 8>,
  76                                 <&dmac3 3>, <&dmac3 9>;
  77                         dma-names = "rx", "tx0", "tx1", "tx2", "tx3";
  78                         clocks = <&car 62>;
  79                 };
  80
  81                 ipc@13240000 {
  82                         compatible = "sirf,atlas7-ipc";
  83                         ranges = <0x13240000 0x13240000 0x00010000>;
  84                         #address-cells = <1>;
  85                         #size-cells = <1>;
  86
  87                         hwspinlock {
  88                                 compatible = "sirf,hwspinlock";
  89                                 reg = <0x13240000 0x00010000>;
  90
  91                                 num-spinlocks = <30>;
  92                         };
  93
  94                         ns_m3_rproc@0 {
  95                                 compatible = "sirf,ns2m30-rproc";
  96                                 reg = <0x13240000 0x00010000>;
  97                                 interrupts = <0 123 0>;
  98                         };
  99
 100                         ns_m3_rproc@1 {
 101                                 compatible = "sirf,ns2m31-rproc";
 102                                 reg = <0x13240000 0x00010000>;
 103                                 interrupts = <0 126 0>;
 104                         };
 105
 106                         ns_kal_rproc@0 {
 107                                 compatible = "sirf,ns2kal0-rproc";
 108                                 reg = <0x13240000 0x00010000>;
 109                                 interrupts = <0 124 0>;
 110                         };
 111
 112                         ns_kal_rproc@1 {
 113                                 compatible = "sirf,ns2kal1-rproc";
 114                                 reg = <0x13240000 0x00010000>;
 115                                 interrupts = <0 127 0>;
 116                         };
 117                 };
 118
 119                 pinctrl: ioc@18880000 {
 120                         compatible = "sirf,atlas7-ioc";
 121                         reg = <0x18880000 0x1000>,
 122                                 <0x10E40000 0x1000>;
 123                 };
 124
 125                 pmipc {
 126                         compatible = "arteris, flexnoc", "simple-bus";
 127                         #address-cells = <1>;
 128                         #size-cells = <1>;
 129                         ranges = <0x13240000 0x13240000 0x00010000>;
 130                         pmipc@0x13240000 {
 131                                 compatible = "sirf,atlas7-pmipc";
 132                                 reg = <0x13240000 0x00010000>;
 133                         };
 134                 };
 135
 136                 dramfw {
 137                         compatible = "arteris, flexnoc", "simple-bus";
 138                         #address-cells = <1>;
 139                         #size-cells = <1>;
 140                         ranges = <0x10830000 0x10830000 0x18000>;
 141                         dramfw@10820000 {
 142                                 compatible = "sirf,nocfw-dramfw";
 143                                 reg = <0x10830000 0x18000>;
 144                         };
 145                 };
 146
 147                 spramfw {
 148                         compatible = "arteris, flexnoc", "simple-bus";
 149                         #address-cells = <1>;
 150                         #size-cells = <1>;
 151                         ranges = <0x10250000 0x10250000 0x3000>;
 152                         spramfw@10820000 {
 153                                 compatible = "sirf,nocfw-spramfw";
 154                                 reg = <0x10250000 0x3000>;
 155                         };
 156                 };
 157
 158                 cpum {
 159                         compatible = "arteris, flexnoc", "simple-bus";
 160                         #address-cells = <1>;
 161                         #size-cells = <1>;
 162                         ranges = <0x10200000 0x10200000 0x3000>;
 163                         cpum@10200000 {
 164                                 compatible = "sirf,nocfw-cpum";
 165                                 reg = <0x10200000 0x3000>;
 166                         };
 167                 };
 168
 169                 cgum {
 170                         compatible = "arteris, flexnoc", "simple-bus";
 171                         #address-cells = <1>;
 172                         #size-cells = <1>;
 173                         ranges = <0x18641000 0x18641000 0x3000>,
 174                                          <0x18620000 0x18620000 0x1000>;
 175
 176                         cgum@18641000 {
 177                                 compatible = "sirf,nocfw-cgum";
 178                                 reg = <0x18641000 0x3000>;
 179                         };
 180
 181                         car: clock-controller@18620000 {
 182                                 compatible = "sirf,atlas7-car";
 183                                 reg = <0x18620000 0x1000>;
 184                                 #clock-cells = <1>;
 185                                 #reset-cells = <1>;
 186                         };
 187                 };
 188
 189                 gnssm {
 190                         compatible = "arteris, flexnoc", "simple-bus";
 191                         #address-cells = <1>;
 192                         #size-cells = <1>;
 193                         ranges = <0x18000000 0x18000000 0x0000ffff>,
 194                                 <0x18010000 0x18010000 0x1000>,
 195                                 <0x18020000 0x18020000 0x1000>,
 196                                 <0x18030000 0x18030000 0x1000>,
 197                                 <0x18040000 0x18040000 0x1000>,
 198                                 <0x18050000 0x18050000 0x1000>,
 199                                 <0x18060000 0x18060000 0x1000>,
 200                                 <0x18100000 0x18100000 0x3000>,
 201                                 <0x18250000 0x18250000 0x10000>,
 202                                 <0x18200000 0x18200000 0x1000>;
 203
 204                         dmac0: dma-controller@18000000 {
 205                                 cell-index = <0>;
 206                                 compatible = "sirf,atlas7-dmac";
 207                                 reg = <0x18000000 0x1000>;
 208                                 interrupts = <0 12 0>;
 209                                 clocks = <&car 89>;
 210                                 dma-channels = <16>;
 211                                 #dma-cells = <1>;
 212                         };
 213
 214                         gnssmfw@0x18100000 {
 215                                 compatible = "sirf,nocfw-gnssm";
 216                                 reg = <0x18100000 0x3000>;
 217                         };
 218
 219                         uart0: uart@18010000 {
 220                                 cell-index = <0>;
 221                                 compatible = "sirf,atlas7-uart";
 222                                 reg = <0x18010000 0x1000>;
 223                                 interrupts = <0 17 0>;
 224                                 clocks = <&car 90>;
 225                                 fifosize = <128>;
 226                                 dmas = <&dmac0 3>, <&dmac0 2>;
 227                                 dma-names = "rx", "tx";
 228                         };
 229
 230                         uart1: uart@18020000 {
 231                                 cell-index = <1>;
 232                                 compatible = "sirf,atlas7-uart";
 233                                 reg = <0x18020000 0x1000>;
 234                                 interrupts = <0 18 0>;
 235                                 clocks = <&car 88>;
 236                                 fifosize = <32>;
 237                         };
 238
 239                         uart2: uart@18030000 {
 240                                 cell-index = <2>;
 241                                 compatible = "sirf,atlas7-uart";
 242                                 reg = <0x18030000 0x1000>;
 243                                 interrupts = <0 19 0>;
 244                                 clocks = <&car 91>;
 245                                 fifosize = <128>;
 246                                 dmas = <&dmac0 6>, <&dmac0 7>;
 247                                 dma-names = "rx", "tx";
 248                                 status = "disabled";
 249                         };
 250                         uart3: uart@18040000 {
 251                                 cell-index = <3>;
 252                                 compatible = "sirf,atlas7-uart";
 253                                 reg = <0x18040000 0x1000>;
 254                                 interrupts = <0 66 0>;
 255                                 clocks = <&car 92>;
 256                                 fifosize = <128>;
 257                                 dmas = <&dmac0 4>, <&dmac0 5>;
 258                                 dma-names = "rx", "tx";
 259                                 status = "disabled";
 260                         };
 261                         uart4: uart@18050000 {
 262                                 cell-index = <4>;
 263                                 compatible = "sirf,atlas7-uart";
 264                                 reg = <0x18050000 0x1000>;
 265                                 interrupts = <0 69 0>;
 266                                 clocks = <&car 93>;
 267                                 fifosize = <128>;
 268                                 dmas = <&dmac0 0>, <&dmac0 1>;
 269                                 dma-names = "rx", "tx";
 270                                 status = "disabled";
 271                         };
 272                         uart5: uart@18060000 {
 273                                 cell-index = <5>;
 274                                 compatible = "sirf,atlas7-uart";
 275                                 reg = <0x18060000 0x1000>;
 276                                 interrupts = <0 71 0>;
 277                                 clocks = <&car 94>;
 278                                 fifosize = <128>;
 279                                 dmas = <&dmac0 8>, <&dmac0 9>;
 280                                 dma-names = "rx", "tx";
 281                                 status = "disabled";
 282                         };
 283                         dspub@18250000 {
 284                                 compatible = "dx,cc44p";
 285                                 reg = <0x18250000 0x10000>;
 286                                 interrupts = <0 27 0>;
 287                         };
 288
 289                         spi1: spi@18200000 {
 290                                 compatible = "sirf,prima2-spi";
 291                                 reg = <0x18200000 0x1000>;
 292                                 interrupts = <0 16 0>;
 293                                 clocks = <&car 95>;
 294                                 #address-cells = <1>;
 295                                 #size-cells = <0>;
 296                                 dmas = <&dmac0 12>, <&dmac0 13>;
 297                                 dma-names = "rx", "tx";
 298                                 status = "disabled";
 299                         };
 300                 };
 301
 302
 303                 gpum {
 304                         compatible = "arteris, flexnoc", "simple-bus";
 305                         #address-cells = <1>;
 306                         #size-cells = <1>;
 307                         ranges = <0x13000000 0x13000000 0x3000>;
 308                         gpum@0x13000000 {
 309                                 compatible = "sirf,nocfw-gpum";
 310                                 reg = <0x13000000 0x3000>;
 311                         };
 312                 };
 313
 314                 mediam {
 315                         compatible = "arteris, flexnoc", "simple-bus";
 316                         #address-cells = <1>;
 317                         #size-cells = <1>;
 318                         ranges = <0x16000000 0x16000000 0x00200000>,
 319                                 <0x17020000 0x17020000 0x1000>,
 320                                 <0x17030000 0x17030000 0x1000>,
 321                                 <0x17040000 0x17040000 0x1000>,
 322                                 <0x17050000 0x17050000 0x10000>,
 323                                 <0x17060000 0x17060000 0x200>,
 324                                 <0x17060200 0x17060200 0x100>,
 325                                 <0x17070000 0x17070000 0x200>,
 326                                 <0x17070200 0x17070200 0x100>,
 327                                 <0x170A0000 0x170A0000 0x3000>;
 328
 329                         mediam@170A0000 {
 330                                 compatible = "sirf,nocfw-mediam";
 331                                 reg = <0x170A0000 0x3000>;
 332                         };
 333
 334                         gpio_0: gpio_mediam@17040000 {
 335                                 #gpio-cells = <2>;
 336                                 #interrupt-cells = <2>;
 337                                 compatible = "sirf,atlas7-gpio";
 338                                 reg = <0x17040000 0x1000>;
 339                                 interrupts = <0 13 0>, <0 14 0>;
 340                                 clocks = <&car 107>;
 341                                 clock-names = "gpio0_io";
 342                                 gpio-controller;
 343                                 interrupt-controller;
 344                         };
 345
 346                         nand@17050000 {
 347                                 compatible = "sirf,atlas7-nand";
 348                                 reg = <0x17050000 0x10000>;
 349                                 interrupts = <0 41 0>;
 350                                 clocks = <&car 108>, <&car 112>;
 351                                 clock-names = "nand_io", "nand_nand";
 352                         };
 353
 354                         sd0: sdhci@16000000 {
 355                                 cell-index = <0>;
 356                                 compatible = "sirf,atlas7-sdhc";
 357                                 reg = <0x16000000 0x100000>;
 358                                 interrupts = <0 38 0>;
 359                                 clocks = <&car 109>, <&car 111>;
 360                                 clock-names = "core", "iface";
 361                                 wp-inverted;
 362                                 non-removable;
 363                                 status = "disabled";
 364                                 bus-width = <8>;
 365                         };
 366
 367                         sd1: sdhci@16100000 {
 368                                 cell-index = <1>;
 369                                 compatible = "sirf,atlas7-sdhc";
 370                                 reg = <0x16100000 0x100000>;
 371                                 interrupts = <0 38 0>;
 372                                 clocks = <&car 109>, <&car 111>;
 373                                 clock-names = "core", "iface";
 374                                 non-removable;
 375                                 status = "disabled";
 376                                 bus-width = <8>;
 377                         };
 378
 379                         usb0: usb@17060000 {
 380                                 cell-index = <0>;
 381                                 compatible = "sirf,atlas7-usb";
 382                                 reg = <0x17060000 0x200>;
 383                                 interrupts = <0 10 0>;
 384                                 clocks = <&car 113>;
 385                                 sirf,usbphy = <&usbphy0>;
 386                                 phy_type = "utmi";
 387                                 dr_mode = "otg";
 388                                 maximum-speed = "high-speed";
 389                                 status = "okay";
 390                         };
 391
 392                         usb1: usb@17070000 {
 393                                 cell-index = <1>;
 394                                 compatible = "sirf,atlas7-usb";
 395                                 reg = <0x17070000 0x200>;
 396                                 interrupts = <0 11 0>;
 397                                 clocks = <&car 114>;
 398                                 sirf,usbphy = <&usbphy1>;
 399                                 phy_type = "utmi";
 400                                 dr_mode = "host";
 401                                 maximum-speed = "high-speed";
 402                                 status = "okay";
 403                         };
 404
 405                         usbphy0: usbphy@0 {
 406                                 compatible = "sirf,atlas7-usbphy";
 407                                 reg = <0x17060200 0x100>;
 408                                 clocks = <&car 115>;
 409                                 status = "okay";
 410                         };
 411
 412                         usbphy1: usbphy@1 {
 413                                 compatible = "sirf,atlas7-usbphy";
 414                                 reg = <0x17070200 0x100>;
 415                                 clocks = <&car 116>;
 416                                 status = "okay";
 417                         };
 418
 419                         i2c0: i2c@17020000 {
 420                                 cell-index = <0>;
 421                                 compatible = "sirf,prima2-i2c";
 422                                 reg = <0x17020000 0x1000>;
 423                                 interrupts = <0 24 0>;
 424                                 clocks = <&car 105>;
 425                                 #address-cells = <1>;
 426                                 #size-cells = <0>;
 427                         };
 428
 429                 };
 430
 431                 vdifm {
 432                         compatible = "arteris, flexnoc", "simple-bus";
 433                         #address-cells = <1>;
 434                         #size-cells = <1>;
 435                         ranges = <0x13290000 0x13290000 0x3000>,
 436                                 <0x13300000 0x13300000 0x1000>,
 437                                 <0x14200000 0x14200000 0x600000>;
 438
 439                         vdifm@13290000 {
 440                                 compatible = "sirf,nocfw-vdifm";
 441                                 reg = <0x13290000 0x3000>;
 442                         };
 443
 444                         gpio_1: gpio_vdifm@13300000 {
 445                                 #gpio-cells = <2>;
 446                                 #interrupt-cells = <2>;
 447                                 compatible = "sirf,atlas7-gpio";
 448                                 reg = <0x13300000 0x1000>;
 449                                 interrupts = <0 43 0>, <0 44 0>, <0 45 0>;
 450                                 clocks = <&car 84>;
 451                                 clock-names = "gpio1_io";
 452                                 gpio-controller;
 453                                 interrupt-controller;
 454                         };
 455
 456                         sd2: sdhci@14200000 {
 457                                 cell-index = <2>;
 458                                 compatible = "sirf,atlas7-sdhc";
 459                                 reg = <0x14200000 0x100000>;
 460                                 interrupts = <0 23 0>;
 461                                 clocks = <&car 70>, <&car 75>;
 462                                 clock-names = "core", "iface";
 463                                 status = "disabled";
 464                                 bus-width = <4>;
 465                                 sd-uhs-sdr50;
 466                                 vqmmc-supply = <&vqmmc>;
 467                                 vqmmc: vqmmc@2 {
 468                                         regulator-min-microvolt = <1650000>;
 469                                         regulator-max-microvolt = <1950000>;
 470                                         regulator-name = "vqmmc-ldo";
 471                                         regulator-type = "voltage";
 472                                         regulator-boot-on;
 473                                         regulator-allow-bypass;
 474                                 };
 475                         };
 476
 477                         sd3: sdhci@14300000 {
 478                                 cell-index = <3>;
 479                                 compatible = "sirf,atlas7-sdhc";
 480                                 reg = <0x14300000 0x100000>;
 481                                 interrupts = <0 23 0>;
 482                                 clocks = <&car 76>, <&car 81>;
 483                                 clock-names = "core", "iface";
 484                                 status = "disabled";
 485                                 bus-width = <4>;
 486                         };
 487
 488                         sd5: sdhci@14500000 {
 489                                 cell-index = <5>;
 490                                 compatible = "sirf,atlas7-sdhc";
 491                                 reg = <0x14500000 0x100000>;
 492                                 interrupts = <0 39 0>;
 493                                 clocks = <&car 71>, <&car 76>;
 494                                 clock-names = "core", "iface";
 495                                 status = "disabled";
 496                                 bus-width = <4>;
 497                                 loop-dma;
 498                         };
 499
 500                         sd6: sdhci@14600000 {
 501                                 cell-index = <6>;
 502                                 compatible = "sirf,atlas7-sdhc";
 503                                 reg = <0x14600000 0x100000>;
 504                                 interrupts = <0 98 0>;
 505                                 clocks = <&car 72>, <&car 77>;
 506                                 clock-names = "core", "iface";
 507                                 status = "disabled";
 508                                 bus-width = <4>;
 509                         };
 510
 511                         sd7: sdhci@14700000 {
 512                                 cell-index = <7>;
 513                                 compatible = "sirf,atlas7-sdhc";
 514                                 reg = <0x14700000 0x100000>;
 515                                 interrupts = <0 98 0>;
 516                                 clocks = <&car 72>, <&car 77>;
 517                                 clock-names = "core", "iface";
 518                                 status = "disabled";
 519                                 bus-width = <4>;
 520                         };
 521                 };
 522
 523                 audiom {
 524                         compatible = "arteris, flexnoc", "simple-bus";
 525                         #address-cells = <1>;
 526                         #size-cells = <1>;
 527                         ranges = <0x10d50000 0x10d50000 0x0000ffff>,
 528                                         <0x10d60000 0x10d60000 0x0000ffff>,
 529                                         <0x10d80000 0x10d80000 0x0000ffff>,
 530                                         <0x10d90000 0x10d90000 0x0000ffff>,
 531                                         <0x10ED0000 0x10ED0000 0x3000>,
 532                                         <0x10dc8000 0x10dc8000 0x1000>,
 533                                         <0x10dc0000 0x10dc0000 0x1000>,
 534                                         <0x10db0000 0x10db0000 0x4000>,
 535                                         <0x10d40000 0x10d40000 0x1000>,
 536                                         <0x10d30000 0x10d30000 0x1000>;
 537
 538                         timer@10dc0000 {
 539                                 compatible = "sirf,atlas7-tick";
 540                                 reg = <0x10dc0000 0x1000>;
 541                                 interrupts = <0 0 0>,
 542                                            <0 1 0>,
 543                                            <0 2 0>,
 544                                            <0 49 0>,
 545                                            <0 50 0>,
 546                                            <0 51 0>;
 547                                 clocks = <&car 47>;
 548                         };
 549
 550                         timerb@10dc8000 {
 551                                         compatible = "sirf,atlas7-tick";
 552                                         reg = <0x10dc8000 0x1000>;
 553                                         interrupts = <0 74 0>,
 554                                                            <0 75 0>,
 555                                                            <0 76 0>,
 556                                                            <0 77 0>,
 557                                                            <0 78 0>,
 558                                                            <0 79 0>;
 559                                         clocks = <&car 47>;
 560                         };
 561
 562                         vip0@10db0000 {
 563                                 compatible = "sirf,atlas7-vip0";
 564                                 reg = <0x10db0000 0x2000>;
 565                                 interrupts = <0 85 0>;
 566                                 sirf,vip_cma_size = <0xC00000>;
 567                         };
 568
 569                         cvd@10db2000 {
 570                                 compatible = "sirf,cvd";
 571                                 reg = <0x10db2000 0x2000>;
 572                                 clocks = <&car 46>;
 573                         };
 574
 575                         dmac2: dma-controller@10d50000 {
 576                                 cell-index = <2>;
 577                                 compatible = "sirf,atlas7-dmac";
 578                                 reg = <0x10d50000 0xffff>;
 579                                 interrupts = <0 55 0>;
 580                                 clocks = <&car 60>;
 581                                 dma-channels = <16>;
 582                                 #dma-cells = <1>;
 583                         };
 584
 585                         dmac3: dma-controller@10d60000 {
 586                                 cell-index = <3>;
 587                                 compatible = "sirf,atlas7-dmac";
 588                                 reg = <0x10d60000 0xffff>;
 589                                 interrupts = <0 56 0>;
 590                                 clocks = <&car 61>;
 591                                 dma-channels = <16>;
 592                                 #dma-cells = <1>;
 593                         };
 594
 595                         adc: adc@10d80000 {
 596                                 compatible = "sirf,atlas7-adc";
 597                                 reg = <0x10d80000 0xffff>;
 598                                 interrupts = <0 34 0>;
 599                                 clocks = <&car 49>;
 600                                 #io-channel-cells = <1>;
 601                         };
 602
 603                         pulsec@10d90000 {
 604                                 compatible = "sirf,prima2-pulsec";
 605                                 reg = <0x10d90000 0xffff>;
 606                                 interrupts = <0 42 0>;
 607                                 clocks = <&car 54>;
 608                         };
 609
 610                         audiom@10ED0000 {
 611                                 compatible = "sirf,nocfw-audiom";
 612                                 reg = <0x10ED0000 0x3000>;
 613                                 interrupts = <0 102 0>;
 614                         };
 615
 616                         usp1: usp@10d30000 {
 617                                 cell-index = <1>;
 618                                 reg = <0x10d30000 0x1000>;
 619                                 fifosize = <512>;
 620                                 clocks = <&car 58>;
 621                                 dmas = <&dmac2 6>, <&dmac2 7>;
 622                                 dma-names = "rx", "tx";
 623                         };
 624
 625                         usp2: usp@10d40000 {
 626                                 cell-index = <2>;
 627                                 reg = <0x10d40000 0x1000>;
 628                                 interrupts = <0 22 0>;
 629                                 clocks = <&car 59>;
 630                                 dmas = <&dmac2 12>, <&dmac2 13>;
 631                                 dma-names = "rx", "tx";
 632                                 #address-cells = <1>;
 633                                 #size-cells = <0>;
 634                                 status = "disabled";
 635                         };
 636                 };
 637
 638                 ddrm {
 639                         compatible = "arteris, flexnoc", "simple-bus";
 640                         #address-cells = <1>;
 641                         #size-cells = <1>;
 642                         ranges = <0x10820000 0x10820000 0x3000>,
 643                                         <0x10800000 0x10800000 0x2000>;
 644                         ddrm@10820000 {
 645                                 compatible = "sirf,nocfw-ddrm";
 646                                 reg = <0x10820000 0x3000>;
 647                                 interrupts = <0 105 0>;
 648                         };
 649
 650                         memory-controller@0x10800000 {
 651                                 compatible = "sirf,atlas7-memc";
 652                                 reg = <0x10800000 0x2000>;
 653                         };
 654
 655                 };
 656
 657                 btm {
 658                         compatible = "arteris, flexnoc", "simple-bus";
 659                         #address-cells = <1>;
 660                         #size-cells = <1>;
 661                         ranges = <0x11002000 0x11002000 0x0000ffff>,
 662                                <0x11010000 0x11010000 0x3000>,
 663                                <0x11000000 0x11000000 0x1000>,
 664                                <0x11001000 0x11001000 0x1000>;
 665
 666                         dmac4: dma-controller@11002000 {
 667                                 cell-index = <4>;
 668                                 compatible = "sirf,atlas7-dmac";
 669                                 reg = <0x11002000 0x1000>;
 670                                 interrupts = <0 99 0>;
 671                                 clocks = <&car 130>;
 672                                 dma-channels = <16>;
 673                                 #dma-cells = <1>;
 674                         };
 675                         uart6: uart@11000000 {
 676                                 cell-index = <6>;
 677                                 compatible = "sirf,atlas7-bt-uart",
 678                                                 "sirf,atlas7-uart";
 679                                 reg = <0x11000000 0x1000>;
 680                                 interrupts = <0 100 0>;
 681                                 clocks = <&car 131>, <&car 133>, <&car 134>;
 682                                 clock-names = "uart", "general", "noc";
 683                                 fifosize = <128>;
 684                                 dmas = <&dmac4 12>, <&dmac4 13>;
 685                                 dma-names = "rx", "tx";
 686                                 status = "disabled";
 687                         };
 688
 689                         usp3: usp@11001000 {
 690                                 compatible = "sirf,atlas7-bt-usp",
 691                                            "sirf,prima2-usp-pcm";
 692                                 cell-index = <3>;
 693                                 reg = <0x11001000 0x1000>;
 694                                 fifosize = <512>;
 695                                 clocks = <&car 132>, <&car 129>, <&car 133>,
 696                                         <&car 134>, <&car 135>;
 697                                 clock-names = "usp3_io", "a7ca_btss", "a7ca_io",
 698                                         "noc_btm_io", "thbtm_io";
 699                                 dmas = <&dmac4 0>, <&dmac4 1>;
 700                                 dma-names = "rx", "tx";
 701                         };
 702
 703                         btm@11010000 {
 704                                 compatible = "sirf,nocfw-btm";
 705                                 reg = <0x11010000 0x3000>;
 706                         };
 707                 };
 708
 709                 rtcm {
 710                         compatible = "arteris, flexnoc", "simple-bus";
 711                         #address-cells = <1>;
 712                         #size-cells = <1>;
 713                         ranges = <0x18810000 0x18810000 0x3000>,
 714                                 <0x18840000 0x18840000 0x1000>,
 715                                 <0x18890000 0x18890000 0x1000>,
 716                                 <0x188B0000 0x188B0000 0x10000>,
 717                                 <0x188D0000 0x188D0000 0x1000>;
 718                         rtcm@18810000 {
 719                                 compatible = "sirf,nocfw-rtcm";
 720                                 reg = <0x18810000 0x3000>;
 721                                 interrupts = <0 109 0>;
 722                         };
 723
 724                         gpio_2: gpio_rtcm@18890000 {
 725                                 #gpio-cells = <2>;
 726                                 #interrupt-cells = <2>;
 727                                 compatible = "sirf,atlas7-gpio";
 728                                 reg = <0x18890000 0x1000>;
 729                                 interrupts = <0 47 0>;
 730                                 gpio-controller;
 731                                 interrupt-controller;
 732                         };
 733
 734                         rtc-iobg@18840000 {
 735                                 compatible = "sirf,prima2-rtciobg",
 736                                         "sirf-prima2-rtciobg-bus",
 737                                         "simple-bus";
 738                                 #address-cells = <1>;
 739                                 #size-cells = <1>;
 740                                 reg = <0x18840000 0x1000>;
 741
 742                                 sysrtc@2000 {
 743                                         compatible = "sirf,prima2-sysrtc";
 744                                         reg = <0x2000 0x100>;
 745                                         interrupts = <0 52 0>;
 746                                 };
 747                                 pwrc@3000 {
 748                                         compatible = "sirf,atlas7-pwrc";
 749                                         reg = <0x3000 0x100>;
 750                                 };
 751                         };
 752
 753                         qspi: flash@188B0000 {
 754                                 cell-index = <0>;
 755                                 compatible = "sirf,atlas7-qspi-nor";
 756                                 reg = <0x188B0000 0x10000>;
 757                                 interrupts = <0 15 0>;
 758                                 #address-cells = <1>;
 759                                 #size-cells = <0>;
 760                         };
 761
 762                         retain@0x188D0000 {
 763                                 compatible = "sirf,atlas7-retain";
 764                                 reg = <0x188D0000 0x1000>;
 765                         };
 766
 767                 };
 768                 disp-iobg {
 769                         /* lcdc0 */
 770                         compatible = "simple-bus";
 771                         #address-cells = <1>;
 772                         #size-cells = <1>;
 773                         ranges = <0x13100000 0x13100000 0x20000>,
 774                                  <0x10e10000 0x10e10000 0x10000>;
 775
 776                         lcd@13100000 {
 777                                 compatible = "sirf,atlas7-lcdc";
 778                                 reg = <0x13100000 0x10000>;
 779                                 interrupts = <0 30 0>;
 780                                 clocks = <&car 79>;
 781                         };
 782                         vpp@13110000 {
 783                                 compatible = "sirf,atlas7-vpp";
 784                                 reg = <0x13110000 0x10000>;
 785                                 interrupts = <0 31 0>;
 786                                 clocks = <&car 78>;
 787                                 resets = <&car 29>;
 788                         };
 789                         lvds@10e10000 {
 790                                 compatible = "sirf,atlas7-lvdsc";
 791                                 reg = <0x10e10000 0x10000>;
 792                                 interrupts = <0 64 0>;
 793                                 clocks = <&car 54>;
 794                                 resets = <&car 29>;
 795                         };
 796
 797                 };
 798
 799                 graphics-iobg {
 800                         compatible = "simple-bus";
 801                         #address-cells = <1>;
 802                         #size-cells = <1>;
 803                         ranges = <0x12000000 0x12000000 0x1000000>;
 804
 805                         graphics@12000000 {
 806                                 compatible = "powervr,sgx531";
 807                                 reg = <0x12000000 0x1000000>;
 808                                 interrupts = <0 6 0>;
 809                                 clocks = <&car 126>;
 810                         };
 811                 };
 812         };
 813 };