packages/linux/omap3-pandora-kernel-wifi/pvr/nokia-TI.diff

   1  include4/img_types.h                                                 |    5
   2  include4/pdumpdefs.h                                                 |    1
   3  include4/pvrmodule.h                                                 |   31
   4  include4/pvrversion.h                                                |    8
   5  include4/services.h                                                  |   46
   6  include4/servicesext.h                                               |    6
   7  include4/sgxapi_km.h                                                 |   65
   8  services4/3rdparty/bufferclass_example/bufferclass_example.c         |   32
   9  services4/3rdparty/bufferclass_example/bufferclass_example.h         |   25
  10  services4/3rdparty/bufferclass_example/bufferclass_example_linux.c   |   20
  11  services4/3rdparty/bufferclass_example/bufferclass_example_private.c |   76 -
  12  services4/3rdparty/bufferclass_example/kbuild/Makefile               |   40
  13  services4/3rdparty/dc_omap3430_linux/kbuild/Makefile                 |   39
  14  services4/3rdparty/dc_omap3430_linux/omaplfb.h                       |    7
  15  services4/3rdparty/dc_omap3430_linux/omaplfb_displayclass.c          |   60
  16  services4/3rdparty/dc_omap3430_linux/omaplfb_linux.c                 |   52
  17  services4/include/pvr_bridge.h                                       |   26
  18  services4/include/servicesint.h                                      |   17
  19  services4/include/sgx_bridge.h                                       |   95 +
  20  services4/include/sgx_bridge_km.h                                    |  139 -
  21  services4/include/sgxinfo.h                                          |  347 ++--
  22  services4/srvkm/Makefile                                             |   68
  23  services4/srvkm/bridged/bridged_pvr_bridge.c                         |  732 ++++++++-
  24  services4/srvkm/common/deviceclass.c                                 |    6
  25  services4/srvkm/common/devicemem.c                                   |    3
  26  services4/srvkm/common/handle.c                                      |   58
  27  services4/srvkm/common/power.c                                       |   15
  28  services4/srvkm/common/pvrsrv.c                                      |  151 +-
  29  services4/srvkm/common/queue.c                                       |    4
  30  services4/srvkm/common/resman.c                                      |   13
  31  services4/srvkm/devices/sgx/mmu.c                                    |    2
  32  services4/srvkm/devices/sgx/mmu.h                                    |    2
  33  services4/srvkm/devices/sgx/pb.c                                     |   37
  34  services4/srvkm/devices/sgx/sgx2dcore.c                              |   21
  35  services4/srvkm/devices/sgx/sgx_bridge_km.h                          |  158 ++
  36  services4/srvkm/devices/sgx/sgxinfokm.h                              |  146 +
  37  services4/srvkm/devices/sgx/sgxinit.c                                |  734 ++--------
  38  services4/srvkm/devices/sgx/sgxkick.c                                |  327 +++-
  39  services4/srvkm/devices/sgx/sgxreset.c                               |  330 ++++
  40  services4/srvkm/devices/sgx/sgxtransfer.c                            |  312 ++++
  41  services4/srvkm/devices/sgx/sgxutils.c                               |  459 +++---
  42  services4/srvkm/devices/sgx/sgxutils.h                               |   28
  43  services4/srvkm/env/linux/env_data.h                                 |    8
  44  services4/srvkm/env/linux/event.c                                    |  221 +++
  45  services4/srvkm/env/linux/event.h                                    |   32
  46  services4/srvkm/env/linux/kbuild/Makefile                            |   81 +
  47  services4/srvkm/env/linux/mm.c                                       |    8
  48  services4/srvkm/env/linux/module.c                                   |  342 +++-
  49  services4/srvkm/env/linux/osfunc.c                                   |  347 +++-
  50  services4/srvkm/env/linux/pdump.c                                    |   13
  51  services4/srvkm/env/linux/proc.c                                     |   17
  52  services4/srvkm/env/linux/pvr_debug.c                                |    2
  53  services4/srvkm/hwdefs/sgxdefs.h                                     |    4
  54  services4/srvkm/hwdefs/sgxerrata.h                                   |    9
  55  services4/srvkm/hwdefs/sgxfeaturedefs.h                              |   11
  56  services4/srvkm/include/device.h                                     |   35
  57  services4/srvkm/include/handle.h                                     |   10
  58  services4/srvkm/include/osfunc.h                                     |   32
  59  services4/srvkm/include/pdump_km.h                                   |    2
  60  services4/srvkm/include/resman.h                                     |    5
  61  services4/srvkm/include/srvkm.h                                      |    4
  62  services4/system/include/syscommon.h                                 |    2
  63  services4/system/omap3430/sysconfig.c                                |   24
  64  services4/system/omap3430/sysconfig.h                                |    7
  65  services4/system/omap3430/sysutils.c                                 |    2
  66  65 files changed, 4286 insertions(+), 1675 deletions(-)
  67
  68
  69 diff -Nurd git/drivers/gpu/pvr/include4/img_types.h git/drivers/gpu/pvr/include4/img_types.h
  70 --- git/drivers/gpu/pvr/include4/img_types.h    2009-01-05 20:00:44.000000000 +0100
  71 +++ git/drivers/gpu/pvr/include4/img_types.h    2008-12-18 15:47:29.000000000 +0100
  72 @@ -43,7 +43,10 @@
  73  typedef signed long            IMG_INT32,      *IMG_PINT32;
  74
  75         #if defined(LINUX)
  76 -
  77 +#if !defined(USE_CODE)
  78 +               typedef unsigned long long              IMG_UINT64,     *IMG_PUINT64;
  79 +               typedef long long                               IMG_INT64,      *IMG_PINT64;
  80 +#endif
  81         #else
  82
  83                 #error("define an OS")
  84 diff -Nurd git/drivers/gpu/pvr/include4/pdumpdefs.h git/drivers/gpu/pvr/include4/pdumpdefs.h
  85 --- git/drivers/gpu/pvr/include4/pdumpdefs.h    2009-01-05 20:00:44.000000000 +0100
  86 +++ git/drivers/gpu/pvr/include4/pdumpdefs.h    2008-12-18 15:47:29.000000000 +0100
  87 @@ -73,6 +73,7 @@
  88         PVRSRV_PDUMP_MEM_FORMAT_RESERVED = 1,
  89         PVRSRV_PDUMP_MEM_FORMAT_TILED = 8,
  90         PVRSRV_PDUMP_MEM_FORMAT_TWIDDLED = 9,
  91 +       PVRSRV_PDUMP_MEM_FORMAT_HYBRID = 10,
  92
  93         PVRSRV_PDUMP_MEM_FORMAT_FORCE_I32 = 0x7fffffff
  94  } PDUMP_MEM_FORMAT;
  95 diff -Nurd git/drivers/gpu/pvr/include4/pvrmodule.h git/drivers/gpu/pvr/include4/pvrmodule.h
  96 --- git/drivers/gpu/pvr/include4/pvrmodule.h    1970-01-01 01:00:00.000000000 +0100
  97 +++ git/drivers/gpu/pvr/include4/pvrmodule.h    2008-12-18 15:47:29.000000000 +0100
  98 @@ -0,0 +1,31 @@
  99 +/**********************************************************************
 100 + *
 101 + * Copyright(c) 2008 Imagination Technologies Ltd. All rights reserved.
 102 + *
 103 + * This program is free software; you can redistribute it and/or modify it
 104 + * under the terms and conditions of the GNU General Public License,
 105 + * version 2, as published by the Free Software Foundation.
 106 + *
 107 + * This program is distributed in the hope it will be useful but, except
 108 + * as otherwise stated in writing, without any warranty; without even the
 109 + * implied warranty of merchantability or fitness for a particular purpose.
 110 + * See the GNU General Public License for more details.
 111 + *
 112 + * You should have received a copy of the GNU General Public License along with
 113 + * this program; if not, write to the Free Software Foundation, Inc.,
 114 + * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
 115 + *
 116 + * The full GNU General Public License is included in this distribution in
 117 + * the file called "COPYING".
 118 + *
 119 + * Contact Information:
 120 + * Imagination Technologies Ltd. <gpl-support@imgtec.com>
 121 + * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
 122 + *
 123 + ******************************************************************************/
 124 +
 125 +#ifndef        _PVRMODULE_H_
 126 +#define        _PVRMODULE_H_
 127 +MODULE_AUTHOR("Imagination Technologies Ltd. <gpl-support@imgtec.com>");
 128 +MODULE_LICENSE("GPL");
 129 +#endif
 130 diff -Nurd git/drivers/gpu/pvr/include4/pvrversion.h git/drivers/gpu/pvr/include4/pvrversion.h
 131 --- git/drivers/gpu/pvr/include4/pvrversion.h   2009-01-05 20:00:44.000000000 +0100
 132 +++ git/drivers/gpu/pvr/include4/pvrversion.h   2008-12-18 15:47:29.000000000 +0100
 133 @@ -28,10 +28,10 @@
 134  #define _PVRVERSION_H_
 135
 136  #define PVRVERSION_MAJ 1
 137 -#define PVRVERSION_MIN 1
 138 -#define PVRVERSION_BRANCH 11
 139 -#define PVRVERSION_BUILD 970
 140 -#define PVRVERSION_STRING "1.1.11.970"
 141 +#define PVRVERSION_MIN 2
 142 +#define PVRVERSION_BRANCH 12
 143 +#define PVRVERSION_BUILD 838
 144 +#define PVRVERSION_STRING "1.2.12.838"
 145
 146  #endif
 147
 148 diff -Nurd git/drivers/gpu/pvr/include4/servicesext.h git/drivers/gpu/pvr/include4/servicesext.h
 149 --- git/drivers/gpu/pvr/include4/servicesext.h  2009-01-05 20:00:44.000000000 +0100
 150 +++ git/drivers/gpu/pvr/include4/servicesext.h  2008-12-18 15:47:29.000000000 +0100
 151 @@ -150,6 +150,8 @@
 152         PVRSRV_PIXEL_FORMAT_V8U8,
 153         PVRSRV_PIXEL_FORMAT_V16U16,
 154         PVRSRV_PIXEL_FORMAT_QWVU8888,
 155 +       PVRSRV_PIXEL_FORMAT_XLVU8888,
 156 +       PVRSRV_PIXEL_FORMAT_QWVU16,
 157         PVRSRV_PIXEL_FORMAT_D16,
 158         PVRSRV_PIXEL_FORMAT_D24S8,
 159         PVRSRV_PIXEL_FORMAT_D24X8,
 160 @@ -159,7 +161,9 @@
 161         PVRSRV_PIXEL_FORMAT_YUY2,
 162         PVRSRV_PIXEL_FORMAT_DXT23,
 163         PVRSRV_PIXEL_FORMAT_DXT45,
 164 -       PVRSRV_PIXEL_FORMAT_G32R32F,
 165 +       PVRSRV_PIXEL_FORMAT_G32R32F,
 166 +       PVRSRV_PIXEL_FORMAT_NV11,
 167 +       PVRSRV_PIXEL_FORMAT_NV12,
 168
 169         PVRSRV_PIXEL_FORMAT_FORCE_I32 = 0x7fffffff,
 170  } PVRSRV_PIXEL_FORMAT;
 171 diff -Nurd git/drivers/gpu/pvr/include4/services.h git/drivers/gpu/pvr/include4/services.h
 172 --- git/drivers/gpu/pvr/include4/services.h     2009-01-05 20:00:44.000000000 +0100
 173 +++ git/drivers/gpu/pvr/include4/services.h     2008-12-18 15:47:29.000000000 +0100
 174 @@ -36,16 +36,14 @@
 175  #include "pdumpdefs.h"
 176
 177
 178 -#if defined(SERVICES4)
 179  #define IMG_CONST const
 180 -#else
 181 -#define IMG_CONST
 182 -#endif
 183
 184  #define PVRSRV_MAX_CMD_SIZE            1024
 185
 186  #define PVRSRV_MAX_DEVICES             16
 187
 188 +#define EVENTOBJNAME_MAXLENGTH (50)
 189 +
 190  #define PVRSRV_MEM_READ                                                (1<<0)
 191  #define PVRSRV_MEM_WRITE                                       (1<<1)
 192  #define PVRSRV_MEM_CACHE_CONSISTENT                    (1<<2)
 193 @@ -90,6 +88,7 @@
 194  #define PVRSRV_MISC_INFO_TIMER_PRESENT                 (1<<0)
 195  #define PVRSRV_MISC_INFO_CLOCKGATE_PRESENT             (1<<1)
 196  #define PVRSRV_MISC_INFO_MEMSTATS_PRESENT              (1<<2)
 197 +#define PVRSRV_MISC_INFO_GLOBALEVENTOBJECT_PRESENT     (1<<3)
 198
 199  #define PVRSRV_PDUMP_MAX_FILENAME_SIZE                 20
 200  #define PVRSRV_PDUMP_MAX_COMMENT_SIZE                  200
 201 @@ -133,7 +132,8 @@
 202         IMG_OPENGLES2  = 0x00000003,
 203         IMG_D3DM           = 0x00000004,
 204         IMG_SRV_UM         = 0x00000005,
 205 -       IMG_OPENVG         = 0x00000006
 206 +       IMG_OPENVG         = 0x00000006,
 207 +       IMG_SRVCLIENT  = 0x00000007,
 208
 209  } IMG_MODULE_ID;
 210
 211 @@ -202,10 +202,8 @@
 212
 213         IMG_PVOID                               pvLinAddr;
 214
 215 -#if defined(SERVICES4)
 216
 217         IMG_PVOID                               pvLinAddrKM;
 218 -#endif
 219
 220
 221         IMG_DEV_VIRTADDR                sDevVAddr;
 222 @@ -294,6 +292,14 @@
 223
 224  } PVRSRV_DEVICE_IDENTIFIER;
 225
 226 +typedef struct _PVRSRV_EVENTOBJECT_
 227 +{
 228 +
 229 +       IMG_CHAR        szName[EVENTOBJNAME_MAXLENGTH];
 230 +
 231 +       IMG_HANDLE      hOSEventKM;
 232 +
 233 +} PVRSRV_EVENTOBJECT;
 234
 235  typedef struct _PVRSRV_MISC_INFO_
 236  {
 237 @@ -313,9 +319,14 @@
 238         IMG_UINT32      ui32MemoryStrLen;
 239
 240
 241 +       PVRSRV_EVENTOBJECT      sGlobalEventObject;
 242 +       IMG_HANDLE                      hOSGlobalEvent;
 243 +
 244 +
 245
 246  } PVRSRV_MISC_INFO;
 247
 248 +
 249  IMG_IMPORT
 250  PVRSRV_ERROR IMG_CALLCONV PVRSRVConnect(PVRSRV_CONNECTION *psConnection);
 251
 252 @@ -335,7 +346,7 @@
 253  PVRSRV_ERROR IMG_CALLCONV PVRSRVGetMiscInfo (IMG_CONST PVRSRV_CONNECTION *psConnection, PVRSRV_MISC_INFO *psMiscInfo);
 254
 255  IMG_IMPORT
 256 -PVRSRV_ERROR IMG_CALLCONV PVRSRVReleaseMiscInfo (PVRSRV_MISC_INFO *psMiscInfo);
 257 +PVRSRV_ERROR IMG_CALLCONV PVRSRVReleaseMiscInfo (IMG_CONST PVRSRV_CONNECTION *psConnection, PVRSRV_MISC_INFO *psMiscInfo);
 258
 259  #if 1
 260  IMG_IMPORT
 261 @@ -348,7 +359,9 @@
 262  #endif
 263
 264  IMG_IMPORT
 265 -PVRSRV_ERROR PollForValue (volatile IMG_UINT32 *pui32LinMemAddr,
 266 +PVRSRV_ERROR PollForValue ( PVRSRV_CONNECTION *psConnection,
 267 +                                                       IMG_HANDLE hOSEvent,
 268 +                                                       volatile IMG_UINT32 *pui32LinMemAddr,
 269                                                                         IMG_UINT32 ui32Value,
 270                                                                         IMG_UINT32 ui32Mask,
 271                                                                         IMG_UINT32 ui32Waitus,
 272 @@ -631,21 +644,18 @@
 273                                                                                         IMG_UINT32 ui32RegValue,
 274                                                                                         IMG_UINT32 ui32Flags);
 275
 276 -#ifdef SERVICES4
 277  IMG_IMPORT
 278  PVRSRV_ERROR IMG_CALLCONV PVRSRVPDumpRegPolWithFlags(IMG_CONST PVRSRV_CONNECTION *psConnection,
 279                                                                                                          IMG_UINT32 ui32RegAddr,
 280                                                                                                          IMG_UINT32 ui32RegValue,
 281                                                                                                          IMG_UINT32 ui32Mask,
 282                                                                                                          IMG_UINT32 ui32Flags);
 283 -#endif
 284  IMG_IMPORT
 285  PVRSRV_ERROR IMG_CALLCONV PVRSRVPDumpRegPol(IMG_CONST PVRSRV_CONNECTION *psConnection,
 286                                                                                         IMG_UINT32 ui32RegAddr,
 287                                                                                         IMG_UINT32 ui32RegValue,
 288                                                                                         IMG_UINT32 ui32Mask);
 289
 290 -#ifdef SERVICES4
 291  IMG_IMPORT
 292  PVRSRV_ERROR IMG_CALLCONV PVRSRVPDumpPDReg(IMG_CONST PVRSRV_CONNECTION *psConnection,
 293                                                                                         IMG_UINT32 ui32RegAddr,
 294 @@ -655,7 +665,6 @@
 295                                                                                                 PVRSRV_CLIENT_MEM_INFO *psMemInfo,
 296                                                                                                 IMG_UINT32 ui32Offset,
 297                                                                                                 IMG_DEV_PHYADDR sPDDevPAddr);
 298 -#endif
 299
 300  IMG_IMPORT
 301  PVRSRV_ERROR IMG_CALLCONV PVRSRVPDumpMemPages(IMG_CONST PVRSRV_CONNECTION *psConnection,
 302 @@ -676,7 +685,6 @@
 303                                                                                          IMG_CONST IMG_CHAR *pszComment,
 304                                                                                          IMG_BOOL bContinuous);
 305
 306 -#if defined(SERVICES4)
 307  IMG_IMPORT
 308  PVRSRV_ERROR IMG_CALLCONV PVRSRVPDumpCommentf(IMG_CONST PVRSRV_CONNECTION *psConnection,
 309                                                                                           IMG_BOOL bContinuous,
 310 @@ -686,7 +694,6 @@
 311  PVRSRV_ERROR IMG_CALLCONV PVRSRVPDumpCommentWithFlagsf(IMG_CONST PVRSRV_CONNECTION *psConnection,
 312                                                                                                            IMG_UINT32 ui32Flags,
 313                                                                                                            IMG_CONST IMG_CHAR *pszFormat, ...);
 314 -#endif
 315
 316  IMG_IMPORT
 317  PVRSRV_ERROR IMG_CALLCONV PVRSRVPDumpDriverInfo(IMG_CONST PVRSRV_CONNECTION *psConnection,
 318 @@ -718,7 +725,7 @@
 319                                                                                         IMG_UINT32 ui32Size,
 320                                                                                         IMG_UINT32 ui32PDumpFlags);
 321
 322 -#ifdef SERVICES4
 323 +
 324  IMG_IMPORT
 325  IMG_BOOL IMG_CALLCONV PVRSRVPDumpIsCapturingTest(IMG_CONST PVRSRV_CONNECTION *psConnection);
 326
 327 @@ -726,7 +733,6 @@
 328  PVRSRV_ERROR IMG_CALLCONV PVRSRVPDumpCycleCountRegRead(IMG_CONST PVRSRV_CONNECTION *psConnection,
 329                                                                                                 IMG_UINT32 ui32RegOffset,
 330                                                                                                 IMG_BOOL bLastFrame);
 331 -#endif
 332
 333  IMG_IMPORT IMG_HANDLE  PVRSRVLoadLibrary(IMG_CHAR *pszLibraryName);
 334  IMG_IMPORT PVRSRV_ERROR        PVRSRVUnloadLibrary(IMG_HANDLE hExtDrv);
 335 @@ -777,9 +783,9 @@
 336  IMG_PVOID PVRSRVReallocUserModeMemTracking(IMG_VOID *pvMem, IMG_UINT32 ui32NewSize, IMG_CHAR *pszFileName, IMG_UINT32 ui32LineNumber);
 337  #endif
 338
 339 -PVRSRV_ERROR PVRSRVEventObjectWait(PVRSRV_CONNECTION *psConnection,
 340 -                                                                       IMG_HANDLE hOSEvent,
 341 -                                                                       IMG_UINT32 ui32MSTimeout);
 342 +IMG_IMPORT
 343 +PVRSRV_ERROR PVRSRVEventObjectWait(PVRSRV_CONNECTION * psConnection,
 344 +                                                                       IMG_HANDLE hOSEvent);
 345
 346  #define TIME_NOT_PASSED_UINT32(a,b,c)          ((a - b) < c)
 347
 348 diff -Nurd git/drivers/gpu/pvr/include4/sgxapi_km.h git/drivers/gpu/pvr/include4/sgxapi_km.h
 349 --- git/drivers/gpu/pvr/include4/sgxapi_km.h    2009-01-05 20:00:44.000000000 +0100
 350 +++ git/drivers/gpu/pvr/include4/sgxapi_km.h    2008-12-18 15:47:29.000000000 +0100
 351 @@ -32,6 +32,7 @@
 352  #endif
 353
 354  #include "sgxdefs.h"
 355 +
 356  #if defined(__linux__) && !defined(USE_CODE)
 357         #if defined(__KERNEL__)
 358                 #include <asm/unistd.h>
 359 @@ -64,6 +65,8 @@
 360  #define SGX_MAX_TA_STATUS_VALS 32
 361  #define SGX_MAX_3D_STATUS_VALS 2
 362
 363 +#define SGX_MAX_SRC_SYNCS                      4
 364 +
 365  #define PFLAGS_POWERDOWN                       0x00000001
 366  #define PFLAGS_POWERUP                         0x00000002
 367
 368 @@ -75,11 +78,60 @@
 369         IMG_SYS_PHYADDR                 sPhysBase;
 370  }SGX_SLAVE_PORT;
 371
 372 +#ifdef SUPPORT_SGX_HWPERF
 373 +
 374 +#define PVRSRV_SGX_HWPERF_CBSIZE                                       0x100
 375 +
 376 +#define PVRSRV_SGX_HWPERF_INVALID                                      1
 377 +#define PVRSRV_SGX_HWPERF_TRANSFER                                     2
 378 +#define PVRSRV_SGX_HWPERF_TA                                           3
 379 +#define PVRSRV_SGX_HWPERF_3D                                           4
 380 +
 381 +#define PVRSRV_SGX_HWPERF_ON                                           0x40
 382 +
 383 +
 384 +typedef struct _PVRSRV_SGX_HWPERF_CBDATA_
 385 +{
 386 +       IMG_UINT32      ui32FrameNo;
 387 +       IMG_UINT32      ui32Type;
 388 +       IMG_UINT32      ui32StartTimeWraps;
 389 +       IMG_UINT32      ui32StartTime;
 390 +       IMG_UINT32      ui32EndTimeWraps;
 391 +       IMG_UINT32      ui32EndTime;
 392 +       IMG_UINT32      ui32ClockSpeed;
 393 +       IMG_UINT32      ui32TimeMax;
 394 +} PVRSRV_SGX_HWPERF_CBDATA;
 395 +
 396 +typedef struct _PVRSRV_SGX_HWPERF_CB_
 397 +{
 398 +       IMG_UINT32      ui32Woff;
 399 +       IMG_UINT32      ui32Roff;
 400 +       PVRSRV_SGX_HWPERF_CBDATA psHWPerfCBData[PVRSRV_SGX_HWPERF_CBSIZE];
 401 +} PVRSRV_SGX_HWPERF_CB;
 402 +
 403 +
 404 +typedef struct _SGX_MISC_INFO_HWPERF_RETRIEVE_CB
 405 +{
 406 +       PVRSRV_SGX_HWPERF_CBDATA*       psHWPerfData;
 407 +       IMG_UINT32                                      ui32ArraySize;
 408 +       IMG_UINT32                                      ui32DataCount;
 409 +       IMG_UINT32                                      ui32Time;
 410 +} SGX_MISC_INFO_HWPERF_RETRIEVE_CB;
 411 +#endif
 412 +
 413 +
 414  typedef enum _SGX_MISC_INFO_REQUEST_
 415  {
 416 +       SGX_MISC_INFO_REQUEST_CLOCKSPEED = 0,
 417 +#ifdef SUPPORT_SGX_HWPERF
 418 +       SGX_MISC_INFO_REQUEST_HWPERF_CB_ON,
 419 +       SGX_MISC_INFO_REQUEST_HWPERF_CB_OFF,
 420 +       SGX_MISC_INFO_REQUEST_HWPERF_RETRIEVE_CB,
 421 +#endif
 422         SGX_MISC_INFO_REQUEST_FORCE_I16                                 =  0x7fff
 423  } SGX_MISC_INFO_REQUEST;
 424
 425 +
 426  typedef struct _SGX_MISC_INFO_
 427  {
 428         SGX_MISC_INFO_REQUEST   eRequest;
 429 @@ -87,6 +139,10 @@
 430         union
 431         {
 432                 IMG_UINT32      reserved;
 433 +               IMG_UINT32                                                                                      ui32SGXClockSpeed;
 434 +#ifdef SUPPORT_SGX_HWPERF
 435 +               SGX_MISC_INFO_HWPERF_RETRIEVE_CB                                        sRetrieveCB;
 436 +#endif
 437         } uData;
 438  } SGX_MISC_INFO;
 439
 440 @@ -162,6 +218,15 @@
 441  } PVR3DIF4_KICKTA_PDUMP, *PPVR3DIF4_KICKTA_PDUMP;
 442  #endif
 443
 444 +#if defined(TRANSFER_QUEUE)
 445 +#if defined(SGX_FEATURE_2D_HARDWARE)
 446 +#define SGX_MAX_2D_BLIT_CMD_SIZE               26
 447 +#define SGX_MAX_2D_SRC_SYNC_OPS                        3
 448 +#endif
 449 +#define SGX_MAX_TRANSFER_STATUS_VALS   64
 450 +#define SGX_MAX_TRANSFER_SYNC_OPS      5
 451 +#endif
 452 +
 453  #if defined (__cplusplus)
 454  }
 455  #endif
 456 diff -Nurd git/drivers/gpu/pvr/services4/3rdparty/bufferclass_example/bufferclass_example.c git/drivers/gpu/pvr/services4/3rdparty/bufferclass_example/bufferclass_example.c
 457 --- git/drivers/gpu/pvr/services4/3rdparty/bufferclass_example/bufferclass_example.c    2009-01-05 20:00:44.000000000 +0100
 458 +++ git/drivers/gpu/pvr/services4/3rdparty/bufferclass_example/bufferclass_example.c    2008-12-18 15:47:29.000000000 +0100
 459 @@ -197,11 +197,27 @@
 460                         return PVRSRV_ERROR_OUT_OF_MEMORY;
 461                 }
 462
 463 +
 464 +
 465 +               psDevInfo->sBufferInfo.pixelformat = BC_EXAMPLE_PIXELFORMAT;
 466 +               psDevInfo->sBufferInfo.ui32Width = BC_EXAMPLE_WIDTH;
 467 +               psDevInfo->sBufferInfo.ui32Height = BC_EXAMPLE_HEIGHT;
 468 +               psDevInfo->sBufferInfo.ui32ByteStride = BC_EXAMPLE_STRIDE;
 469 +               psDevInfo->sBufferInfo.ui32BufferDeviceID = BC_EXAMPLE_DEVICEID;
 470 +               psDevInfo->sBufferInfo.ui32Flags = PVRSRV_BC_FLAGS_YUVCSC_FULL_RANGE | PVRSRV_BC_FLAGS_YUVCSC_BT601;
 471 +
 472                 for(i=0; i < BC_EXAMPLE_NUM_BUFFERS; i++)
 473                 {
 474 +                       IMG_UINT32 ui32Size = BC_EXAMPLE_HEIGHT * BC_EXAMPLE_STRIDE;
 475 +
 476 +                       if(psDevInfo->sBufferInfo.pixelformat == PVRSRV_PIXEL_FORMAT_YUV420)
 477 +                       {
 478 +
 479 +                               ui32Size += ((BC_EXAMPLE_STRIDE >> 1) * (BC_EXAMPLE_HEIGHT >> 1) << 1);
 480 +                       }
 481
 482
 483 -                       if (AllocContigMemory(BC_EXAMPLE_HEIGHT * BC_EXAMPLE_STRIDE,
 484 +                       if (AllocContigMemory(ui32Size,
 485                                                                   &psDevInfo->psSystemBuffer[i].hMemHandle,
 486                                                                   &psDevInfo->psSystemBuffer[i].sCPUVAddr,
 487                                                                   &sSystemBufferCPUPAddr) != PVRSRV_OK)
 488 @@ -211,12 +227,14 @@
 489
 490                         psDevInfo->ui32NumBuffers++;
 491
 492 -                       psDevInfo->psSystemBuffer[i].ui32Size = BC_EXAMPLE_HEIGHT * BC_EXAMPLE_STRIDE;
 493 +                       psDevInfo->psSystemBuffer[i].ui32Size = ui32Size;
 494                         psDevInfo->psSystemBuffer[i].sSysAddr = CpuPAddrToSysPAddr(sSystemBufferCPUPAddr);
 495                         psDevInfo->psSystemBuffer[i].sPageAlignSysAddr.uiAddr = (psDevInfo->psSystemBuffer[i].sSysAddr.uiAddr & 0xFFFFF000);
 496                         psDevInfo->psSystemBuffer[i].psSyncData = IMG_NULL;
 497                 }
 498
 499 +               psDevInfo->sBufferInfo.ui32BufferCount = psDevInfo->ui32NumBuffers;
 500 +
 501
 502
 503                 psDevInfo->sBCJTable.ui32TableSize = sizeof(PVRSRV_BC_SRV2BUFFER_KMJTABLE);
 504 @@ -234,16 +252,6 @@
 505                 {
 506                         return PVRSRV_ERROR_DEVICE_REGISTER_FAILED;
 507                 }
 508 -
 509 -
 510 -
 511 -               psDevInfo->sBufferInfo.pixelformat = BC_EXAMPLE_PIXELFORMAT;
 512 -               psDevInfo->sBufferInfo.ui32Width = BC_EXAMPLE_WIDTH;
 513 -               psDevInfo->sBufferInfo.ui32Height = BC_EXAMPLE_HEIGHT;
 514 -               psDevInfo->sBufferInfo.ui32ByteStride = BC_EXAMPLE_STRIDE;
 515 -               psDevInfo->sBufferInfo.ui32BufferDeviceID = BC_EXAMPLE_DEVICEID;
 516 -               psDevInfo->sBufferInfo.ui32Flags = PVRSRV_BC_FLAGS_YUVCSC_FULL_RANGE | PVRSRV_BC_FLAGS_YUVCSC_BT601;
 517 -               psDevInfo->sBufferInfo.ui32BufferCount = psDevInfo->ui32NumBuffers;
 518         }
 519
 520
 521 diff -Nurd git/drivers/gpu/pvr/services4/3rdparty/bufferclass_example/bufferclass_example.h git/drivers/gpu/pvr/services4/3rdparty/bufferclass_example/bufferclass_example.h
 522 --- git/drivers/gpu/pvr/services4/3rdparty/bufferclass_example/bufferclass_example.h    2009-01-05 20:00:44.000000000 +0100
 523 +++ git/drivers/gpu/pvr/services4/3rdparty/bufferclass_example/bufferclass_example.h    2008-12-18 15:47:29.000000000 +0100
 524 @@ -39,11 +39,32 @@
 525
 526  #define BC_EXAMPLE_NUM_BUFFERS 3
 527
 528 -#define BC_EXAMPLE_WIDTH               (160)
 529 +#define YUV420 1
 530 +#ifdef YUV420
 531 +
 532 +#define BC_EXAMPLE_WIDTH               (320)
 533  #define BC_EXAMPLE_HEIGHT              (160)
 534 -#define BC_EXAMPLE_STRIDE              (160*2)
 535 +#define BC_EXAMPLE_STRIDE              (320)
 536 +#define BC_EXAMPLE_PIXELFORMAT (PVRSRV_PIXEL_FORMAT_YUV420)
 537 +
 538 +#else
 539 +#ifdef YUV422
 540 +
 541 +#define BC_EXAMPLE_WIDTH               (320)
 542 +#define BC_EXAMPLE_HEIGHT              (160)
 543 +#define BC_EXAMPLE_STRIDE              (320*2)
 544  #define BC_EXAMPLE_PIXELFORMAT (PVRSRV_PIXEL_FORMAT_YVYU)
 545
 546 +#else
 547 +
 548 +#define BC_EXAMPLE_WIDTH               (320)
 549 +#define BC_EXAMPLE_HEIGHT              (160)
 550 +#define BC_EXAMPLE_STRIDE              (320*2)
 551 +#define BC_EXAMPLE_PIXELFORMAT (PVRSRV_PIXEL_FORMAT_RGB565)
 552 +
 553 +#endif
 554 +#endif
 555 +
 556  #define BC_EXAMPLE_DEVICEID             0
 557
 558
 559 diff -Nurd git/drivers/gpu/pvr/services4/3rdparty/bufferclass_example/bufferclass_example_linux.c git/drivers/gpu/pvr/services4/3rdparty/bufferclass_example/bufferclass_example_linux.c
 560 --- git/drivers/gpu/pvr/services4/3rdparty/bufferclass_example/bufferclass_example_linux.c      2009-01-05 20:00:44.000000000 +0100
 561 +++ git/drivers/gpu/pvr/services4/3rdparty/bufferclass_example/bufferclass_example_linux.c      2008-12-18 15:47:29.000000000 +0100
 562 @@ -38,11 +38,10 @@
 563
 564  #include "bufferclass_example.h"
 565  #include "bufferclass_example_linux.h"
 566 +#include "pvrmodule.h"
 567
 568  #define DEVNAME        "bc_example"
 569
 570 -MODULE_AUTHOR("Imagination Technologies Ltd. <gpl-support@imgtec.com>");
 571 -MODULE_LICENSE("GPL");
 572  MODULE_SUPPORTED_DEVICE(DEVNAME);
 573
 574  int BC_Example_Bridge(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg);
 575 @@ -259,22 +258,11 @@
 576         {
 577                 return PVRSRV_ERROR_OUT_OF_MEMORY;
 578         }
 579 -       else
 580 -       {
 581 -               IMG_VOID *pvPage;
 582 -               IMG_VOID *pvEnd = pvLinAddr + ui32Size;
 583 -
 584 -               for(pvPage = pvLinAddr; pvPage < pvEnd;  pvPage += PAGE_SIZE)
 585 -               {
 586 -                       SetPageReserved(virt_to_page(pvPage));
 587 -               }
 588
 589 -               pPhysAddr->uiAddr = dma;
 590 -               *pLinAddr = pvLinAddr;
 591 +       pPhysAddr->uiAddr = dma;
 592 +       *pLinAddr = pvLinAddr;
 593
 594 -               return PVRSRV_OK;
 595 -       }
 596 -       return PVRSRV_ERROR_OUT_OF_MEMORY;
 597 +       return PVRSRV_OK;
 598  #endif
 599  }
 600
 601 diff -Nurd git/drivers/gpu/pvr/services4/3rdparty/bufferclass_example/bufferclass_example_private.c git/drivers/gpu/pvr/services4/3rdparty/bufferclass_example/bufferclass_example_private.c
 602 --- git/drivers/gpu/pvr/services4/3rdparty/bufferclass_example/bufferclass_example_private.c    2009-01-05 20:00:44.000000000 +0100
 603 +++ git/drivers/gpu/pvr/services4/3rdparty/bufferclass_example/bufferclass_example_private.c    2008-12-18 15:47:29.000000000 +0100
 604 @@ -26,6 +26,43 @@
 605
 606  #include "bufferclass_example.h"
 607
 608 +void FillYUV420Image(void *pvDest, int width, int height, int bytestride)
 609 +{
 610 +       static int iPhase = 0;
 611 +       int i, j;
 612 +       unsigned char u,v,y;
 613 +       unsigned char *pui8y = (unsigned char *)pvDest;
 614 +       unsigned short *pui16uv;
 615 +       unsigned int count = 0;
 616 +
 617 +       for(j=0;j<height;j++)
 618 +       {
 619 +               for(i=0;i<width;i++)
 620 +               {
 621 +                       y = (((i+iPhase)>>6)%(2)==0)? 0x7f:0x00;
 622 +
 623 +                       pui8y[count++] = y;
 624 +               }
 625 +       }
 626 +
 627 +       pui16uv = (unsigned short *)((unsigned char *)pvDest + (width * height));
 628 +       count = 0;
 629 +
 630 +       for(j=0;j<height;j+=2)
 631 +       {
 632 +               for(i=0;i<width;i+=2)
 633 +               {
 634 +                       u = (j<(height/2))? ((i<(width/2))? 0xFF:0x33) : ((i<(width/2))? 0x33:0xAA);
 635 +                       v = (j<(height/2))? ((i<(width/2))? 0xAC:0x0) : ((i<(width/2))? 0x03:0xEE);
 636 +
 637 +
 638 +                       pui16uv[count++] = (v << 8) | u;
 639 +
 640 +               }
 641 +       }
 642 +
 643 +       iPhase++;
 644 +}
 645
 646  void FillYUV422Image(void *pvDest, int width, int height, int bytestride)
 647  {
 648 @@ -37,12 +74,12 @@
 649
 650         for(y=0;y<height;y++)
 651         {
 652 -               for(x=0;x<width >> 1;x++)
 653 +               for(x=0;x<width;x+=2)
 654                 {
 655 -                       u = (y<(height/2))? ((x<(width/4))? 0xFF:0x33) : ((x<(width/4))? 0x33:0xAA);
 656 -                       v = (y<(height/2))? ((x<(width/4))? 0xAA:0x0) : ((x<(width/4))? 0x03:0xEE);
 657 +                       u = (y<(height/2))? ((x<(width/2))? 0xFF:0x33) : ((x<(width/2))? 0x33:0xAA);
 658 +                       v = (y<(height/2))? ((x<(width/2))? 0xAA:0x0) : ((x<(width/2))? 0x03:0xEE);
 659
 660 -                       y0 = y1 = (((x+iPhase)>>4)%(2)==0)? 0x7f:0x00;
 661 +                       y0 = y1 = (((x+iPhase)>>6)%(2)==0)? 0x7f:0x00;
 662
 663
 664                         pui32yuv[count++] = (y1 << 24) | (v << 16) | (y0 << 8) | u;
 665 @@ -115,19 +152,36 @@
 666
 667         psSyncData = psBuffer->psSyncData;
 668
 669 -
 670         if(psSyncData)
 671         {
 672 +
 673 +               if(psSyncData->ui32ReadOpsPending != psSyncData->ui32ReadOpsComplete)
 674 +               {
 675 +                       return -1;
 676 +               }
 677 +
 678 +
 679                 psSyncData->ui32WriteOpsPending++;
 680         }
 681
 682 -       if(psBufferInfo->pixelformat == PVRSRV_PIXEL_FORMAT_RGB565)
 683 -       {
 684 -               FillRGB565Image(psBuffer->sCPUVAddr, BC_EXAMPLE_WIDTH, BC_EXAMPLE_HEIGHT, BC_EXAMPLE_STRIDE);
 685 -       }
 686 -       else
 687 +       switch(psBufferInfo->pixelformat)
 688         {
 689 -               FillYUV422Image(psBuffer->sCPUVAddr, BC_EXAMPLE_WIDTH, BC_EXAMPLE_HEIGHT, BC_EXAMPLE_STRIDE);
 690 +               case PVRSRV_PIXEL_FORMAT_RGB565:
 691 +               default:
 692 +               {
 693 +                       FillRGB565Image(psBuffer->sCPUVAddr, BC_EXAMPLE_WIDTH, BC_EXAMPLE_HEIGHT, BC_EXAMPLE_STRIDE);
 694 +                       break;
 695 +               }
 696 +               case PVRSRV_PIXEL_FORMAT_YVYU:
 697 +               {
 698 +                       FillYUV422Image(psBuffer->sCPUVAddr, BC_EXAMPLE_WIDTH, BC_EXAMPLE_HEIGHT, BC_EXAMPLE_STRIDE);
 699 +                       break;
 700 +               }
 701 +               case PVRSRV_PIXEL_FORMAT_YUV420:
 702 +               {
 703 +                       FillYUV420Image(psBuffer->sCPUVAddr, BC_EXAMPLE_WIDTH, BC_EXAMPLE_HEIGHT, BC_EXAMPLE_STRIDE);
 704 +                       break;
 705 +               }
 706         }
 707
 708
 709 diff -Nurd git/drivers/gpu/pvr/services4/3rdparty/bufferclass_example/kbuild/Makefile git/drivers/gpu/pvr/services4/3rdparty/bufferclass_example/kbuild/Makefile
 710 --- git/drivers/gpu/pvr/services4/3rdparty/bufferclass_example/kbuild/Makefile  1970-01-01 01:00:00.000000000 +0100
 711 +++ git/drivers/gpu/pvr/services4/3rdparty/bufferclass_example/kbuild/Makefile  2008-12-18 15:47:29.000000000 +0100
 712 @@ -0,0 +1,40 @@
 713 +#
 714 +# Copyright(c) 2008 Imagination Technologies Ltd. All rights reserved.
 715 +#
 716 +# This program is free software; you can redistribute it and/or modify it
 717 +# under the terms and conditions of the GNU General Public License,
 718 +# version 2, as published by the Free Software Foundation.
 719 +#
 720 +# This program is distributed in the hope it will be useful but, except
 721 +# as otherwise stated in writing, without any warranty; without even the
 722 +# implied warranty of merchantability or fitness for a particular purpose.
 723 +# See the GNU General Public License for more details.
 724 +#
 725 +# You should have received a copy of the GNU General Public License along with
 726 +# this program; if not, write to the Free Software Foundation, Inc.,
 727 +# 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
 728 +#
 729 +# The full GNU General Public License is included in this distribution in
 730 +# the file called "COPYING".
 731 +#
 732 +# Contact Information:
 733 +# Imagination Technologies Ltd. <gpl-support@imgtec.com>
 734 +# Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
 735 +#
 736 +#
 737 +#
 738 +
 739 +MODULE         = bc_example
 740 +
 741 +INCLUDES =     -I$(EURASIAROOT)/include4 \
 742 +               -I$(EURASIAROOT)/services4/include \
 743 +               -I$(EURASIAROOT)/services4/system/$(PVR_SYSTEM) \
 744 +               -I$(EURASIAROOT)/services4/system/include \
 745 +
 746 +SOURCES =      ../bufferclass_example.c \
 747 +                       ../bufferclass_example_linux.c \
 748 +                       ../bufferclass_example_private.c
 749 +
 750 +
 751 +
 752 +
 753 diff -Nurd git/drivers/gpu/pvr/services4/3rdparty/dc_omap3430_linux/kbuild/Makefile git/drivers/gpu/pvr/services4/3rdparty/dc_omap3430_linux/kbuild/Makefile
 754 --- git/drivers/gpu/pvr/services4/3rdparty/dc_omap3430_linux/kbuild/Makefile    1970-01-01 01:00:00.000000000 +0100
 755 +++ git/drivers/gpu/pvr/services4/3rdparty/dc_omap3430_linux/kbuild/Makefile    2008-12-18 15:47:29.000000000 +0100
 756 @@ -0,0 +1,39 @@
 757 +#
 758 +# Copyright(c) 2008 Imagination Technologies Ltd. All rights reserved.
 759 +#
 760 +# This program is free software; you can redistribute it and/or modify it
 761 +# under the terms and conditions of the GNU General Public License,
 762 +# version 2, as published by the Free Software Foundation.
 763 +#
 764 +# This program is distributed in the hope it will be useful but, except
 765 +# as otherwise stated in writing, without any warranty; without even the
 766 +# implied warranty of merchantability or fitness for a particular purpose.
 767 +# See the GNU General Public License for more details.
 768 +#
 769 +# You should have received a copy of the GNU General Public License along with
 770 +# this program; if not, write to the Free Software Foundation, Inc.,
 771 +# 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
 772 +#
 773 +# The full GNU General Public License is included in this distribution in
 774 +# the file called "COPYING".
 775 +#
 776 +# Contact Information:
 777 +# Imagination Technologies Ltd. <gpl-support@imgtec.com>
 778 +# Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
 779 +#
 780 +#
 781 +#
 782 +
 783 +MODULE         = omaplfb
 784 +
 785 +INCLUDES =     -I$(EURASIAROOT)/include4 \
 786 +               -I$(EURASIAROOT)/services4/include \
 787 +               -I$(EURASIAROOT)/services4/system/$(PVR_SYSTEM) \
 788 +               -I$(EURASIAROOT)/services4/system/include \
 789 +
 790 +SOURCES        =       ../omaplfb_displayclass.c \
 791 +                       ../omaplfb_linux.c
 792 +
 793 +
 794 +
 795 +
 796 diff -Nurd git/drivers/gpu/pvr/services4/3rdparty/dc_omap3430_linux/omaplfb_displayclass.c git/drivers/gpu/pvr/services4/3rdparty/dc_omap3430_linux/omaplfb_displayclass.c
 797 --- git/drivers/gpu/pvr/services4/3rdparty/dc_omap3430_linux/omaplfb_displayclass.c     2009-01-05 20:00:44.000000000 +0100
 798 +++ git/drivers/gpu/pvr/services4/3rdparty/dc_omap3430_linux/omaplfb_displayclass.c     2008-12-18 15:47:29.000000000 +0100
 799 @@ -41,6 +41,7 @@
 800  #define DISPLAY_DEVICE_NAME "PowerVR OMAP Linux Display Driver"
 801
 802  #define        DRIVER_PREFIX   "omaplfb"
 803 +//extern int omap2_disp_get_output_dev(int);
 804
 805  static IMG_VOID *gpvAnchor;
 806
 807 @@ -57,8 +58,6 @@
 808                                                    PVR_POWER_STATE      eCurrentPowerState);
 809  #endif
 810
 811 -extern void omap_dispc_set_plane_base(int plane, IMG_UINT32 phys_addr);
 812 -
 813  static PFN_DC_GET_PVRJTABLE pfnGetPVRJTable = IMG_NULL;
 814
 815  static OMAPLFB_DEVINFO * GetAnchorPtr(IMG_VOID)
 816 @@ -124,28 +123,53 @@
 817  static PVRSRV_ERROR Flip(OMAPLFB_SWAPCHAIN *psSwapChain,
 818                                                   IMG_UINT32 aPhyAddr)
 819  {
 820 -       if (1 /* omap2_disp_get_output_dev(OMAP2_GRAPHICS) == OMAP2_OUTPUT_LCD */)
 821 +       IMG_UINT32 control;
 822 +       OMAPLFB_DEVINFO *psDevInfo;
 823 +
 824 +       psDevInfo = GetAnchorPtr();
 825 +
 826 +       if (1) //omap2_disp_get_output_dev(OMAP2_GRAPHICS) == OMAP2_OUTPUT_LCD)
 827         {
 828 -                omap_dispc_set_plane_base(0, aPhyAddr);
 829 +               OMAPLFBVSyncWriteReg(psSwapChain, OMAPLCD_GFX_BA0, aPhyAddr);
 830 +
 831 +               OMAPLFBVSyncWriteReg(psSwapChain, OMAPLCD_GFX_BA1, aPhyAddr);
 832 +
 833 +               control = OMAPLFBVSyncReadReg(psSwapChain, OMAPLCD_CONTROL);
 834 +               control |= OMAP_CONTROL_GOLCD;
 835 +               OMAPLFBVSyncWriteReg(psSwapChain, OMAPLCD_CONTROL, control);
 836 +
 837                 return PVRSRV_OK;
 838         }
 839         else
 840 -       if (0 /*omap2_disp_get_output_dev(OMAP2_GRAPHICS) == OMAP2_OUTPUT_TV*/)
 841 +       if (0) //omap2_disp_get_output_dev(OMAP2_GRAPHICS) == OMAP2_OUTPUT_TV)
 842         {
 843 -                omap_dispc_set_plane_base(0, aPhyAddr);
 844 +               OMAPLFBVSyncWriteReg(psSwapChain, OMAPLCD_GFX_BA0, aPhyAddr);
 845 +               OMAPLFBVSyncWriteReg(psSwapChain, OMAPLCD_GFX_BA1, aPhyAddr + psDevInfo->sFBInfo.ui32ByteStride);
 846 +
 847 +               control = OMAPLFBVSyncReadReg(psSwapChain, OMAPLCD_CONTROL);
 848 +               control |= OMAP_CONTROL_GODIGITAL;
 849 +               OMAPLFBVSyncWriteReg(psSwapChain, OMAPLCD_CONTROL, control);
 850 +
 851                 return PVRSRV_OK;
 852         }
 853 -
 854 +
 855         return PVRSRV_ERROR_INVALID_PARAMS;
 856  }
 857
 858  static IMG_VOID EnableVSyncInterrupt(OMAPLFB_SWAPCHAIN *psSwapChain)
 859  {
 860 -
 861 +
 862 +       IMG_UINT32 ui32InterruptEnable  = OMAPLFBVSyncReadReg(psSwapChain, OMAPLCD_IRQENABLE);
 863 +       ui32InterruptEnable |= OMAPLCD_INTMASK_VSYNC;
 864 +       OMAPLFBVSyncWriteReg(psSwapChain, OMAPLCD_IRQENABLE, ui32InterruptEnable );
 865  }
 866
 867  static IMG_VOID DisableVSyncInterrupt(OMAPLFB_SWAPCHAIN *psSwapChain)
 868  {
 869 +
 870 +       IMG_UINT32 ui32InterruptEnable = OMAPLFBVSyncReadReg(psSwapChain, OMAPLCD_IRQENABLE);
 871 +       ui32InterruptEnable &= ~(OMAPLCD_INTMASK_VSYNC);
 872 +       OMAPLFBVSyncWriteReg(psSwapChain, OMAPLCD_IRQENABLE, ui32InterruptEnable);
 873  }
 874
 875  static PVRSRV_ERROR OpenDCDevice(IMG_UINT32 ui32DeviceID,
 876 @@ -169,6 +193,7 @@
 877  #endif
 878         );
 879
 880 +
 881         memset(&psDevInfo->sLINNotifBlock, 0, sizeof(psDevInfo->sLINNotifBlock));
 882
 883         psDevInfo->sLINNotifBlock.notifier_call = FrameBufferEvents;
 884 @@ -363,6 +388,7 @@
 885         PVR_UNREFERENCED_PARAMETER(ui32OEMFlags);
 886         PVR_UNREFERENCED_PARAMETER(pui32SwapChainID);
 887
 888 +
 889         if(!hDevice
 890         || !psDstSurfAttrib
 891         || !psSrcSurfAttrib
 892 @@ -399,6 +425,7 @@
 893         || psDstSurfAttrib->sDims.ui32Width != psDevInfo->sDisplayDim.ui32Width
 894         || psDstSurfAttrib->sDims.ui32Height != psDevInfo->sDisplayDim.ui32Height)
 895         {
 896 +
 897                 return PVRSRV_ERROR_INVALID_PARAMS;
 898         }
 899
 900 @@ -407,6 +434,7 @@
 901         || psDstSurfAttrib->sDims.ui32Width != psSrcSurfAttrib->sDims.ui32Width
 902         || psDstSurfAttrib->sDims.ui32Height != psSrcSurfAttrib->sDims.ui32Height)
 903         {
 904 +
 905                 return PVRSRV_ERROR_INVALID_PARAMS;
 906         }
 907
 908 @@ -467,12 +495,21 @@
 909         }
 910
 911
 912 +       psSwapChain->pvRegs = ioremap(psDevInfo->psLINFBInfo->fix.mmio_start, psDevInfo->psLINFBInfo->fix.mmio_len);
 913 +
 914 +       if (psSwapChain->pvRegs == IMG_NULL)
 915 +       {
 916 +               printk(KERN_WARNING DRIVER_PREFIX ": Couldn't map registers needed for flipping\n");
 917 +               goto ErrorFreeVSyncItems;
 918 +       }
 919 +
 920 +
 921         unblank_display(psDevInfo);
 922
 923         if (OMAPLFBInstallVSyncISR(psSwapChain) != PVRSRV_OK)
 924         {
 925                 printk(KERN_WARNING DRIVER_PREFIX ": ISR handler failed to register\n");
 926 -               goto ErrorFreeVSyncItems;
 927 +               goto ErrorUnmapRegisters;
 928         }
 929
 930         EnableVSyncInterrupt(psSwapChain);
 931 @@ -485,6 +522,8 @@
 932
 933         return PVRSRV_OK;
 934
 935 +ErrorUnmapRegisters:
 936 +       iounmap(psSwapChain->pvRegs);
 937  ErrorFreeVSyncItems:
 938         OMAPLFBFreeKernelMem(psVSyncFlips);
 939  ErrorFreeBuffers:
 940 @@ -590,6 +629,9 @@
 941         }
 942
 943
 944 +       iounmap(psSwapChain->pvRegs);
 945 +
 946 +
 947         OMAPLFBFreeKernelMem(psSwapChain->psVSyncFlips);
 948         OMAPLFBFreeKernelMem(psSwapChain->psBuffer);
 949         OMAPLFBFreeKernelMem(psSwapChain);
 950 diff -Nurd git/drivers/gpu/pvr/services4/3rdparty/dc_omap3430_linux/omaplfb.h git/drivers/gpu/pvr/services4/3rdparty/dc_omap3430_linux/omaplfb.h
 951 --- git/drivers/gpu/pvr/services4/3rdparty/dc_omap3430_linux/omaplfb.h  2009-01-05 20:00:44.000000000 +0100
 952 +++ git/drivers/gpu/pvr/services4/3rdparty/dc_omap3430_linux/omaplfb.h  2008-12-18 15:47:29.000000000 +0100
 953 @@ -121,6 +121,9 @@
 954         IMG_UINT32 ui32RemoveIndex;
 955
 956
 957 +       IMG_VOID *pvRegs;
 958 +
 959 +
 960         PVRSRV_DC_DISP2SRV_KMJTABLE     *psPVRJTable;
 961  } OMAPLFB_SWAPCHAIN;
 962
 963 @@ -194,8 +197,8 @@
 964
 965  IMG_VOID *OMAPLFBAllocKernelMem(IMG_UINT32 ui32Size);
 966  IMG_VOID OMAPLFBFreeKernelMem(IMG_VOID *pvMem);
 967 -IMG_VOID OMAPLFBWriteReg(OMAPLFB_SWAPCHAIN *psSwapChain, IMG_UINT32 ui32Offset, IMG_UINT32 ui32Value);
 968 -IMG_UINT32 OMAPLFBReadReg(OMAPLFB_SWAPCHAIN *psSwapChain, IMG_UINT32 ui32Offset);
 969 +IMG_VOID OMAPLFBVSyncWriteReg(OMAPLFB_SWAPCHAIN *psSwapChain, IMG_UINT32 ui32Offset, IMG_UINT32 ui32Value);
 970 +IMG_UINT32 OMAPLFBVSyncReadReg(OMAPLFB_SWAPCHAIN *psSwapChain, IMG_UINT32 ui32Offset);
 971  PVRSRV_ERROR OMAPLFBGetLibFuncAddr(IMG_CHAR *szFunctionName, PFN_DC_GET_PVRJTABLE *ppfnFuncTable);
 972  PVRSRV_ERROR OMAPLFBInstallVSyncISR (OMAPLFB_SWAPCHAIN *psSwapChain);
 973  PVRSRV_ERROR OMAPLFBUninstallVSyncISR(OMAPLFB_SWAPCHAIN *psSwapChain);
 974 diff -Nurd git/drivers/gpu/pvr/services4/3rdparty/dc_omap3430_linux/omaplfb_linux.c git/drivers/gpu/pvr/services4/3rdparty/dc_omap3430_linux/omaplfb_linux.c
 975 --- git/drivers/gpu/pvr/services4/3rdparty/dc_omap3430_linux/omaplfb_linux.c    2009-01-05 20:00:44.000000000 +0100
 976 +++ git/drivers/gpu/pvr/services4/3rdparty/dc_omap3430_linux/omaplfb_linux.c    2008-12-18 15:47:29.000000000 +0100
 977 @@ -101,28 +100,57 @@
 978  }
 979
 980  static void
 981 -OMAPLFBVSyncISR(void *arg)
 982 +OMAPLFBVSyncISR(void *arg, struct pt_regs *regs)
 983  {
 984 -       (void) OMAPLFBVSyncIHandler((OMAPLFB_SWAPCHAIN *)arg);
 985 +       OMAPLFB_SWAPCHAIN *psSwapChain= (OMAPLFB_SWAPCHAIN *)arg;
 986 +
 987 +       (void) OMAPLFBVSyncIHandler(psSwapChain);
 988  }
 989
 990 -#define DISPC_IRQ_VSYNC 0x0002
 991 -
 992  PVRSRV_ERROR OMAPLFBInstallVSyncISR(OMAPLFB_SWAPCHAIN *psSwapChain)
 993  {
 994
 995 -        if (omap_dispc_request_irq(DISPC_IRQ_VSYNC, OMAPLFBVSyncISR, psSwapChain) != 0)
 996 -            return PVRSRV_ERROR_OUT_OF_MEMORY; /* not worth a proper mapping */
 997 -
 998 +       if (1) //omap2_disp_get_output_dev(OMAP2_GRAPHICS) == OMAP2_OUTPUT_LCD)
 999 +        {
1000 +               if (omap_dispc_request_irq(DISPC_IRQ_VSYNC, OMAPLFBVSyncISR,
1001 +                                       psSwapChain) != 0)
1002 +               {
1003 +                       printk("request OMAPLCD IRQ failed");
1004 +                       return PVRSRV_ERROR_INIT_FAILURE;
1005 +               }
1006 +       }
1007 +       else
1008 +       if (0) //omap2_disp_get_output_dev(OMAP2_GRAPHICS) == OMAP2_OUTPUT_TV)
1009 +       {
1010 +               if (omap_dispc_request_irq(DISPC_IRQSTATUS_EVSYNC_EVEN|DISPC_IRQSTATUS_EVSYNC_ODD, OMAPLFBVSyncISR, psSwapChain) != 0)
1011 +               {
1012 +                       printk("request OMAPLCD IRQ failed");
1013 +                       return PVRSRV_ERROR_INIT_FAILURE;
1014 +               }
1015 +       }
1016 +
1017         return PVRSRV_OK;
1018  }
1019
1020
1021  PVRSRV_ERROR OMAPLFBUninstallVSyncISR (OMAPLFB_SWAPCHAIN *psSwapChain)
1022  {
1023 -        omap_dispc_free_irq(DISPC_IRQ_VSYNC, OMAPLFBVSyncISR, psSwapChain);
1024 +       omap_dispc_free_irq(DISPC_IRQ_VSYNC, OMAPLFBVSyncISR, psSwapChain);
1025 +
1026 +       return PVRSRV_OK;
1027 +}
1028
1029 -       return PVRSRV_OK;
1030 +IMG_VOID OMAPLFBVSyncWriteReg(OMAPLFB_SWAPCHAIN *psSwapChain, IMG_UINT32 ui32Offset, IMG_UINT32 ui32Value)
1031 +{
1032 +       IMG_VOID *pvRegAddr = (IMG_VOID *)((IMG_UINT8 *)psSwapChain->pvRegs + ui32Offset);
1033 +
1034 +
1035 +       writel(ui32Value, pvRegAddr);
1036 +}
1037 +
1038 +IMG_UINT32 OMAPLFBVSyncReadReg(OMAPLFB_SWAPCHAIN *psSwapChain, IMG_UINT32 ui32Offset)
1039 +{
1040 +       return readl((IMG_UINT8 *)psSwapChain->pvRegs + ui32Offset);
1041  }
1042
1043  module_init(OMAPLFB_Init);
1044 diff -Nurd git/drivers/gpu/pvr/services4/include/pvr_bridge.h git/drivers/gpu/pvr/services4/include/pvr_bridge.h
1045 --- git/drivers/gpu/pvr/services4/include/pvr_bridge.h  2009-01-05 20:00:44.000000000 +0100
1046 +++ git/drivers/gpu/pvr/services4/include/pvr_bridge.h  2008-12-18 15:47:29.000000000 +0100
1047 @@ -202,14 +202,14 @@
1048
1049  #define PVRSRV_BRIDGE_EVENT_OBJECT_CMD_FIRST   (PVRSRV_BRIDGE_INITSRV_CMD_LAST+1)
1050  #define PVRSRV_BRIDGE_EVENT_OBJECT_WAIT                        PVRSRV_IOWR(PVRSRV_BRIDGE_EVENT_OBJECT_CMD_FIRST+0)
1051 -#define PVRSRV_BRIDGE_EVENT_OBJECT_CONNECT             PVRSRV_IOWR(PVRSRV_BRIDGE_EVENT_OBJECT_CMD_FIRST+1)
1052 -#define PVRSRV_BRIDGE_EVENT_OBJECT_DISCONNECT  PVRSRV_IOWR(PVRSRV_BRIDGE_EVENT_OBJECT_CMD_FIRST+2)
1053 +#define PVRSRV_BRIDGE_EVENT_OBJECT_OPEN                        PVRSRV_IOWR(PVRSRV_BRIDGE_EVENT_OBJECT_CMD_FIRST+1)
1054 +#define PVRSRV_BRIDGE_EVENT_OBJECT_CLOSE               PVRSRV_IOWR(PVRSRV_BRIDGE_EVENT_OBJECT_CMD_FIRST+2)
1055  #define PVRSRV_BRIDGE_EVENT_OBJECT_CMD_LAST            (PVRSRV_BRIDGE_EVENT_OBJECT_CMD_FIRST+2)
1056
1057  #define PVRSRV_BRIDGE_LAST_NON_DEVICE_CMD              (PVRSRV_BRIDGE_EVENT_OBJECT_CMD_LAST+1)
1058
1059
1060 -#define PVRSRV_KERNAL_MODE_CLIENT                              1
1061 +#define PVRSRV_KERNEL_MODE_CLIENT                              1
1062
1063  typedef struct PVRSRV_BRIDGE_RETURN_TAG
1064  {
1065 @@ -716,7 +716,7 @@
1066  typedef struct PVRSRV_BRIDGE_IN_PDUMP_DUMPPDDEVPADDR_TAG
1067  {
1068         IMG_UINT32 ui32BridgeFlags;
1069 -       IMG_HANDLE *hKernelMemInfo;
1070 +       IMG_HANDLE hKernelMemInfo;
1071         IMG_UINT32 ui32Offset;
1072         IMG_DEV_PHYADDR sPDDevPAddr;
1073  }PVRSRV_BRIDGE_IN_PDUMP_DUMPPDDEVPADDR;
1074 @@ -1302,9 +1302,25 @@
1075  {
1076         IMG_UINT32 ui32BridgeFlags;
1077         IMG_HANDLE      hOSEventKM;
1078 -       IMG_UINT32  ui32MSTimeout;
1079  } PVRSRV_BRIDGE_IN_EVENT_OBJECT_WAIT;
1080
1081 +typedef struct PVRSRV_BRIDGE_IN_EVENT_OBJECT_OPEN_TAG
1082 +{
1083 +       PVRSRV_EVENTOBJECT sEventObject;
1084 +} PVRSRV_BRIDGE_IN_EVENT_OBJECT_OPEN;
1085 +
1086 +typedef struct PVRSRV_BRIDGE_OUT_EVENT_OBJECT_OPEN_TAG
1087 +{
1088 +       IMG_HANDLE hOSEvent;
1089 +       PVRSRV_ERROR eError;
1090 +} PVRSRV_BRIDGE_OUT_EVENT_OBJECT_OPEN;
1091 +
1092 +typedef struct PVRSRV_BRIDGE_IN_EVENT_OBJECT_CLOSE_TAG
1093 +{
1094 +       PVRSRV_EVENTOBJECT sEventObject;
1095 +       IMG_HANDLE hOSEventKM;
1096 +} PVRSRV_BRIDGE_IN_EVENT_OBJECT_CLOSE;
1097 +
1098  #if defined (__cplusplus)
1099  }
1100  #endif
1101 diff -Nurd git/drivers/gpu/pvr/services4/include/servicesint.h git/drivers/gpu/pvr/services4/include/servicesint.h
1102 --- git/drivers/gpu/pvr/services4/include/servicesint.h 2009-01-05 20:00:44.000000000 +0100
1103 +++ git/drivers/gpu/pvr/services4/include/servicesint.h 2008-12-18 15:47:29.000000000 +0100
1104 @@ -38,16 +38,6 @@
1105
1106  #define DRIVERNAME_MAXLENGTH   (100)
1107
1108 -#define EVENTOBJNAME_MAXLENGTH (50)
1109 -
1110 -
1111 -typedef struct _PVRSRV_EVENTOBJECT_
1112 -{
1113 -
1114 -       IMG_CHAR        szName[EVENTOBJNAME_MAXLENGTH];
1115 -
1116 -       IMG_HANDLE      hOSEventKM;
1117 -} PVRSRV_EVENTOBJECT;
1118
1119
1120  typedef struct _PVRSRV_KERNEL_MEM_INFO_
1121 @@ -93,6 +83,13 @@
1122
1123  } PVRSRV_KERNEL_SYNC_INFO;
1124
1125 +typedef struct _PVRSRV_DEVICE_SYNC_OBJECT_
1126 +{
1127 +       IMG_UINT32                      ui32ReadOpPendingVal;
1128 +       IMG_DEV_VIRTADDR        sReadOpsCompleteDevVAddr;
1129 +       IMG_UINT32                      ui32WriteOpPendingVal;
1130 +       IMG_DEV_VIRTADDR        sWriteOpsCompleteDevVAddr;
1131 +} PVRSRV_DEVICE_SYNC_OBJECT;
1132
1133  typedef struct _PVRSRV_SYNC_OBJECT
1134  {
1135 diff -Nurd git/drivers/gpu/pvr/services4/include/sgx_bridge.h git/drivers/gpu/pvr/services4/include/sgx_bridge.h
1136 --- git/drivers/gpu/pvr/services4/include/sgx_bridge.h  2009-01-05 20:00:44.000000000 +0100
1137 +++ git/drivers/gpu/pvr/services4/include/sgx_bridge.h  2008-12-18 15:47:29.000000000 +0100
1138 @@ -70,8 +70,16 @@
1139  #define PVRSRV_BRIDGE_SGX_REGISTER_HW_RENDER_CONTEXT   PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+20)
1140  #define PVRSRV_BRIDGE_SGX_FLUSH_HW_RENDER_TARGET       PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+21)
1141  #define PVRSRV_BRIDGE_SGX_UNREGISTER_HW_RENDER_CONTEXT PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+22)
1142 +#if defined(SGX_FEATURE_2D_HARDWARE)
1143 +#define PVRSRV_BRIDGE_SGX_SUBMIT2D                                     PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+23)
1144 +#define PVRSRV_BRIDGE_SGX_REGISTER_HW_2D_CONTEXT       PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+24)
1145 +#define PVRSRV_BRIDGE_SGX_UNREGISTER_HW_2D_CONTEXT     PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+25)
1146 +#endif
1147 +#define PVRSRV_BRIDGE_SGX_REGISTER_HW_TRANSFER_CONTEXT PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+26)
1148 +#define PVRSRV_BRIDGE_SGX_UNREGISTER_HW_TRANSFER_CONTEXT       PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+27)
1149 +#define PVRSRV_BRIDGE_SGX_READ_HWPERF_COUNTERS         PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+28)
1150
1151 -#define PVRSRV_BRIDGE_LAST_SGX_CMD (PVRSRV_BRIDGE_SGX_CMD_BASE+22)
1152 +#define PVRSRV_BRIDGE_LAST_SGX_CMD (PVRSRV_BRIDGE_SGX_CMD_BASE+28)
1153
1154
1155  typedef struct PVRSRV_BRIDGE_IN_GETPHYSPAGEADDR
1156 @@ -161,8 +169,18 @@
1157  {
1158         IMG_UINT32                              ui32BridgeFlags;
1159         IMG_HANDLE                              hDevCookie;
1160 -       IMG_DEV_VIRTADDR                sHWRenderContextDevVAddr;
1161 +       PVRSRV_TRANSFER_SGX_KICK                        sKick;
1162  }PVRSRV_BRIDGE_IN_SUBMITTRANSFER;
1163 +
1164 +#if defined(SGX_FEATURE_2D_HARDWARE)
1165 +
1166 +typedef struct PVRSRV_BRIDGE_IN_SUBMIT2D_TAG
1167 +{
1168 +       IMG_UINT32                              ui32BridgeFlags;
1169 +       IMG_HANDLE                              hDevCookie;
1170 +       PVRSRV_2D_SGX_KICK                              sKick;
1171 +} PVRSRV_BRIDGE_IN_SUBMIT2D;
1172 +#endif
1173  #endif
1174
1175
1176 @@ -330,6 +348,33 @@
1177         IMG_HANDLE hHWRenderContext;
1178  }PVRSRV_BRIDGE_OUT_SGX_REGISTER_HW_RENDER_CONTEXT;
1179
1180 +typedef struct PVRSRV_BRIDGE_IN_SGX_UNREGISTER_HW_RENDER_CONTEXT_TAG
1181 +{
1182 +       IMG_UINT32 ui32BridgeFlags;
1183 +       IMG_HANDLE hDevCookie;
1184 +       IMG_HANDLE hHWRenderContext;
1185 +}PVRSRV_BRIDGE_IN_SGX_UNREGISTER_HW_RENDER_CONTEXT;
1186 +
1187 +typedef struct PVRSRV_BRIDGE_IN_SGX_REGISTER_HW_TRANSFER_CONTEXT_TAG
1188 +{
1189 +       IMG_UINT32 ui32BridgeFlags;
1190 +       IMG_HANDLE hDevCookie;
1191 +       IMG_DEV_VIRTADDR sHWTransferContextDevVAddr;
1192 +}PVRSRV_BRIDGE_IN_SGX_REGISTER_HW_TRANSFER_CONTEXT;
1193 +
1194 +typedef struct PVRSRV_BRIDGE_OUT_SGX_REGISTER_HW_TRANSFER_CONTEXT_TAG
1195 +{
1196 +       PVRSRV_ERROR eError;
1197 +       IMG_HANDLE hHWTransferContext;
1198 +}PVRSRV_BRIDGE_OUT_SGX_REGISTER_HW_TRANSFER_CONTEXT;
1199 +
1200 +typedef struct PVRSRV_BRIDGE_IN_SGX_UNREGISTER_HW_TRANSFER_CONTEXT_TAG
1201 +{
1202 +       IMG_UINT32 ui32BridgeFlags;
1203 +       IMG_HANDLE hDevCookie;
1204 +       IMG_HANDLE hHWTransferContext;
1205 +}PVRSRV_BRIDGE_IN_SGX_UNREGISTER_HW_TRANSFER_CONTEXT;
1206 +
1207  typedef struct PVRSRV_BRIDGE_IN_SGX_FLUSH_HW_RENDER_TARGET_TAG
1208  {
1209         IMG_UINT32 ui32BridgeFlags;
1210 @@ -337,18 +382,54 @@
1211         IMG_DEV_VIRTADDR sHWRTDataSetDevVAddr;
1212  }PVRSRV_BRIDGE_IN_SGX_FLUSH_HW_RENDER_TARGET;
1213
1214 -typedef struct PVRSRV_BRIDGE_IN_SGX_UNREGISTER_HW_RENDER_CONTEXT_TAG
1215 +
1216 +#if defined(SGX_FEATURE_2D_HARDWARE)
1217 +typedef struct PVRSRV_BRIDGE_IN_SGX_REGISTER_HW_2D_CONTEXT_TAG
1218  {
1219         IMG_UINT32 ui32BridgeFlags;
1220         IMG_HANDLE hDevCookie;
1221 -       IMG_HANDLE hHWRenderContext;
1222 -}PVRSRV_BRIDGE_IN_SGX_UNREGISTER_HW_RENDER_CONTEXT;
1223 +       IMG_DEV_VIRTADDR sHW2DContextDevVAddr;
1224 +}PVRSRV_BRIDGE_IN_SGX_REGISTER_HW_2D_CONTEXT;
1225 +
1226 +typedef struct PVRSRV_BRIDGE_OUT_SGX_REGISTER_HW_2D_CONTEXT_TAG
1227 +{
1228 +       PVRSRV_ERROR eError;
1229 +       IMG_HANDLE hHW2DContext;
1230 +}PVRSRV_BRIDGE_OUT_SGX_REGISTER_HW_2D_CONTEXT;
1231 +
1232 +typedef struct PVRSRV_BRIDGE_IN_SGX_UNREGISTER_HW_2D_CONTEXT_TAG
1233 +{
1234 +       IMG_UINT32 ui32BridgeFlags;
1235 +       IMG_HANDLE hDevCookie;
1236 +       IMG_HANDLE hHW2DContext;
1237 +}PVRSRV_BRIDGE_IN_SGX_UNREGISTER_HW_2D_CONTEXT;
1238
1239 -
1240 -#if defined(SGX_FEATURE_2D_HARDWARE)
1241  #define        SGX2D_MAX_BLT_CMD_SIZ           256
1242  #endif
1243
1244 +
1245 +typedef struct PVRSRV_BRIDGE_IN_SGX_READ_HWPERF_COUNTERS_TAG
1246 +{
1247 +       IMG_UINT32              ui32BridgeFlags;
1248 +       IMG_HANDLE              hDevCookie;
1249 +       IMG_UINT32              ui32PerfReg;
1250 +       IMG_BOOL                bNewPerf;
1251 +       IMG_UINT32              ui32NewPerf;
1252 +       IMG_UINT32              ui32NewPerfReset;
1253 +       IMG_UINT32              ui32PerfCountersReg;
1254 +} PVRSRV_BRIDGE_IN_SGX_READ_HWPERF_COUNTERS;
1255 +
1256 +typedef struct PVRSRV_BRIDGE_OUT_SGX_READ_HWPERF_COUNTERS_TAG
1257 +{
1258 +       PVRSRV_ERROR    eError;
1259 +       IMG_UINT32              ui32OldPerf;
1260 +       IMG_UINT32              aui32Counters[PVRSRV_SGX_HWPERF_NUM_COUNTERS];
1261 +       IMG_UINT32              ui32KickTACounter;
1262 +       IMG_UINT32              ui32KickTARenderCounter;
1263 +       IMG_UINT32              ui32CPUTime;
1264 +       IMG_UINT32              ui32SGXTime;
1265 +} PVRSRV_BRIDGE_OUT_SGX_READ_HWPERF_COUNTERS;
1266 +
1267  #if defined (__cplusplus)
1268  }
1269  #endif
1270 diff -Nurd git/drivers/gpu/pvr/services4/include/sgx_bridge_km.h git/drivers/gpu/pvr/services4/include/sgx_bridge_km.h
1271 --- git/drivers/gpu/pvr/services4/include/sgx_bridge_km.h       2009-01-05 20:00:44.000000000 +0100
1272 +++ git/drivers/gpu/pvr/services4/include/sgx_bridge_km.h       1970-01-01 01:00:00.000000000 +0100
1273 @@ -1,139 +0,0 @@
1274 -/**********************************************************************
1275 - *
1276 - * Copyright(c) 2008 Imagination Technologies Ltd. All rights reserved.
1277 - *
1278 - * This program is free software; you can redistribute it and/or modify it
1279 - * under the terms and conditions of the GNU General Public License,
1280 - * version 2, as published by the Free Software Foundation.
1281 - *
1282 - * This program is distributed in the hope it will be useful but, except
1283 - * as otherwise stated in writing, without any warranty; without even the
1284 - * implied warranty of merchantability or fitness for a particular purpose.
1285 - * See the GNU General Public License for more details.
1286 - *
1287 - * You should have received a copy of the GNU General Public License along with
1288 - * this program; if not, write to the Free Software Foundation, Inc.,
1289 - * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
1290 - *
1291 - * The full GNU General Public License is included in this distribution in
1292 - * the file called "COPYING".
1293 - *
1294 - * Contact Information:
1295 - * Imagination Technologies Ltd. <gpl-support@imgtec.com>
1296 - * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
1297 - *
1298 - ******************************************************************************/
1299 -
1300 -#if !defined(__SGX_BRIDGE_KM_H__)
1301 -#define __SGX_BRIDGE_KM_H__
1302 -
1303 -#include "sgxapi_km.h"
1304 -#include "sgxinfo.h"
1305 -#include "sgxinfokm.h"
1306 -#include "sgx_bridge.h"
1307 -#include "pvr_bridge.h"
1308 -#include "perproc.h"
1309 -
1310 -#if defined (__cplusplus)
1311 -extern "C" {
1312 -#endif
1313 -
1314 -IMG_IMPORT
1315 -PVRSRV_ERROR SGXSubmitTransferKM(IMG_HANDLE hDevHandle,
1316 -                                                                IMG_DEV_VIRTADDR sHWRenderContextDevVAddr);
1317 -
1318 -IMG_IMPORT
1319 -PVRSRV_ERROR SGXDoKickKM(IMG_HANDLE hDevHandle,
1320 -                                                PVR3DIF4_CCB_KICK *psCCBKick);
1321 -
1322 -IMG_IMPORT
1323 -PVRSRV_ERROR SGXGetPhysPageAddrKM(IMG_HANDLE hDevMemHeap,
1324 -                                                                 IMG_DEV_VIRTADDR sDevVAddr,
1325 -                                                                 IMG_DEV_PHYADDR *pDevPAddr,
1326 -                                                                 IMG_CPU_PHYADDR *pCpuPAddr);
1327 -
1328 -IMG_IMPORT
1329 -PVRSRV_ERROR IMG_CALLCONV SGXGetMMUPDAddrKM(IMG_HANDLE         hDevCookie,
1330 -                                                                                       IMG_HANDLE              hDevMemContext,
1331 -                                                                                       IMG_DEV_PHYADDR *psPDDevPAddr);
1332 -
1333 -IMG_IMPORT
1334 -PVRSRV_ERROR SGXGetClientInfoKM(IMG_HANDLE                             hDevCookie,
1335 -                                                               PVR3DIF4_CLIENT_INFO*   psClientInfo);
1336 -
1337 -IMG_IMPORT
1338 -PVRSRV_ERROR SGXGetMiscInfoKM(PVRSRV_SGXDEV_INFO       *psDevInfo,
1339 -                                                         SGX_MISC_INFO                 *psMiscInfo);
1340 -
1341 -#if defined(SGX_FEATURE_2D_HARDWARE)
1342 -IMG_IMPORT
1343 -PVRSRV_ERROR SGX2DQueueBlitKM(PVRSRV_SGXDEV_INFO               *psDevInfo,
1344 -                                                         PVRSRV_KERNEL_SYNC_INFO       *psDstSync,
1345 -                                                         IMG_UINT32            ui32NumSrcSyncs,
1346 -                                                         PVRSRV_KERNEL_SYNC_INFO *apsSrcSync[],
1347 -                                                         IMG_UINT32            ui32DataByteSize,
1348 -                                                         IMG_UINT32            *pui32BltData);
1349 -
1350 -#if defined(SGX2D_DIRECT_BLITS)
1351 -IMG_IMPORT
1352 -PVRSRV_ERROR SGX2DDirectBlitKM(PVRSRV_SGXDEV_INFO      *psDevInfo,
1353 -                                                          IMG_UINT32                   ui32DataByteSize,
1354 -                                                          IMG_UINT32                   *pui32BltData);
1355 -#endif
1356 -#endif
1357 -
1358 -#if defined(SGX_FEATURE_2D_HARDWARE) || defined(PVR2D_ALT_2DHW)
1359 -IMG_IMPORT
1360 -PVRSRV_ERROR SGX2DQueryBlitsCompleteKM(PVRSRV_SGXDEV_INFO              *psDevInfo,
1361 -                                                                          PVRSRV_KERNEL_SYNC_INFO      *psSyncInfo,
1362 -                                                                          IMG_BOOL bWaitForComplete);
1363 -#endif
1364 -
1365 -IMG_IMPORT
1366 -PVRSRV_ERROR SGXGetInfoForSrvinitKM(IMG_HANDLE hDevHandle,
1367 -                                                                       SGX_BRIDGE_INFO_FOR_SRVINIT *psInitInfo);
1368 -
1369 -IMG_IMPORT
1370 -PVRSRV_ERROR DevInitSGXPart2KM(PVRSRV_PER_PROCESS_DATA *psPerProc,
1371 -                                                          IMG_HANDLE hDevHandle,
1372 -                                                          SGX_BRIDGE_INIT_INFO *psInitInfo);
1373 -
1374 -IMG_IMPORT PVRSRV_ERROR
1375 -SGXFindSharedPBDescKM(IMG_HANDLE hDevCookie,
1376 -                                         IMG_UINT32 ui32TotalPBSize,
1377 -                                         IMG_HANDLE *phSharedPBDesc,
1378 -                                         PVRSRV_KERNEL_MEM_INFO **ppsSharedPBDescKernelMemInfo,
1379 -                                         PVRSRV_KERNEL_MEM_INFO **ppsHWPBDescKernelMemInfo,
1380 -                                         PVRSRV_KERNEL_MEM_INFO **ppsBlockKernelMemInfo,
1381 -                                         PVRSRV_KERNEL_MEM_INFO ***pppsSharedPBDescSubKernelMemInfos,
1382 -                                         IMG_UINT32 *ui32SharedPBDescSubKernelMemInfosCount);
1383 -
1384 -IMG_IMPORT PVRSRV_ERROR
1385 -SGXUnrefSharedPBDescKM(IMG_HANDLE hSharedPBDesc);
1386 -
1387 -IMG_IMPORT PVRSRV_ERROR
1388 -SGXAddSharedPBDescKM(IMG_HANDLE hDevCookie,
1389 -                                        PVRSRV_KERNEL_MEM_INFO *psSharedPBDescKernelMemInfo,
1390 -                                        PVRSRV_KERNEL_MEM_INFO *psHWPBDescKernelMemInfo,
1391 -                                        PVRSRV_KERNEL_MEM_INFO *psBlockKernelMemInfo,
1392 -                                        IMG_UINT32 ui32TotalPBSize,
1393 -                                        IMG_HANDLE *phSharedPBDesc,
1394 -                                        PVRSRV_KERNEL_MEM_INFO **psSharedPBDescSubKernelMemInfos,
1395 -                                        IMG_UINT32 ui32SharedPBDescSubKernelMemInfosCount);
1396 -
1397 -
1398 -IMG_IMPORT PVRSRV_ERROR
1399 -SGXGetInternalDevInfoKM(IMG_HANDLE hDevCookie,
1400 -                                               PVR3DIF4_INTERNAL_DEVINFO *psSGXInternalDevInfo);
1401 -
1402 -
1403 -#if defined(SGX_FEATURE_2D_HARDWARE)
1404 -#define        SGX2D_MAX_BLT_CMD_SIZ           256
1405 -#endif
1406 -
1407 -#if defined (__cplusplus)
1408 -}
1409 -#endif
1410 -
1411 -#endif
1412 -
1413 diff -Nurd git/drivers/gpu/pvr/services4/include/sgxinfo.h git/drivers/gpu/pvr/services4/include/sgxinfo.h
1414 --- git/drivers/gpu/pvr/services4/include/sgxinfo.h     2009-01-05 20:00:44.000000000 +0100
1415 +++ git/drivers/gpu/pvr/services4/include/sgxinfo.h     2008-12-18 15:47:29.000000000 +0100
1416 @@ -59,11 +59,16 @@
1417  #if defined(SGX_SUPPORT_HWPROFILING)
1418         IMG_HANDLE      hKernelHWProfilingMemInfo;
1419  #endif
1420 +#if defined(SUPPORT_SGX_HWPERF)
1421 +       IMG_HANDLE      hKernelHWPerfCBMemInfo;
1422 +#endif
1423
1424         IMG_UINT32 ui32EDMTaskReg0;
1425         IMG_UINT32 ui32EDMTaskReg1;
1426
1427 -       IMG_UINT32 ui32ClockGateMask;
1428 +       IMG_UINT32 ui32ClkGateCtl;
1429 +       IMG_UINT32 ui32ClkGateCtl2;
1430 +       IMG_UINT32 ui32ClkGateStatusMask;
1431
1432         IMG_UINT32 ui32CacheControl;
1433
1434 @@ -111,11 +116,13 @@
1435  #define PVRSRV_CCBFLAGS_RASTERCMD                      0x1
1436  #define PVRSRV_CCBFLAGS_TRANSFERCMD                    0x2
1437  #define PVRSRV_CCBFLAGS_PROCESS_QUEUESCMD      0x3
1438 +#if defined(SGX_FEATURE_2D_HARDWARE)
1439 +#define PVRSRV_CCBFLAGS_2DCMD                          0x4
1440 +#endif
1441
1442  #define PVRSRV_KICKFLAG_RENDER                         0x1
1443  #define PVRSRV_KICKFLAG_PIXEL                          0x2
1444
1445 -
1446  #define        SGX_BIF_INVALIDATE_PTCACHE      0x1
1447  #define        SGX_BIF_INVALIDATE_PDCACHE      0x2
1448
1449 @@ -125,25 +132,40 @@
1450         PVRSRV_SGX_COMMAND_TYPE         eCommand;
1451         PVRSRV_SGX_COMMAND              sCommand;
1452         IMG_HANDLE                      hCCBKernelMemInfo;
1453 -       IMG_HANDLE                      hDstKernelSyncInfo;
1454 -       IMG_UINT32                      ui32DstReadOpsPendingOffset;
1455 -       IMG_UINT32                      ui32DstWriteOpsPendingOffset;
1456 +       IMG_HANDLE      hRenderSurfSyncInfo;
1457 +
1458         IMG_UINT32      ui32NumTAStatusVals;
1459 -       IMG_UINT32      aui32TAStatusValueOffset[SGX_MAX_TA_STATUS_VALS];
1460         IMG_HANDLE      ahTAStatusSyncInfo[SGX_MAX_TA_STATUS_VALS];
1461
1462         IMG_UINT32      ui32Num3DStatusVals;
1463 -       IMG_UINT32      aui323DStatusValueOffset[SGX_MAX_3D_STATUS_VALS];
1464         IMG_HANDLE      ah3DStatusSyncInfo[SGX_MAX_3D_STATUS_VALS];
1465 -#ifdef NO_HARDWARE
1466 -       IMG_BOOL        bTerminate;
1467 -       IMG_HANDLE      hUpdateDstKernelSyncInfo;
1468 +
1469 +       IMG_BOOL        bFirstKickOrResume;
1470 +#if (defined(NO_HARDWARE) || defined(PDUMP))
1471 +       IMG_BOOL        bTerminateOrAbort;
1472 +#endif
1473 +       IMG_UINT32      ui32KickFlags;
1474 +
1475 +
1476 +       IMG_UINT32      ui32CCBOffset;
1477 +
1478 +
1479 +       IMG_UINT32      ui32NumSrcSyncs;
1480 +       IMG_HANDLE      ahSrcKernelSyncInfo[SGX_MAX_SRC_SYNCS];
1481 +
1482 +
1483 +       IMG_BOOL        bTADependency;
1484 +       IMG_HANDLE      hTA3DSyncInfo;
1485 +
1486 +       IMG_HANDLE      hTASyncInfo;
1487 +       IMG_HANDLE      h3DSyncInfo;
1488 +#if defined(NO_HARDWARE)
1489         IMG_UINT32      ui32WriteOpsPendingVal;
1490  #endif
1491 -       IMG_UINT32                                      ui32KickFlags;
1492  } PVR3DIF4_CCB_KICK;
1493
1494
1495 +
1496  typedef struct _PVRSRV_SGX_HOST_CTL_
1497  {
1498
1499 @@ -158,163 +180,25 @@
1500         IMG_UINT32                              ui32ResManFlags;
1501         IMG_DEV_VIRTADDR                sResManCleanupData;
1502
1503 +
1504         IMG_DEV_VIRTADDR                sTAHWPBDesc;
1505         IMG_DEV_VIRTADDR                s3DHWPBDesc;
1506 +       IMG_DEV_VIRTADDR                sHostHWPBDesc;
1507
1508 -} PVRSRV_SGX_HOST_CTL;
1509 -
1510 -
1511 -#if defined(SUPPORT_HW_RECOVERY)
1512 -typedef struct _SGX_INIT_SCRIPT_DATA
1513 -{
1514 -       IMG_UINT32 asHWRecoveryData[SGX_MAX_DEV_DATA];
1515 -} SGX_INIT_SCRIPT_DATA;
1516 -#endif
1517 -
1518 -typedef struct _PVRSRV_SGXDEV_INFO_
1519 -{
1520 -       PVRSRV_DEVICE_TYPE              eDeviceType;
1521 -       PVRSRV_DEVICE_CLASS             eDeviceClass;
1522 -
1523 -       IMG_UINT8                               ui8VersionMajor;
1524 -       IMG_UINT8                               ui8VersionMinor;
1525 -       IMG_UINT32                              ui32CoreConfig;
1526 -       IMG_UINT32                              ui32CoreFlags;
1527 -
1528 -
1529 -       IMG_PVOID                               pvRegsBaseKM;
1530 -
1531 -
1532 -
1533 -       IMG_HANDLE                              hRegMapping;
1534 -
1535 -
1536 -       IMG_SYS_PHYADDR                 sRegsPhysBase;
1537 -
1538 -       IMG_UINT32                              ui32RegSize;
1539 -
1540 -
1541 -       IMG_UINT32                              ui32CoreClockSpeed;
1542 -
1543 -#if defined(SGX_FEATURE_2D_HARDWARE)
1544 -
1545 -       SGX_SLAVE_PORT                  s2DSlavePortKM;
1546 -
1547 -
1548 -       PVRSRV_RESOURCE                 s2DSlaveportResource;
1549 -
1550 -
1551 -       IMG_UINT32                      ui322DFifoSize;
1552 -       IMG_UINT32                      ui322DFifoOffset;
1553 -
1554 -       IMG_HANDLE                      h2DCmdCookie;
1555 -
1556 -       IMG_HANDLE                      h2DQueue;
1557 -       IMG_BOOL                        b2DHWRecoveryInProgress;
1558 -       IMG_BOOL                        b2DHWRecoveryEndPending;
1559 -       IMG_UINT32                      ui322DCompletedBlits;
1560 -       IMG_BOOL                        b2DLockupSuspected;
1561 -#endif
1562 -
1563 -
1564 -       IMG_VOID                        *psStubPBDescListKM;
1565 -
1566 -
1567 -
1568 -       IMG_DEV_PHYADDR                 sKernelPDDevPAddr;
1569 -
1570 -       IMG_VOID                                *pvDeviceMemoryHeap;
1571 -       PPVRSRV_KERNEL_MEM_INFO psKernelCCBMemInfo;
1572 -       PVRSRV_SGX_KERNEL_CCB   *psKernelCCB;
1573 -       PPVRSRV_SGX_CCB_INFO    psKernelCCBInfo;
1574 -       PPVRSRV_KERNEL_MEM_INFO psKernelCCBCtlMemInfo;
1575 -       PVRSRV_SGX_CCB_CTL              *psKernelCCBCtl;
1576 -       PPVRSRV_KERNEL_MEM_INFO psKernelCCBEventKickerMemInfo;
1577 -       IMG_UINT32                              *pui32KernelCCBEventKicker;
1578 -       IMG_UINT32                              ui32TAKickAddress;
1579 -       IMG_UINT32                              ui32TexLoadKickAddress;
1580 -       IMG_UINT32                              ui32VideoHandlerAddress;
1581 -#if defined(SGX_SUPPORT_HWPROFILING)
1582 -       PPVRSRV_KERNEL_MEM_INFO psKernelHWProfilingMemInfo;
1583 -#endif
1584 -
1585 -
1586 -       IMG_UINT32                              ui32ClientRefCount;
1587 -
1588 -
1589 -       IMG_UINT32                              ui32CacheControl;
1590 -
1591 -
1592 -
1593 -
1594 -       IMG_VOID                                *pvMMUContextList;
1595 -
1596 -
1597 -       IMG_BOOL                                bForcePTOff;
1598 -
1599 -       IMG_UINT32                              ui32EDMTaskReg0;
1600 -       IMG_UINT32                              ui32EDMTaskReg1;
1601 -
1602 -       IMG_UINT32                              ui32ClockGateMask;
1603 -       SGX_INIT_SCRIPTS                sScripts;
1604 -#if defined(SUPPORT_HW_RECOVERY)
1605 -       SGX_INIT_SCRIPT_DATA    sScriptData;
1606 -#endif
1607 -
1608 -       IMG_HANDLE                              hBIFResetPDOSMemHandle;
1609 -       IMG_DEV_PHYADDR                 sBIFResetPDDevPAddr;
1610 -       IMG_DEV_PHYADDR                 sBIFResetPTDevPAddr;
1611 -       IMG_DEV_PHYADDR                 sBIFResetPageDevPAddr;
1612 -       IMG_UINT32                              *pui32BIFResetPD;
1613 -       IMG_UINT32                              *pui32BIFResetPT;
1614 -
1615 -
1616 -
1617 -#if defined(SUPPORT_HW_RECOVERY)
1618 -
1619 -       IMG_HANDLE                              hTimer;
1620 -
1621 -       IMG_UINT32                              ui32TimeStamp;
1622 -#endif
1623 -
1624 -
1625 -       IMG_UINT32                              ui32NumResets;
1626 -
1627 -       PVRSRV_KERNEL_MEM_INFO                  *psKernelSGXHostCtlMemInfo;
1628 -       PVRSRV_SGX_HOST_CTL                             *psSGXHostCtl;
1629 -
1630 -       IMG_UINT32                              ui32Flags;
1631 -
1632 -
1633 -       IMG_UINT32                              ui32RegFlags;
1634 -
1635 -       #if defined(PDUMP)
1636 -       PVRSRV_SGX_PDUMP_CONTEXT        sPDContext;
1637 -       #endif
1638 +       IMG_UINT32                              ui32NumActivePowerEvents;
1639
1640 -#if defined(SUPPORT_SGX_MMU_DUMMY_PAGE)
1641 -
1642 -       IMG_VOID                                *pvDummyPTPageCpuVAddr;
1643 -       IMG_DEV_PHYADDR                 sDummyPTDevPAddr;
1644 -       IMG_HANDLE                              hDummyPTPageOSMemHandle;
1645 -       IMG_VOID                                *pvDummyDataPageCpuVAddr;
1646 -       IMG_DEV_PHYADDR                 sDummyDataDevPAddr;
1647 -       IMG_HANDLE                              hDummyDataPageOSMemHandle;
1648 +#if defined(SUPPORT_SGX_HWPERF)
1649 +       IMG_UINT32                      ui32HWPerfFlags;
1650  #endif
1651
1652 -       IMG_UINT32                              asSGXDevData[SGX_MAX_DEV_DATA];
1653
1654 -#if defined(SUPPORT_SGX_EVENT_OBJECT)
1655 -       PVRSRV_EVENTOBJECT      *psSGXEventObject;
1656 -#endif
1657 +
1658 +       IMG_UINT32                      ui32TimeWraps;
1659 +} PVRSRV_SGX_HOST_CTL;
1660
1661 -} PVRSRV_SGXDEV_INFO;
1662
1663  typedef struct _PVR3DIF4_CLIENT_INFO_
1664  {
1665 -       IMG_VOID                                        *pvRegsBase;
1666 -       IMG_HANDLE                                      hBlockMapping;
1667 -       SGX_SLAVE_PORT                          s2DSlavePort;
1668         IMG_UINT32                                      ui32ProcessID;
1669         IMG_VOID                                        *pvProcess;
1670         PVRSRV_MISC_INFO                        sMiscInfo;
1671 @@ -330,13 +214,9 @@
1672  typedef struct _PVR3DIF4_INTERNAL_DEVINFO_
1673  {
1674         IMG_UINT32                      ui32Flags;
1675 -       IMG_BOOL                        bTimerEnable;
1676         IMG_HANDLE                      hCtlKernelMemInfoHandle;
1677         IMG_BOOL                        bForcePTOff;
1678         IMG_UINT32                      ui32RegFlags;
1679 -#if defined(SUPPORT_SGX_EVENT_OBJECT)
1680 -       IMG_HANDLE                      hOSEvent;
1681 -#endif
1682  } PVR3DIF4_INTERNAL_DEVINFO;
1683
1684  typedef struct _PVRSRV_SGX_SHARED_CCB_
1685 @@ -371,5 +251,150 @@
1686         #endif
1687  }PVRSRV_SGX_CCB;
1688
1689 +typedef struct _CTL_STATUS_
1690 +{
1691 +       IMG_DEV_VIRTADDR        sStatusDevAddr;
1692 +       IMG_UINT32              ui32StatusValue;
1693 +} CTL_STATUS, *PCTL_STATUS;
1694 +
1695 +#if defined(TRANSFER_QUEUE)
1696 +#define SGXTQ_MAX_STATUS 5
1697 +typedef struct _PVR3DIF4_CMDTA_SHARED_
1698 +{
1699 +       IMG_UINT32                      ui32NumTAStatusVals;
1700 +       IMG_UINT32                      ui32Num3DStatusVals;
1701 +
1702 +
1703 +       IMG_UINT32                      ui32WriteOpsPendingVal;
1704 +       IMG_DEV_VIRTADDR                sWriteOpsCompleteDevVAddr;
1705 +       IMG_UINT32                      ui32ReadOpsPendingVal;
1706 +       IMG_DEV_VIRTADDR                sReadOpsCompleteDevVAddr;
1707 +
1708 +
1709 +       IMG_UINT32                      ui32TQSyncWriteOpsPendingVal;
1710 +       IMG_DEV_VIRTADDR                sTQSyncWriteOpsCompleteDevVAddr;
1711 +       IMG_UINT32                      ui32TQSyncReadOpsPendingVal;
1712 +       IMG_DEV_VIRTADDR                sTQSyncReadOpsCompleteDevVAddr;
1713 +
1714 +
1715 +       IMG_UINT32                      ui323DTQSyncWriteOpsPendingVal;
1716 +       IMG_DEV_VIRTADDR                s3DTQSyncWriteOpsCompleteDevVAddr;
1717 +       IMG_UINT32                      ui323DTQSyncReadOpsPendingVal;
1718 +       IMG_DEV_VIRTADDR                s3DTQSyncReadOpsCompleteDevVAddr;
1719 +
1720 +
1721 +       IMG_UINT32                      ui32NumSrcSyncs;
1722 +       PVRSRV_DEVICE_SYNC_OBJECT       asSrcSyncs[SGX_MAX_SRC_SYNCS];
1723 +
1724 +       CTL_STATUS                      sCtlTAStatusInfo[SGX_MAX_TA_STATUS_VALS];
1725 +       CTL_STATUS                      sCtl3DStatusInfo[SGX_MAX_3D_STATUS_VALS];
1726 +
1727 +       PVRSRV_DEVICE_SYNC_OBJECT       sTA3DDependancy;
1728 +
1729 +} PVR3DIF4_CMDTA_SHARED;
1730 +
1731 +typedef struct _PVR3DIF4_TRANSFERCMD_SHARED_
1732 +{
1733 +
1734 +
1735 +       IMG_UINT32              ui32SrcReadOpPendingVal;
1736 +       IMG_DEV_VIRTADDR        sSrcReadOpsCompleteDevAddr;
1737 +
1738 +       IMG_UINT32              ui32SrcWriteOpPendingVal;
1739 +       IMG_DEV_VIRTADDR        sSrcWriteOpsCompleteDevAddr;
1740 +
1741 +
1742 +
1743 +       IMG_UINT32              ui32DstReadOpPendingVal;
1744 +       IMG_DEV_VIRTADDR        sDstReadOpsCompleteDevAddr;
1745 +
1746 +       IMG_UINT32              ui32DstWriteOpPendingVal;
1747 +       IMG_DEV_VIRTADDR        sDstWriteOpsCompleteDevAddr;
1748 +
1749 +
1750 +       IMG_UINT32              ui32TASyncWriteOpsPendingVal;
1751 +       IMG_DEV_VIRTADDR        sTASyncWriteOpsCompleteDevVAddr;
1752 +       IMG_UINT32              ui32TASyncReadOpsPendingVal;
1753 +       IMG_DEV_VIRTADDR        sTASyncReadOpsCompleteDevVAddr;
1754 +
1755 +
1756 +       IMG_UINT32              ui323DSyncWriteOpsPendingVal;
1757 +       IMG_DEV_VIRTADDR        s3DSyncWriteOpsCompleteDevVAddr;
1758 +       IMG_UINT32              ui323DSyncReadOpsPendingVal;
1759 +       IMG_DEV_VIRTADDR        s3DSyncReadOpsCompleteDevVAddr;
1760 +
1761 +       IMG_UINT32              ui32NumStatusVals;
1762 +       CTL_STATUS              sCtlStatusInfo[SGXTQ_MAX_STATUS];
1763 +
1764 +       IMG_UINT32              ui32NumSrcSync;
1765 +       IMG_UINT32              ui32NumDstSync;
1766 +
1767 +       IMG_DEV_VIRTADDR        sSrcWriteOpsDevVAddr[SGX_MAX_TRANSFER_SYNC_OPS];
1768 +       IMG_DEV_VIRTADDR        sSrcReadOpsDevVAddr[SGX_MAX_TRANSFER_SYNC_OPS];
1769 +
1770 +       IMG_DEV_VIRTADDR        sDstWriteOpsDevVAddr[SGX_MAX_TRANSFER_SYNC_OPS];
1771 +       IMG_DEV_VIRTADDR        sDstReadOpsDevVAddr[SGX_MAX_TRANSFER_SYNC_OPS];
1772 +} PVR3DIF4_TRANSFERCMD_SHARED, *PPVR3DIF4_TRANSFERCMD_SHARED;
1773 +
1774 +typedef struct _PVRSRV_TRANSFER_SGX_KICK_
1775 +{
1776 +       IMG_HANDLE              hCCBMemInfo;
1777 +       IMG_UINT32              ui32SharedCmdCCBOffset;
1778 +
1779 +       IMG_DEV_VIRTADDR        sHWTransferContextDevVAddr;
1780 +
1781 +       IMG_HANDLE              hTASyncInfo;
1782 +       IMG_HANDLE              h3DSyncInfo;
1783 +
1784 +       IMG_UINT32              ui32NumSrcSync;
1785 +       IMG_HANDLE              ahSrcSyncInfo[SGX_MAX_TRANSFER_SYNC_OPS];
1786 +
1787 +       IMG_UINT32              ui32NumDstSync;
1788 +       IMG_HANDLE              ahDstSyncInfo[SGX_MAX_TRANSFER_SYNC_OPS];
1789 +
1790 +       IMG_UINT32              ui32StatusFirstSync;
1791 +} PVRSRV_TRANSFER_SGX_KICK, *PPVRSRV_TRANSFER_SGX_KICK;
1792 +
1793 +#if defined(SGX_FEATURE_2D_HARDWARE)
1794 +typedef struct _PVR3DIF4_2DCMD_SHARED_ {
1795 +
1796 +       IMG_UINT32                      ui32NumSrcSync;
1797 +       PVRSRV_DEVICE_SYNC_OBJECT       sSrcSyncData[SGX_MAX_2D_SRC_SYNC_OPS];
1798 +
1799 +
1800 +       PVRSRV_DEVICE_SYNC_OBJECT       sDstSyncData;
1801 +
1802 +
1803 +       PVRSRV_DEVICE_SYNC_OBJECT       sTASyncData;
1804 +
1805 +
1806 +       PVRSRV_DEVICE_SYNC_OBJECT       s3DSyncData;
1807 +} PVR3DIF4_2DCMD_SHARED, *PPVR3DIF4_2DCMD_SHARED;
1808 +
1809 +typedef struct _PVRSRV_2D_SGX_KICK_
1810 +{
1811 +       IMG_HANDLE              hCCBMemInfo;
1812 +       IMG_UINT32              ui32SharedCmdCCBOffset;
1813 +
1814 +       IMG_DEV_VIRTADDR        sHW2DContextDevVAddr;
1815 +
1816 +       IMG_UINT32              ui32NumSrcSync;
1817 +       IMG_HANDLE              ahSrcSyncInfo[SGX_MAX_2D_SRC_SYNC_OPS];
1818 +
1819 +
1820 +       IMG_HANDLE              hDstSyncInfo;
1821 +
1822 +
1823 +       IMG_HANDLE              hTASyncInfo;
1824 +
1825 +
1826 +       IMG_HANDLE              h3DSyncInfo;
1827 +
1828 +} PVRSRV_2D_SGX_KICK, *PPVRSRV_2D_SGX_KICK;
1829 +#endif
1830 +#endif
1831 +
1832 +#define PVRSRV_SGX_HWPERF_NUM_COUNTERS 9
1833 +
1834
1835  #endif
1836 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/bridged/bridged_pvr_bridge.c git/drivers/gpu/pvr/services4/srvkm/bridged/bridged_pvr_bridge.c
1837 --- git/drivers/gpu/pvr/services4/srvkm/bridged/bridged_pvr_bridge.c    2009-01-05 20:00:44.000000000 +0100
1838 +++ git/drivers/gpu/pvr/services4/srvkm/bridged/bridged_pvr_bridge.c    2008-12-18 15:47:29.000000000 +0100
1839 @@ -44,7 +44,6 @@
1840  #include "bridged_pvr_bridge.h"
1841  #include "env_data.h"
1842
1843 -
1844  #if defined (__linux__)
1845  #include "mmap.h"
1846  #else
1847 @@ -66,7 +65,7 @@
1848
1849  static IMG_BOOL gbInitServerRunning = IMG_FALSE;
1850  static IMG_BOOL gbInitServerRan = IMG_FALSE;
1851 -static IMG_BOOL gbInitServerSuccessful = IMG_FALSE;
1852 +static IMG_BOOL gbInitSuccessful = IMG_FALSE;
1853
1854  PVRSRV_BRIDGE_DISPATCH_TABLE_ENTRY g_BridgeDispatchTable[BRIDGE_DISPATCH_TABLE_ENTRY_COUNT];
1855
1856 @@ -446,7 +445,13 @@
1857  }
1858
1859
1860 -
1861 +#if defined(OS_PVRSRV_ALLOC_DEVICE_MEM_BW)
1862 +int
1863 +PVRSRVAllocDeviceMemBW(IMG_UINT32 ui32BridgeID,
1864 +                                          PVRSRV_BRIDGE_IN_ALLOCDEVICEMEM *psAllocDeviceMemIN,
1865 +                                          PVRSRV_BRIDGE_OUT_ALLOCDEVICEMEM *psAllocDeviceMemOUT,
1866 +                                          PVRSRV_PER_PROCESS_DATA *psPerProc);
1867 +#else
1868  static int
1869  PVRSRVAllocDeviceMemBW(IMG_UINT32 ui32BridgeID,
1870                                            PVRSRV_BRIDGE_IN_ALLOCDEVICEMEM *psAllocDeviceMemIN,
1871 @@ -512,7 +517,7 @@
1872                 psAllocDeviceMemOUT->sClientMemInfo.sDevVAddr = psMemInfo->sDevVAddr;
1873                 psAllocDeviceMemOUT->sClientMemInfo.ui32Flags = psMemInfo->ui32Flags;
1874                 psAllocDeviceMemOUT->sClientMemInfo.ui32AllocSize = psMemInfo->ui32AllocSize;
1875 -               psAllocDeviceMemOUT->sClientMemInfo.hMappingInfo = IMG_NULL;
1876 +               psAllocDeviceMemOUT->sClientMemInfo.hMappingInfo = psMemInfo->sMemBlk.hOSMemHandle;
1877
1878                 psAllocDeviceMemOUT->eError =
1879                         PVRSRVAllocHandle(psPerProc->psHandleBase,
1880 @@ -568,6 +573,7 @@
1881         return 0;
1882  }
1883
1884 +#endif
1885
1886  static int
1887  PVRSRVFreeDeviceMemBW(IMG_UINT32 ui32BridgeID,
1888 @@ -1547,12 +1553,12 @@
1889                 return 0;
1890         }
1891
1892 -       if(psDoKickIN->sCCBKick.hDstKernelSyncInfo != IMG_NULL)
1893 +       if(psDoKickIN->sCCBKick.hTA3DSyncInfo != IMG_NULL)
1894         {
1895                 psRetOUT->eError =
1896                         PVRSRVLookupHandle(psPerProc->psHandleBase,
1897 -                                                          &psDoKickIN->sCCBKick.hDstKernelSyncInfo,
1898 -                                                          psDoKickIN->sCCBKick.hDstKernelSyncInfo,
1899 +                                                          &psDoKickIN->sCCBKick.hTA3DSyncInfo,
1900 +                                                          psDoKickIN->sCCBKick.hTA3DSyncInfo,
1901                                                            PVRSRV_HANDLE_TYPE_SYNC_INFO);
1902
1903                 if(psRetOUT->eError != PVRSRV_OK)
1904 @@ -1561,13 +1567,12 @@
1905                 }
1906         }
1907
1908 -#if defined (NO_HARDWARE)
1909 -       if(psDoKickIN->sCCBKick.hUpdateDstKernelSyncInfo != IMG_NULL)
1910 +       if(psDoKickIN->sCCBKick.hTASyncInfo != IMG_NULL)
1911         {
1912                 psRetOUT->eError =
1913                         PVRSRVLookupHandle(psPerProc->psHandleBase,
1914 -                                                          &psDoKickIN->sCCBKick.hUpdateDstKernelSyncInfo,
1915 -                                                          psDoKickIN->sCCBKick.hUpdateDstKernelSyncInfo,
1916 +                                                          &psDoKickIN->sCCBKick.hTASyncInfo,
1917 +                                                          psDoKickIN->sCCBKick.hTASyncInfo,
1918                                                            PVRSRV_HANDLE_TYPE_SYNC_INFO);
1919
1920                 if(psRetOUT->eError != PVRSRV_OK)
1921 @@ -1575,7 +1580,46 @@
1922                         return 0;
1923                 }
1924         }
1925 -#endif
1926 +
1927 +       if(psDoKickIN->sCCBKick.h3DSyncInfo != IMG_NULL)
1928 +       {
1929 +               psRetOUT->eError =
1930 +                       PVRSRVLookupHandle(psPerProc->psHandleBase,
1931 +                                                          &psDoKickIN->sCCBKick.h3DSyncInfo,
1932 +                                                          psDoKickIN->sCCBKick.h3DSyncInfo,
1933 +                                                          PVRSRV_HANDLE_TYPE_SYNC_INFO);
1934 +
1935 +               if(psRetOUT->eError != PVRSRV_OK)
1936 +               {
1937 +                       return 0;
1938 +               }
1939 +       }
1940 +
1941 +
1942 +       if (psDoKickIN->sCCBKick.ui32NumSrcSyncs > SGX_MAX_SRC_SYNCS)
1943 +       {
1944 +               psRetOUT->eError = PVRSRV_ERROR_INVALID_PARAMS;
1945 +               return 0;
1946 +       }
1947 +       for(i=0; i<psDoKickIN->sCCBKick.ui32NumSrcSyncs; i++)
1948 +       {
1949 +               psRetOUT->eError =
1950 +                       PVRSRVLookupHandle(psPerProc->psHandleBase,
1951 +                                                          &psDoKickIN->sCCBKick.ahSrcKernelSyncInfo[i],
1952 +                                                          psDoKickIN->sCCBKick.ahSrcKernelSyncInfo[i],
1953 +                                                          PVRSRV_HANDLE_TYPE_SYNC_INFO);
1954 +
1955 +               if(psRetOUT->eError != PVRSRV_OK)
1956 +               {
1957 +                       return 0;
1958 +               }
1959 +       }
1960 +
1961 +       if (psDoKickIN->sCCBKick.ui32NumTAStatusVals > SGX_MAX_TA_STATUS_VALS)
1962 +       {
1963 +               psRetOUT->eError = PVRSRV_ERROR_INVALID_PARAMS;
1964 +               return 0;
1965 +       }
1966         for (i = 0; i < psDoKickIN->sCCBKick.ui32NumTAStatusVals; i++)
1967         {
1968                 psRetOUT->eError =
1969 @@ -1590,6 +1634,11 @@
1970                 }
1971         }
1972
1973 +       if (psDoKickIN->sCCBKick.ui32Num3DStatusVals > SGX_MAX_3D_STATUS_VALS)
1974 +       {
1975 +               psRetOUT->eError = PVRSRV_ERROR_INVALID_PARAMS;
1976 +               return 0;
1977 +       }
1978         for(i = 0; i < psDoKickIN->sCCBKick.ui32Num3DStatusVals; i++)
1979         {
1980                 psRetOUT->eError =
1981 @@ -1604,6 +1653,20 @@
1982                 }
1983         }
1984
1985 +       if(psDoKickIN->sCCBKick.hRenderSurfSyncInfo != IMG_NULL)
1986 +       {
1987 +               psRetOUT->eError =
1988 +                       PVRSRVLookupHandle(psPerProc->psHandleBase,
1989 +                                                          &psDoKickIN->sCCBKick.hRenderSurfSyncInfo,
1990 +                                                          psDoKickIN->sCCBKick.hRenderSurfSyncInfo,
1991 +                                                          PVRSRV_HANDLE_TYPE_SYNC_INFO);
1992 +
1993 +               if(psRetOUT->eError != PVRSRV_OK)
1994 +               {
1995 +                       return 0;
1996 +               }
1997 +       }
1998 +
1999         psRetOUT->eError =
2000                 SGXDoKickKM(hDevCookieInt,
2001                                         &psDoKickIN->sCCBKick);
2002 @@ -1620,51 +1683,119 @@
2003                         PVRSRV_PER_PROCESS_DATA *psPerProc)
2004  {
2005         IMG_HANDLE hDevCookieInt;
2006 +       PVRSRV_TRANSFER_SGX_KICK *psKick;
2007 +       IMG_UINT32 i;
2008
2009         PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SGX_SUBMITTRANSFER);
2010         PVR_UNREFERENCED_PARAMETER(ui32BridgeID);
2011
2012 +       psKick = &psSubmitTransferIN->sKick;
2013 +
2014         psRetOUT->eError =
2015                 PVRSRVLookupHandle(psPerProc->psHandleBase,
2016                                                    &hDevCookieInt,
2017                                                    psSubmitTransferIN->hDevCookie,
2018                                                    PVRSRV_HANDLE_TYPE_DEV_NODE);
2019 -
2020         if(psRetOUT->eError != PVRSRV_OK)
2021         {
2022                 return 0;
2023         }
2024
2025         psRetOUT->eError =
2026 -               SGXSubmitTransferKM(hDevCookieInt,
2027 -                                                       psSubmitTransferIN->sHWRenderContextDevVAddr);
2028 +               PVRSRVLookupHandle(psPerProc->psHandleBase,
2029 +                                                  &psKick->hCCBMemInfo,
2030 +                                                  psKick->hCCBMemInfo,
2031 +                                                  PVRSRV_HANDLE_TYPE_MEM_INFO);
2032 +       if(psRetOUT->eError != PVRSRV_OK)
2033 +       {
2034 +               return 0;
2035 +       }
2036 +
2037 +       if (psKick->hTASyncInfo != IMG_NULL)
2038 +       {
2039 +               psRetOUT->eError =
2040 +                       PVRSRVLookupHandle(psPerProc->psHandleBase,
2041 +                                                          &psKick->hTASyncInfo,
2042 +                                                          psKick->hTASyncInfo,
2043 +                                                          PVRSRV_HANDLE_TYPE_SYNC_INFO);
2044 +               if(psRetOUT->eError != PVRSRV_OK)
2045 +               {
2046 +                       return 0;
2047 +               }
2048 +       }
2049 +
2050 +       if (psKick->h3DSyncInfo != IMG_NULL)
2051 +       {
2052 +               psRetOUT->eError =
2053 +                       PVRSRVLookupHandle(psPerProc->psHandleBase,
2054 +                                                          &psKick->h3DSyncInfo,
2055 +                                                          psKick->h3DSyncInfo,
2056 +                                                          PVRSRV_HANDLE_TYPE_SYNC_INFO);
2057 +               if(psRetOUT->eError != PVRSRV_OK)
2058 +               {
2059 +                       return 0;
2060 +               }
2061 +       }
2062 +
2063 +       if (psKick->ui32NumSrcSync > SGX_MAX_TRANSFER_SYNC_OPS)
2064 +       {
2065 +               psRetOUT->eError = PVRSRV_ERROR_INVALID_PARAMS;
2066 +               return 0;
2067 +       }
2068 +       for (i = 0; i < psKick->ui32NumSrcSync; i++)
2069 +       {
2070 +               psRetOUT->eError =
2071 +                       PVRSRVLookupHandle(psPerProc->psHandleBase,
2072 +                                                          &psKick->ahSrcSyncInfo[i],
2073 +                                                          psKick->ahSrcSyncInfo[i],
2074 +                                                          PVRSRV_HANDLE_TYPE_SYNC_INFO);
2075 +               if(psRetOUT->eError != PVRSRV_OK)
2076 +               {
2077 +                       return 0;
2078 +               }
2079 +       }
2080 +
2081 +       if (psKick->ui32NumDstSync > SGX_MAX_TRANSFER_SYNC_OPS)
2082 +       {
2083 +               psRetOUT->eError = PVRSRV_ERROR_INVALID_PARAMS;
2084 +               return 0;
2085 +       }
2086 +       for (i = 0; i < psKick->ui32NumDstSync; i++)
2087 +       {
2088 +               psRetOUT->eError =
2089 +                       PVRSRVLookupHandle(psPerProc->psHandleBase,
2090 +                                                          &psKick->ahDstSyncInfo[i],
2091 +                                                          psKick->ahDstSyncInfo[i],
2092 +                                                          PVRSRV_HANDLE_TYPE_SYNC_INFO);
2093 +               if(psRetOUT->eError != PVRSRV_OK)
2094 +               {
2095 +                       return 0;
2096 +               }
2097 +       }
2098 +
2099 +       psRetOUT->eError = SGXSubmitTransferKM(hDevCookieInt, psKick);
2100
2101         return 0;
2102  }
2103 -#endif
2104
2105 +#if defined(SGX_FEATURE_2D_HARDWARE)
2106  static int
2107 -SGXGetMiscInfoBW(IMG_UINT32 ui32BridgeID,
2108 -                                PVRSRV_BRIDGE_IN_SGXGETMISCINFO *psSGXGetMiscInfoIN,
2109 -                                PVRSRV_BRIDGE_RETURN *psRetOUT,
2110 -                                PVRSRV_PER_PROCESS_DATA *psPerProc)
2111 +SGXSubmit2DBW(IMG_UINT32 ui32BridgeID,
2112 +                       PVRSRV_BRIDGE_IN_SUBMIT2D *psSubmit2DIN,
2113 +                       PVRSRV_BRIDGE_RETURN *psRetOUT,
2114 +                       PVRSRV_PER_PROCESS_DATA *psPerProc)
2115  {
2116         IMG_HANDLE hDevCookieInt;
2117 -       PVRSRV_SGXDEV_INFO *psDevInfo;
2118 -       SGX_MISC_INFO *psMiscInfo;
2119 -
2120 -
2121 -       PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SGX_GETMISCINFO);
2122 +       PVRSRV_2D_SGX_KICK *psKick;
2123 +       IMG_UINT32 i;
2124
2125 -
2126 -       psMiscInfo =
2127 -               (SGX_MISC_INFO *)((IMG_UINT8 *)psSGXGetMiscInfoIN
2128 -                                                 + sizeof(PVRSRV_BRIDGE_IN_SGXGETMISCINFO));
2129 +       PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SGX_SUBMIT2D);
2130 +       PVR_UNREFERENCED_PARAMETER(ui32BridgeID);
2131
2132         psRetOUT->eError =
2133 -               PVRSRVLookupHandle(psPerProc->psHandleBase,
2134 -                                                  &hDevCookieInt,
2135 -                                                  psSGXGetMiscInfoIN->hDevCookie,
2136 +               PVRSRVLookupHandle(psPerProc->psHandleBase,
2137 +                                                  &hDevCookieInt,
2138 +                                                  psSubmit2DIN->hDevCookie,
2139                                                    PVRSRV_HANDLE_TYPE_DEV_NODE);
2140
2141         if(psRetOUT->eError != PVRSRV_OK)
2142 @@ -1672,45 +1803,156 @@
2143                 return 0;
2144         }
2145
2146 -       psDevInfo = (PVRSRV_SGXDEV_INFO *)((PVRSRV_DEVICE_NODE *)hDevCookieInt)->pvDevice;
2147 +       psKick = &psSubmit2DIN->sKick;
2148
2149 -       if(CopyFromUserWrapper(psPerProc,
2150 -                                      ui32BridgeID,
2151 -                                                  psMiscInfo,
2152 -                                                  psSGXGetMiscInfoIN->psMiscInfo,
2153 -                                                  sizeof(SGX_MISC_INFO)) != PVRSRV_OK)
2154 +       psRetOUT->eError =
2155 +               PVRSRVLookupHandle(psPerProc->psHandleBase,
2156 +                                                  &psKick->hCCBMemInfo,
2157 +                                                  psKick->hCCBMemInfo,
2158 +                                                  PVRSRV_HANDLE_TYPE_MEM_INFO);
2159 +       if(psRetOUT->eError != PVRSRV_OK)
2160         {
2161 -               return -EFAULT;
2162 +               return 0;
2163         }
2164
2165 -       switch(psMiscInfo->eRequest)
2166 +       if (psKick->hTASyncInfo != IMG_NULL)
2167         {
2168 -               default:
2169 -                       break;
2170 +               psRetOUT->eError =
2171 +                       PVRSRVLookupHandle(psPerProc->psHandleBase,
2172 +                                                          &psKick->hTASyncInfo,
2173 +                                                          psKick->hTASyncInfo,
2174 +                                                          PVRSRV_HANDLE_TYPE_SYNC_INFO);
2175 +               if(psRetOUT->eError != PVRSRV_OK)
2176 +               {
2177 +                       return 0;
2178 +               }
2179         }
2180
2181 -
2182 -       psRetOUT->eError = SGXGetMiscInfoKM(psDevInfo, psMiscInfo);
2183 +       if (psKick->h3DSyncInfo != IMG_NULL)
2184 +       {
2185 +               psRetOUT->eError =
2186 +                       PVRSRVLookupHandle(psPerProc->psHandleBase,
2187 +                                                          &psKick->h3DSyncInfo,
2188 +                                                          psKick->h3DSyncInfo,
2189 +                                                          PVRSRV_HANDLE_TYPE_SYNC_INFO);
2190 +               if(psRetOUT->eError != PVRSRV_OK)
2191 +               {
2192 +                       return 0;
2193 +               }
2194 +       }
2195
2196 -
2197 -       switch(psMiscInfo->eRequest)
2198 +       if (psKick->ui32NumSrcSync > SGX_MAX_2D_SRC_SYNC_OPS)
2199         {
2200 -               default:
2201 -                       break;
2202 +               psRetOUT->eError = PVRSRV_ERROR_INVALID_PARAMS;
2203 +               return 0;
2204 +       }
2205 +       for (i = 0; i < psKick->ui32NumSrcSync; i++)
2206 +       {
2207 +               psRetOUT->eError =
2208 +                       PVRSRVLookupHandle(psPerProc->psHandleBase,
2209 +                                                          &psKick->ahSrcSyncInfo[i],
2210 +                                                          psKick->ahSrcSyncInfo[i],
2211 +                                                          PVRSRV_HANDLE_TYPE_SYNC_INFO);
2212 +               if(psRetOUT->eError != PVRSRV_OK)
2213 +               {
2214 +                       return 0;
2215 +               }
2216         }
2217
2218 -       if(CopyToUserWrapper(psPerProc,
2219 -                                    ui32BridgeID,
2220 -                                                psSGXGetMiscInfoIN->psMiscInfo,
2221 -                                                psMiscInfo,
2222 -                                                sizeof(SGX_MISC_INFO)) != PVRSRV_OK)
2223 +       if (psKick->hDstSyncInfo != IMG_NULL)
2224         {
2225 -               return -EFAULT;
2226 +               psRetOUT->eError =
2227 +                       PVRSRVLookupHandle(psPerProc->psHandleBase,
2228 +                                                          &psKick->hDstSyncInfo,
2229 +                                                          psKick->hDstSyncInfo,
2230 +                                                          PVRSRV_HANDLE_TYPE_SYNC_INFO);
2231 +               if(psRetOUT->eError != PVRSRV_OK)
2232 +               {
2233 +                       return 0;
2234 +               }
2235         }
2236
2237 +       psRetOUT->eError =
2238 +               SGXSubmit2DKM(hDevCookieInt, psKick);
2239 +
2240 +       return 0;
2241 +}
2242 +#endif
2243 +
2244 +#endif
2245 +
2246 +static int
2247 +SGXGetMiscInfoBW(IMG_UINT32 ui32BridgeID,
2248 +                                PVRSRV_BRIDGE_IN_SGXGETMISCINFO *psSGXGetMiscInfoIN,
2249 +                                PVRSRV_BRIDGE_RETURN *psRetOUT,
2250 +                                PVRSRV_PER_PROCESS_DATA *psPerProc)
2251 +{
2252 +       IMG_HANDLE hDevCookieInt;
2253 +       PVRSRV_SGXDEV_INFO *psDevInfo;
2254 +       SGX_MISC_INFO *psMiscInfo;
2255 +
2256 +       PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID,
2257 +                                                       PVRSRV_BRIDGE_SGX_GETMISCINFO);
2258 +
2259 +       psRetOUT->eError = PVRSRVLookupHandle(psPerProc->psHandleBase,
2260 +                                                       &hDevCookieInt,
2261 +                                                       psSGXGetMiscInfoIN->hDevCookie,
2262 +                                                       PVRSRV_HANDLE_TYPE_DEV_NODE);
2263 +
2264 +       if(psRetOUT->eError != PVRSRV_OK)
2265 +       {
2266 +               return 0;
2267 +       }
2268 +
2269 +       psDevInfo = (PVRSRV_SGXDEV_INFO *)((PVRSRV_DEVICE_NODE*)hDevCookieInt)->pvDevice;
2270 +
2271 +       psMiscInfo = psSGXGetMiscInfoIN->psMiscInfo;
2272 +       psRetOUT->eError = SGXGetMiscInfoKM(psDevInfo, psMiscInfo);
2273 +
2274         return 0;
2275  }
2276
2277 +#if defined(SUPPORT_SGX_HWPERF)
2278 +static int
2279 +SGXReadHWPerfCountersBW(IMG_UINT32                                                                     ui32BridgeID,
2280 +                                               PVRSRV_BRIDGE_IN_SGX_READ_HWPERF_COUNTERS       *psSGXReadHWPerfCountersIN,
2281 +                                               PVRSRV_BRIDGE_OUT_SGX_READ_HWPERF_COUNTERS      *psSGXReadHWPerfCountersOUT,
2282 +                                               PVRSRV_PER_PROCESS_DATA                                         *psPerProc)
2283 +{
2284 +       IMG_HANDLE                      hDevCookieInt;
2285 +       PVRSRV_SGXDEV_INFO      *psDevInfo;
2286 +
2287 +       PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SGX_READ_HWPERF_COUNTERS);
2288 +
2289 +       psSGXReadHWPerfCountersOUT->eError = PVRSRVLookupHandle(psPerProc->psHandleBase,
2290 +                                                       &hDevCookieInt,
2291 +                                                       psSGXReadHWPerfCountersIN->hDevCookie,
2292 +                                                       PVRSRV_HANDLE_TYPE_DEV_NODE);
2293 +
2294 +       if(psSGXReadHWPerfCountersOUT->eError != PVRSRV_OK)
2295 +       {
2296 +               return 0;
2297 +       }
2298 +
2299 +       psDevInfo = ((PVRSRV_DEVICE_NODE*)hDevCookieInt)->pvDevice;
2300 +
2301 +       psSGXReadHWPerfCountersOUT->eError = SGXReadHWPerfCountersKM(psDevInfo,
2302 +                                                       psSGXReadHWPerfCountersIN->ui32PerfReg,
2303 +                                                       &psSGXReadHWPerfCountersOUT->ui32OldPerf,
2304 +                                                       psSGXReadHWPerfCountersIN->bNewPerf,
2305 +                                                       psSGXReadHWPerfCountersIN->ui32NewPerf,
2306 +                                                       psSGXReadHWPerfCountersIN->ui32NewPerfReset,
2307 +                                                       psSGXReadHWPerfCountersIN->ui32PerfCountersReg,
2308 +                                                       &psSGXReadHWPerfCountersOUT->aui32Counters[0],
2309 +                                                       &psSGXReadHWPerfCountersOUT->ui32KickTACounter,
2310 +                                                       &psSGXReadHWPerfCountersOUT->ui32KickTARenderCounter,
2311 +                                                       &psSGXReadHWPerfCountersOUT->ui32CPUTime,
2312 +                                                       &psSGXReadHWPerfCountersOUT->ui32SGXTime);
2313 +
2314 +       return 0;
2315 +}
2316 +#endif
2317 +
2318  static int
2319  PVRSRVInitSrvConnectBW(IMG_UINT32 ui32BridgeID,
2320                                            IMG_VOID *psBridgeIn,
2321 @@ -1752,15 +1994,13 @@
2322                 return 0;
2323         }
2324
2325 -       PDUMPENDINITPHASE();
2326 -
2327 -       gbInitServerSuccessful = psInitSrvDisconnectIN->bInitSuccesful;
2328 -
2329         psPerProc->bInitProcess = IMG_FALSE;
2330         gbInitServerRunning = IMG_FALSE;
2331         gbInitServerRan = IMG_TRUE;
2332
2333 -       psRetOUT->eError = PVRSRV_OK;
2334 +       psRetOUT->eError = PVRSRVFinaliseSystem(psInitSrvDisconnectIN->bInitSuccesful);
2335 +
2336 +       gbInitSuccessful = (IMG_BOOL)(((psRetOUT->eError == PVRSRV_OK) && (psInitSrvDisconnectIN->bInitSuccesful)));
2337
2338         return 0;
2339  }
2340 @@ -1772,15 +2012,99 @@
2341                                                   PVRSRV_BRIDGE_RETURN *psRetOUT,
2342                                                   PVRSRV_PER_PROCESS_DATA *psPerProc)
2343  {
2344 +       IMG_HANDLE hOSEventKM;
2345 +
2346         PVR_UNREFERENCED_PARAMETER(psPerProc);
2347
2348         PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_EVENT_OBJECT_WAIT);
2349
2350 -       psRetOUT->eError = OSEventObjectWait(psEventObjectWaitIN->hOSEventKM, psEventObjectWaitIN->ui32MSTimeout);
2351 +       psRetOUT->eError = PVRSRVLookupHandle(psPerProc->psHandleBase,
2352 +                                                  &hOSEventKM,
2353 +                                                  psEventObjectWaitIN->hOSEventKM,
2354 +                                                  PVRSRV_HANDLE_TYPE_EVENT_OBJECT_CONNECT);
2355 +
2356 +       if(psRetOUT->eError != PVRSRV_OK)
2357 +       {
2358 +               return 0;
2359 +       }
2360 +
2361 +       psRetOUT->eError = OSEventObjectWait(hOSEventKM);
2362 +
2363 +       return 0;
2364 +}
2365 +
2366 +static int
2367 +PVRSRVEventObjectOpenBW(IMG_UINT32 ui32BridgeID,
2368 +                                                 PVRSRV_BRIDGE_IN_EVENT_OBJECT_OPEN *psEventObjectOpenIN,
2369 +                                                 PVRSRV_BRIDGE_OUT_EVENT_OBJECT_OPEN *psEventObjectOpenOUT,
2370 +                                                 PVRSRV_PER_PROCESS_DATA *psPerProc)
2371 +{
2372 +
2373 +       PVR_UNREFERENCED_PARAMETER(psPerProc);
2374 +
2375 +       PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_EVENT_OBJECT_OPEN);
2376 +
2377 +       psEventObjectOpenOUT->eError =
2378 +               PVRSRVLookupHandle(psPerProc->psHandleBase,
2379 +                                                  &psEventObjectOpenIN->sEventObject.hOSEventKM,
2380 +                                                  psEventObjectOpenIN->sEventObject.hOSEventKM,
2381 +                                                  PVRSRV_HANDLE_TYPE_SHARED_EVENT_OBJECT);
2382 +
2383 +       if(psEventObjectOpenOUT->eError != PVRSRV_OK)
2384 +       {
2385 +               return 0;
2386 +       }
2387 +       psEventObjectOpenOUT->eError = OSEventObjectOpen(&psEventObjectOpenIN->sEventObject, &psEventObjectOpenOUT->hOSEvent);
2388 +
2389 +       if(psEventObjectOpenOUT->eError != PVRSRV_OK)
2390 +       {
2391 +               return 0;
2392 +       }
2393 +       psEventObjectOpenOUT->eError =
2394 +               PVRSRVAllocHandle(psPerProc->psHandleBase,
2395 +                                                 &psEventObjectOpenOUT->hOSEvent,
2396 +                                                 psEventObjectOpenOUT->hOSEvent,
2397 +                                                 PVRSRV_HANDLE_TYPE_EVENT_OBJECT_CONNECT,
2398 +                                                 PVRSRV_HANDLE_ALLOC_FLAG_NONE);
2399
2400         return 0;
2401  }
2402 +static int
2403 +PVRSRVEventObjectCloseBW(IMG_UINT32 ui32BridgeID,
2404 +                                                 PVRSRV_BRIDGE_IN_EVENT_OBJECT_CLOSE *psEventObjectCloseIN,
2405 +                                                 PVRSRV_BRIDGE_RETURN *psRetOUT,
2406 +                                                 PVRSRV_PER_PROCESS_DATA *psPerProc)
2407 +{
2408 +       IMG_HANDLE hOSEventKM;
2409 +
2410 +       PVR_UNREFERENCED_PARAMETER(psPerProc);
2411 +
2412 +       PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_EVENT_OBJECT_CLOSE);
2413 +
2414 +       psRetOUT->eError =
2415 +               PVRSRVLookupHandle(psPerProc->psHandleBase,
2416 +                                                  &psEventObjectCloseIN->sEventObject.hOSEventKM,
2417 +                                                  psEventObjectCloseIN->sEventObject.hOSEventKM,
2418 +                                                  PVRSRV_HANDLE_TYPE_SHARED_EVENT_OBJECT);
2419 +       if(psRetOUT->eError != PVRSRV_OK)
2420 +       {
2421 +               return 0;
2422 +       }
2423 +
2424 +       psRetOUT->eError = PVRSRVLookupAndReleaseHandle(psPerProc->psHandleBase,
2425 +                                                  &hOSEventKM,
2426 +                                                  psEventObjectCloseIN->hOSEventKM,
2427 +                                                  PVRSRV_HANDLE_TYPE_EVENT_OBJECT_CONNECT);
2428
2429 +       if(psRetOUT->eError != PVRSRV_OK)
2430 +       {
2431 +               return 0;
2432 +       }
2433 +
2434 +       psRetOUT->eError = OSEventObjectClose(&psEventObjectCloseIN->sEventObject, hOSEventKM);
2435 +
2436 +       return 0;
2437 +}
2438
2439  static int
2440  SGXDevInitPart2BW(IMG_UINT32 ui32BridgeID,
2441 @@ -1847,6 +2171,13 @@
2442         bLookupFailed |= (eError != PVRSRV_OK);
2443  #endif
2444
2445 +#if defined(SUPPORT_SGX_HWPERF)
2446 +       eError = PVRSRVLookupHandle(psPerProc->psHandleBase,
2447 +                                                  &hDummy,
2448 +                                                  psSGXDevInitPart2IN->sInitInfo.hKernelHWPerfCBMemInfo,
2449 +                                                  PVRSRV_HANDLE_TYPE_MEM_INFO);
2450 +       bLookupFailed |= (eError != PVRSRV_OK);
2451 +#endif
2452
2453
2454         for (i = 0; i < SGX_MAX_INIT_MEM_HANDLES; i++)
2455 @@ -1907,6 +2238,13 @@
2456         bReleaseFailed |= (eError != PVRSRV_OK);
2457  #endif
2458
2459 +#if defined(SUPPORT_SGX_HWPERF)
2460 +       eError = PVRSRVLookupAndReleaseHandle(psPerProc->psHandleBase,
2461 +                                                  &psSGXDevInitPart2IN->sInitInfo.hKernelHWPerfCBMemInfo,
2462 +                                                  psSGXDevInitPart2IN->sInitInfo.hKernelHWPerfCBMemInfo,
2463 +                                                  PVRSRV_HANDLE_TYPE_MEM_INFO);
2464 +       bReleaseFailed |= (eError != PVRSRV_OK);
2465 +#endif
2466
2467
2468         for (i = 0; i < SGX_MAX_INIT_MEM_HANDLES; i++)
2469 @@ -1950,6 +2288,10 @@
2470         bDissociateFailed |= (eError != PVRSRV_OK);
2471  #endif
2472
2473 +#if defined(SUPPORT_SGX_HWPERF)
2474 +       eError = PVRSRVDissociateDeviceMemKM(hDevCookieInt, psSGXDevInitPart2IN->sInitInfo.hKernelHWPerfCBMemInfo);
2475 +       bDissociateFailed |= (eError != PVRSRV_OK);
2476 +#endif
2477
2478
2479         for (i = 0; i < SGX_MAX_INIT_MEM_HANDLES; i++)
2480 @@ -2005,7 +2347,6 @@
2481                                                          PVRSRV_PER_PROCESS_DATA *psPerProc)
2482  {
2483         IMG_HANDLE hDevCookieInt;
2484 -       PVRSRV_SGXDEV_INFO *psDevInfo;
2485         IMG_HANDLE hHWRenderContextInt;
2486
2487         PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SGX_REGISTER_HW_RENDER_CONTEXT);
2488 @@ -2020,10 +2361,8 @@
2489                 return 0;
2490         }
2491
2492 -       psDevInfo = (PVRSRV_SGXDEV_INFO *)((PVRSRV_DEVICE_NODE *)hDevCookieInt)->pvDevice;
2493 -
2494         hHWRenderContextInt =
2495 -               SGXRegisterHWRenderContextKM(psDevInfo,
2496 +               SGXRegisterHWRenderContextKM(hDevCookieInt,
2497                                                                          &psSGXRegHWRenderContextIN->sHWRenderContextDevVAddr);
2498
2499         if (hHWRenderContextInt == IMG_NULL)
2500 @@ -2043,54 +2382,180 @@
2501  }
2502
2503  static int
2504 -SGXFlushHWRenderTargetBW(IMG_UINT32 ui32BridgeID,
2505 -                                                 PVRSRV_BRIDGE_IN_SGX_FLUSH_HW_RENDER_TARGET *psSGXFlushHWRenderTargetIN,
2506 -                                                 PVRSRV_BRIDGE_RETURN *psRetOUT,
2507 -                                                 PVRSRV_PER_PROCESS_DATA *psPerProc)
2508 +SGXUnregisterHWRenderContextBW(IMG_UINT32 ui32BridgeID,
2509 +                                                          PVRSRV_BRIDGE_IN_SGX_UNREGISTER_HW_RENDER_CONTEXT *psSGXUnregHWRenderContextIN,
2510 +                                                          PVRSRV_BRIDGE_RETURN *psRetOUT,
2511 +                                                          PVRSRV_PER_PROCESS_DATA *psPerProc)
2512  {
2513 -       IMG_HANDLE hDevCookieInt;
2514 -       PVRSRV_SGXDEV_INFO *psDevInfo;
2515 -
2516 -       PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SGX_FLUSH_HW_RENDER_TARGET);
2517 +       IMG_HANDLE hHWRenderContextInt;
2518 +
2519 +       PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SGX_UNREGISTER_HW_RENDER_CONTEXT);
2520
2521         psRetOUT->eError =
2522 +               PVRSRVLookupHandle(psPerProc->psHandleBase,
2523 +                                                  &hHWRenderContextInt,
2524 +                                                  psSGXUnregHWRenderContextIN->hHWRenderContext,
2525 +                                                  PVRSRV_HANDLE_TYPE_SGX_HW_RENDER_CONTEXT);
2526 +       if(psRetOUT->eError != PVRSRV_OK)
2527 +       {
2528 +               return 0;
2529 +       }
2530 +
2531 +       psRetOUT->eError = SGXUnregisterHWRenderContextKM(hHWRenderContextInt);
2532 +       if(psRetOUT->eError != PVRSRV_OK)
2533 +       {
2534 +               return 0;
2535 +       }
2536 +
2537 +       psRetOUT->eError =
2538 +               PVRSRVReleaseHandle(psPerProc->psHandleBase,
2539 +                                                       psSGXUnregHWRenderContextIN->hHWRenderContext,
2540 +                                                       PVRSRV_HANDLE_TYPE_SGX_HW_RENDER_CONTEXT);
2541 +
2542 +       return 0;
2543 +}
2544 +
2545 +static int
2546 +SGXRegisterHWTransferContextBW(IMG_UINT32 ui32BridgeID,
2547 +                                                        PVRSRV_BRIDGE_IN_SGX_REGISTER_HW_TRANSFER_CONTEXT *psSGXRegHWTransferContextIN,
2548 +                                                        PVRSRV_BRIDGE_OUT_SGX_REGISTER_HW_TRANSFER_CONTEXT *psSGXRegHWTransferContextOUT,
2549 +                                                        PVRSRV_PER_PROCESS_DATA *psPerProc)
2550 +{
2551 +       IMG_HANDLE hDevCookieInt;
2552 +       IMG_HANDLE hHWTransferContextInt;
2553 +
2554 +       PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SGX_REGISTER_HW_TRANSFER_CONTEXT);
2555 +
2556 +       psSGXRegHWTransferContextOUT->eError =
2557                 PVRSRVLookupHandle(psPerProc->psHandleBase,
2558                                                    &hDevCookieInt,
2559 -                                                  psSGXFlushHWRenderTargetIN->hDevCookie,
2560 +                                                  psSGXRegHWTransferContextIN->hDevCookie,
2561                                                    PVRSRV_HANDLE_TYPE_DEV_NODE);
2562 +       if(psSGXRegHWTransferContextOUT->eError != PVRSRV_OK)
2563 +       {
2564 +               return 0;
2565 +       }
2566 +
2567 +       hHWTransferContextInt =
2568 +               SGXRegisterHWTransferContextKM(hDevCookieInt,
2569 +                                                                        &psSGXRegHWTransferContextIN->sHWTransferContextDevVAddr);
2570 +
2571 +       if (hHWTransferContextInt == IMG_NULL)
2572 +       {
2573 +               psSGXRegHWTransferContextOUT->eError = PVRSRV_ERROR_GENERIC;
2574 +               return 0;
2575 +       }
2576 +
2577 +       psSGXRegHWTransferContextOUT->eError =
2578 +               PVRSRVAllocHandle(psPerProc->psHandleBase,
2579 +                                                 &psSGXRegHWTransferContextOUT->hHWTransferContext,
2580 +                                                 hHWTransferContextInt,
2581 +                                                 PVRSRV_HANDLE_TYPE_SGX_HW_TRANSFER_CONTEXT,
2582 +                                                 PVRSRV_HANDLE_ALLOC_FLAG_NONE);
2583 +
2584 +       return 0;
2585 +}
2586 +
2587 +static int
2588 +SGXUnregisterHWTransferContextBW(IMG_UINT32 ui32BridgeID,
2589 +                                                          PVRSRV_BRIDGE_IN_SGX_UNREGISTER_HW_TRANSFER_CONTEXT *psSGXUnregHWTransferContextIN,
2590 +                                                          PVRSRV_BRIDGE_RETURN *psRetOUT,
2591 +                                                          PVRSRV_PER_PROCESS_DATA *psPerProc)
2592 +{
2593 +       IMG_HANDLE hHWTransferContextInt;
2594 +
2595 +       PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SGX_UNREGISTER_HW_TRANSFER_CONTEXT);
2596 +
2597 +       psRetOUT->eError =
2598 +               PVRSRVLookupHandle(psPerProc->psHandleBase,
2599 +                                                  &hHWTransferContextInt,
2600 +                                                  psSGXUnregHWTransferContextIN->hHWTransferContext,
2601 +                                                  PVRSRV_HANDLE_TYPE_SGX_HW_TRANSFER_CONTEXT);
2602         if(psRetOUT->eError != PVRSRV_OK)
2603         {
2604                 return 0;
2605         }
2606
2607 +       psRetOUT->eError = SGXUnregisterHWTransferContextKM(hHWTransferContextInt);
2608 +       if(psRetOUT->eError != PVRSRV_OK)
2609 +       {
2610 +               return 0;
2611 +       }
2612 +
2613 +       psRetOUT->eError =
2614 +               PVRSRVReleaseHandle(psPerProc->psHandleBase,
2615 +                                                       psSGXUnregHWTransferContextIN->hHWTransferContext,
2616 +                                                       PVRSRV_HANDLE_TYPE_SGX_HW_TRANSFER_CONTEXT);
2617 +
2618 +       return 0;
2619 +}
2620 +
2621 +#if defined(SGX_FEATURE_2D_HARDWARE)
2622 +static int
2623 +SGXRegisterHW2DContextBW(IMG_UINT32 ui32BridgeID,
2624 +                                                        PVRSRV_BRIDGE_IN_SGX_REGISTER_HW_2D_CONTEXT *psSGXRegHW2DContextIN,
2625 +                                                        PVRSRV_BRIDGE_OUT_SGX_REGISTER_HW_2D_CONTEXT *psSGXRegHW2DContextOUT,
2626 +                                                        PVRSRV_PER_PROCESS_DATA *psPerProc)
2627 +{
2628 +       IMG_HANDLE hDevCookieInt;
2629 +       PVRSRV_SGXDEV_INFO *psDevInfo;
2630 +       IMG_HANDLE hHW2DContextInt;
2631 +
2632 +       PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SGX_REGISTER_HW_2D_CONTEXT);
2633 +
2634 +       psSGXRegHW2DContextOUT->eError =
2635 +               PVRSRVLookupHandle(psPerProc->psHandleBase,
2636 +                                                  &hDevCookieInt,
2637 +                                                  psSGXRegHW2DContextIN->hDevCookie,
2638 +                                                  PVRSRV_HANDLE_TYPE_DEV_NODE);
2639 +       if(psSGXRegHW2DContextOUT->eError != PVRSRV_OK)
2640 +       {
2641 +               return 0;
2642 +       }
2643 +
2644         psDevInfo = (PVRSRV_SGXDEV_INFO *)((PVRSRV_DEVICE_NODE *)hDevCookieInt)->pvDevice;
2645
2646 -       SGXFlushHWRenderTargetKM(psDevInfo, psSGXFlushHWRenderTargetIN->sHWRTDataSetDevVAddr);
2647 +       hHW2DContextInt =
2648 +               SGXRegisterHW2DContextKM(hDevCookieInt,
2649 +                                                                        &psSGXRegHW2DContextIN->sHW2DContextDevVAddr);
2650 +
2651 +       if (hHW2DContextInt == IMG_NULL)
2652 +       {
2653 +               psSGXRegHW2DContextOUT->eError = PVRSRV_ERROR_GENERIC;
2654 +               return 0;
2655 +       }
2656 +
2657 +       psSGXRegHW2DContextOUT->eError =
2658 +               PVRSRVAllocHandle(psPerProc->psHandleBase,
2659 +                                                 &psSGXRegHW2DContextOUT->hHW2DContext,
2660 +                                                 hHW2DContextInt,
2661 +                                                 PVRSRV_HANDLE_TYPE_SGX_HW_2D_CONTEXT,
2662 +                                                 PVRSRV_HANDLE_ALLOC_FLAG_NONE);
2663
2664         return 0;
2665  }
2666
2667  static int
2668 -SGXUnregisterHWRenderContextBW(IMG_UINT32 ui32BridgeID,
2669 -                                                          PVRSRV_BRIDGE_IN_SGX_UNREGISTER_HW_RENDER_CONTEXT *psSGXUnregHWRenderContextIN,
2670 +SGXUnregisterHW2DContextBW(IMG_UINT32 ui32BridgeID,
2671 +                                                          PVRSRV_BRIDGE_IN_SGX_UNREGISTER_HW_2D_CONTEXT *psSGXUnregHW2DContextIN,
2672                                                            PVRSRV_BRIDGE_RETURN *psRetOUT,
2673                                                            PVRSRV_PER_PROCESS_DATA *psPerProc)
2674  {
2675 -       IMG_HANDLE hHWRenderContextInt;
2676 +       IMG_HANDLE hHW2DContextInt;
2677
2678 -       PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SGX_UNREGISTER_HW_RENDER_CONTEXT);
2679 +       PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SGX_UNREGISTER_HW_2D_CONTEXT);
2680
2681         psRetOUT->eError =
2682                 PVRSRVLookupHandle(psPerProc->psHandleBase,
2683 -                                                  &hHWRenderContextInt,
2684 -                                                  psSGXUnregHWRenderContextIN->hHWRenderContext,
2685 -                                                  PVRSRV_HANDLE_TYPE_SGX_HW_RENDER_CONTEXT);
2686 +                                                  &hHW2DContextInt,
2687 +                                                  psSGXUnregHW2DContextIN->hHW2DContext,
2688 +                                                  PVRSRV_HANDLE_TYPE_SGX_HW_2D_CONTEXT);
2689         if(psRetOUT->eError != PVRSRV_OK)
2690         {
2691                 return 0;
2692         }
2693
2694 -       psRetOUT->eError = SGXUnregisterHWRenderContextKM(hHWRenderContextInt);
2695 +       psRetOUT->eError = SGXUnregisterHW2DContextKM(hHW2DContextInt);
2696         if(psRetOUT->eError != PVRSRV_OK)
2697         {
2698                 return 0;
2699 @@ -2098,11 +2563,37 @@
2700
2701         psRetOUT->eError =
2702                 PVRSRVReleaseHandle(psPerProc->psHandleBase,
2703 -                                                       psSGXUnregHWRenderContextIN->hHWRenderContext,
2704 -                                                       PVRSRV_HANDLE_TYPE_SGX_HW_RENDER_CONTEXT);
2705 +                                                       psSGXUnregHW2DContextIN->hHW2DContext,
2706 +                                                       PVRSRV_HANDLE_TYPE_SGX_HW_2D_CONTEXT);
2707
2708         return 0;
2709  }
2710 +#endif
2711 +
2712 +static int
2713 +SGXFlushHWRenderTargetBW(IMG_UINT32 ui32BridgeID,
2714 +                                                 PVRSRV_BRIDGE_IN_SGX_FLUSH_HW_RENDER_TARGET *psSGXFlushHWRenderTargetIN,
2715 +                                                 PVRSRV_BRIDGE_RETURN *psRetOUT,
2716 +                                                 PVRSRV_PER_PROCESS_DATA *psPerProc)
2717 +{
2718 +       IMG_HANDLE hDevCookieInt;
2719 +
2720 +       PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_SGX_FLUSH_HW_RENDER_TARGET);
2721 +
2722 +       psRetOUT->eError =
2723 +               PVRSRVLookupHandle(psPerProc->psHandleBase,
2724 +                                                  &hDevCookieInt,
2725 +                                                  psSGXFlushHWRenderTargetIN->hDevCookie,
2726 +                                                  PVRSRV_HANDLE_TYPE_DEV_NODE);
2727 +       if(psRetOUT->eError != PVRSRV_OK)
2728 +       {
2729 +               return 0;
2730 +       }
2731 +
2732 +       SGXFlushHWRenderTargetKM(hDevCookieInt, psSGXFlushHWRenderTargetIN->sHWRTDataSetDevVAddr);
2733 +
2734 +       return 0;
2735 +}
2736
2737  #if defined(SGX_FEATURE_2D_HARDWARE)
2738
2739 @@ -2679,16 +3170,63 @@
2740                                         PVRSRV_BRIDGE_OUT_GET_MISC_INFO *psGetMiscInfoOUT,
2741                                         PVRSRV_PER_PROCESS_DATA *psPerProc)
2742  {
2743 +       PVRSRV_ERROR eError;
2744 +
2745         PVR_UNREFERENCED_PARAMETER(psPerProc);
2746 -
2747         PVRSRV_BRIDGE_ASSERT_CMD(ui32BridgeID, PVRSRV_BRIDGE_GET_MISC_INFO);
2748
2749         OSMemCopy(&psGetMiscInfoOUT->sMiscInfo,
2750                           &psGetMiscInfoIN->sMiscInfo,
2751                           sizeof(PVRSRV_MISC_INFO));
2752
2753 -       psGetMiscInfoOUT->eError = PVRSRVGetMiscInfoKM(&psGetMiscInfoIN->sMiscInfo);
2754 -       psGetMiscInfoOUT->sMiscInfo = psGetMiscInfoIN->sMiscInfo;
2755 +       if (psGetMiscInfoIN->sMiscInfo.ui32StateRequest & PVRSRV_MISC_INFO_MEMSTATS_PRESENT)
2756 +       {
2757 +
2758 +               eError = OSAllocMem(PVRSRV_OS_PAGEABLE_HEAP,
2759 +                            psGetMiscInfoOUT->sMiscInfo.ui32MemoryStrLen,
2760 +                                           (IMG_VOID **)&psGetMiscInfoOUT->sMiscInfo.pszMemoryStr, 0);
2761 +           if(eError != PVRSRV_OK)
2762 +           {
2763 +                   PVR_DPF((PVR_DBG_ERROR, "PVRSRVGetMiscInfoBW Out of memory"));
2764 +                   return -EFAULT;
2765 +           }
2766 +
2767 +           psGetMiscInfoOUT->eError = PVRSRVGetMiscInfoKM(&psGetMiscInfoOUT->sMiscInfo);
2768 +
2769 +
2770 +               eError = CopyToUserWrapper(psPerProc, ui32BridgeID,
2771 +                                   psGetMiscInfoIN->sMiscInfo.pszMemoryStr,
2772 +                                   psGetMiscInfoOUT->sMiscInfo.pszMemoryStr,
2773 +                                   psGetMiscInfoOUT->sMiscInfo.ui32MemoryStrLen);
2774 +
2775 +
2776 +           OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP,
2777 +                             psGetMiscInfoOUT->sMiscInfo.ui32MemoryStrLen,
2778 +                             (IMG_VOID *)psGetMiscInfoOUT->sMiscInfo.pszMemoryStr, 0);
2779 +
2780 +
2781 +           psGetMiscInfoOUT->sMiscInfo.pszMemoryStr = psGetMiscInfoIN->sMiscInfo.pszMemoryStr;
2782 +
2783 +           if(eError != PVRSRV_OK)
2784 +           {
2785 +
2786 +                   PVR_DPF((PVR_DBG_ERROR, "PVRSRVGetMiscInfoBW Error copy to user"));
2787 +                   return -EFAULT;
2788 +           }
2789 +       }
2790 +       else
2791 +       {
2792 +               psGetMiscInfoOUT->eError = PVRSRVGetMiscInfoKM(&psGetMiscInfoOUT->sMiscInfo);
2793 +       }
2794 +
2795 +       if (psGetMiscInfoIN->sMiscInfo.ui32StateRequest & PVRSRV_MISC_INFO_GLOBALEVENTOBJECT_PRESENT)
2796 +       {
2797 +               psGetMiscInfoOUT->eError = PVRSRVAllocHandle(psPerProc->psHandleBase,
2798 +                                                                                                       &psGetMiscInfoOUT->sMiscInfo.sGlobalEventObject.hOSEventKM,
2799 +                                                                                                       psGetMiscInfoOUT->sMiscInfo.sGlobalEventObject.hOSEventKM,
2800 +                                                                                                       PVRSRV_HANDLE_TYPE_SHARED_EVENT_OBJECT,
2801 +                                                                                                       PVRSRV_HANDLE_ALLOC_FLAG_SHARED);
2802 +       }
2803
2804         return 0;
2805  }
2806 @@ -3526,6 +4064,7 @@
2807                 psKernelMemInfo->ui32Flags;
2808         psAllocSharedSysMemOUT->sClientMemInfo.ui32AllocSize =
2809                 psKernelMemInfo->ui32AllocSize;
2810 +       psAllocSharedSysMemOUT->sClientMemInfo.hMappingInfo = psKernelMemInfo->sMemBlk.hOSMemHandle;
2811         psAllocSharedSysMemOUT->eError =
2812                 PVRSRVAllocHandle(psPerProc->psHandleBase,
2813                                                   &psAllocSharedSysMemOUT->sClientMemInfo.hKernelMemInfo,
2814 @@ -3641,7 +4180,7 @@
2815                 psKernelMemInfo->ui32Flags;
2816         psMapMemInfoMemOUT->sClientMemInfo.ui32AllocSize =
2817                 psKernelMemInfo->ui32AllocSize;
2818 -       psMapMemInfoMemOUT->sClientMemInfo.hMappingInfo = IMG_NULL;
2819 +       psMapMemInfoMemOUT->sClientMemInfo.hMappingInfo = psKernelMemInfo->sMemBlk.hOSMemHandle;
2820         psMapMemInfoMemOUT->eError =
2821                 PVRSRVAllocSubHandle(psPerProc->psHandleBase,
2822                                                   &psMapMemInfoMemOUT->sClientMemInfo.hKernelMemInfo,
2823 @@ -3972,6 +4511,8 @@
2824
2825
2826         SetDispatchTableEntry(PVRSRV_BRIDGE_EVENT_OBJECT_WAIT, PVRSRVEventObjectWaitBW);
2827 +       SetDispatchTableEntry(PVRSRV_BRIDGE_EVENT_OBJECT_OPEN, PVRSRVEventObjectOpenBW);
2828 +       SetDispatchTableEntry(PVRSRV_BRIDGE_EVENT_OBJECT_CLOSE, PVRSRVEventObjectCloseBW);
2829
2830
2831  #if defined(SUPPORT_SGX1)
2832 @@ -4009,7 +4550,18 @@
2833         SetDispatchTableEntry(PVRSRV_BRIDGE_SGX_REGISTER_HW_RENDER_CONTEXT, SGXRegisterHWRenderContextBW);
2834         SetDispatchTableEntry(PVRSRV_BRIDGE_SGX_FLUSH_HW_RENDER_TARGET, SGXFlushHWRenderTargetBW);
2835         SetDispatchTableEntry(PVRSRV_BRIDGE_SGX_UNREGISTER_HW_RENDER_CONTEXT, SGXUnregisterHWRenderContextBW);
2836 -
2837 +#if defined(SGX_FEATURE_2D_HARDWARE)
2838 +#if defined(TRANSFER_QUEUE)
2839 +       SetDispatchTableEntry(PVRSRV_BRIDGE_SGX_SUBMIT2D, SGXSubmit2DBW);
2840 +#endif
2841 +       SetDispatchTableEntry(PVRSRV_BRIDGE_SGX_REGISTER_HW_2D_CONTEXT, SGXRegisterHW2DContextBW);
2842 +       SetDispatchTableEntry(PVRSRV_BRIDGE_SGX_UNREGISTER_HW_2D_CONTEXT, SGXUnregisterHW2DContextBW);
2843 +#endif
2844 +       SetDispatchTableEntry(PVRSRV_BRIDGE_SGX_REGISTER_HW_TRANSFER_CONTEXT, SGXRegisterHWTransferContextBW);
2845 +       SetDispatchTableEntry(PVRSRV_BRIDGE_SGX_UNREGISTER_HW_TRANSFER_CONTEXT, SGXUnregisterHWTransferContextBW);
2846 +#endif
2847 +#if defined(SUPPORT_SGX_HWPERF)
2848 +       SetDispatchTableEntry(PVRSRV_BRIDGE_SGX_READ_HWPERF_COUNTERS, SGXReadHWPerfCountersBW);
2849  #endif
2850
2851
2852 @@ -4059,7 +4611,7 @@
2853         {
2854                 if(gbInitServerRan)
2855                 {
2856 -                       if(!gbInitServerSuccessful)
2857 +                       if(!gbInitSuccessful)
2858                         {
2859                                 PVR_DPF((PVR_DBG_ERROR, "%s: Initialisation failed.  Driver unusable.",
2860                                                  __FUNCTION__));
2861 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/common/deviceclass.c git/drivers/gpu/pvr/services4/srvkm/common/deviceclass.c
2862 --- git/drivers/gpu/pvr/services4/srvkm/common/deviceclass.c    2009-01-05 20:00:44.000000000 +0100
2863 +++ git/drivers/gpu/pvr/services4/srvkm/common/deviceclass.c    2008-12-18 15:47:29.000000000 +0100
2864 @@ -24,7 +24,6 @@
2865   *
2866   ******************************************************************************/
2867
2868 -#include <linux/module.h>
2869  #include "services_headers.h"
2870  #include "buffer_manager.h"
2871  #include "kernelbuffer.h"
2872 @@ -1128,7 +1127,8 @@
2873
2874
2875         apsSrcSync[0] = psBuffer->sDeviceClassBuffer.psKernelSyncInfo;
2876 -       if(psBuffer->psSwapChain->psLastFlipBuffer)
2877 +       if(psBuffer->psSwapChain->psLastFlipBuffer &&
2878 +               psBuffer != psBuffer->psSwapChain->psLastFlipBuffer)
2879         {
2880                 apsSrcSync[1] = psBuffer->psSwapChain->psLastFlipBuffer->sDeviceClassBuffer.psKernelSyncInfo;
2881                 ui32NumSrcSyncs++;
2882 @@ -1389,7 +1389,7 @@
2883  }
2884
2885
2886 -IMG_VOID PVRSRVSetDCState(IMG_UINT32 ui32State)
2887 +IMG_VOID IMG_CALLCONV PVRSRVSetDCState(IMG_UINT32 ui32State)
2888  {
2889         PVRSRV_DISPLAYCLASS_INFO        *psDCInfo;
2890         PVRSRV_DEVICE_NODE                      *psDeviceNode;
2891 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/common/devicemem.c git/drivers/gpu/pvr/services4/srvkm/common/devicemem.c
2892 --- git/drivers/gpu/pvr/services4/srvkm/common/devicemem.c      2009-01-05 20:00:44.000000000 +0100
2893 +++ git/drivers/gpu/pvr/services4/srvkm/common/devicemem.c      2008-12-18 15:47:29.000000000 +0100
2894 @@ -422,7 +422,8 @@
2895         BM_HEAP                                 *psBMHeap;
2896         IMG_HANDLE                              hDevMemContext;
2897
2898 -       if (!hDevMemHeap)
2899 +       if (!hDevMemHeap ||
2900 +               (ui32Size == 0))
2901         {
2902                 return PVRSRV_ERROR_INVALID_PARAMS;
2903         }
2904 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/common/handle.c git/drivers/gpu/pvr/services4/srvkm/common/handle.c
2905 --- git/drivers/gpu/pvr/services4/srvkm/common/handle.c 2009-01-05 20:00:44.000000000 +0100
2906 +++ git/drivers/gpu/pvr/services4/srvkm/common/handle.c 2008-12-18 15:47:29.000000000 +0100
2907 @@ -25,6 +25,10 @@
2908   ******************************************************************************/
2909
2910  #ifdef PVR_SECURE_HANDLES
2911 +#ifdef __linux__
2912 +#include <linux/vmalloc.h>
2913 +#endif
2914 +
2915  #include <stddef.h>
2916
2917  #include "services_headers.h"
2918 @@ -36,6 +40,8 @@
2919  #define        HANDLE_BLOCK_SIZE       256
2920  #endif
2921
2922 +#define        HANDLE_LARGE_BLOCK_SIZE 1024
2923 +
2924  #define        HANDLE_HASH_TAB_INIT_SIZE       32
2925
2926  #define        INDEX_IS_VALID(psBase, i) ((i) < (psBase)->ui32TotalHandCount)
2927 @@ -100,13 +106,13 @@
2928  {
2929         IMG_BOOL bIsEmpty;
2930
2931 -       bIsEmpty = (psList->ui32Next == ui32Index);
2932 +       bIsEmpty = (IMG_BOOL)(psList->ui32Next == ui32Index);
2933
2934  #ifdef DEBUG
2935         {
2936                 IMG_BOOL bIsEmpty2;
2937
2938 -               bIsEmpty2 = (psList->ui32Prev == ui32Index);
2939 +               bIsEmpty2 = (IMG_BOOL)(psList->ui32Prev == ui32Index);
2940                 PVR_ASSERT(bIsEmpty == bIsEmpty2);
2941         }
2942  #endif
2943 @@ -114,6 +120,7 @@
2944         return bIsEmpty;
2945  }
2946
2947 +#ifdef DEBUG
2948  #ifdef INLINE_IS_PRAGMA
2949  #pragma inline(NoChildren)
2950  #endif
2951 @@ -143,6 +150,7 @@
2952         }
2953         return IMG_FALSE;
2954  }
2955 +#endif
2956
2957  #ifdef INLINE_IS_PRAGMA
2958  #pragma inline(ParentHandle)
2959 @@ -328,6 +336,14 @@
2960
2961         if (psBase->psHandleArray != IMG_NULL)
2962         {
2963 +#ifdef __linux__
2964 +               if (psBase->bVmallocUsed)
2965 +               {
2966 +                       vfree(psBase->psHandleArray);
2967 +                       psBase->psHandleArray = IMG_NULL;
2968 +                       return PVRSRV_OK;
2969 +               }
2970 +#endif
2971                 eError = OSFreeMem(PVRSRV_OS_NON_PAGEABLE_HEAP,
2972                         psBase->ui32TotalHandCount * sizeof(struct sHandle),
2973                         psBase->psHandleArray,
2974 @@ -363,6 +379,7 @@
2975
2976                 PVR_ASSERT(hHandle != IMG_NULL);
2977                 PVR_ASSERT(hHandle == INDEX_TO_HANDLE(psBase, ui32Index));
2978 +               PVR_UNREFERENCED_PARAMETER(hHandle);
2979         }
2980
2981
2982 @@ -495,22 +512,46 @@
2983         return (IMG_HANDLE) HASH_Retrieve_Extended(psBase->psHashTab, aKey);
2984  }
2985
2986 +#define        NEW_HANDLE_ARRAY_SIZE(psBase, handleNumberIncrement)    \
2987 +       (((psBase)->ui32TotalHandCount +  (handleNumberIncrement)) * \
2988 +       sizeof(struct sHandle))
2989 +
2990  static PVRSRV_ERROR IncreaseHandleArraySize(PVRSRV_HANDLE_BASE *psBase)
2991  {
2992         struct sHandle *psNewHandleArray;
2993         IMG_HANDLE hNewHandBlockAlloc;
2994         PVRSRV_ERROR eError;
2995         struct sHandle *psHandle;
2996 +       IMG_UINT32 ui32HandleNumberIncrement =  HANDLE_BLOCK_SIZE;
2997 +       IMG_UINT32 ui32NewHandleArraySize = NEW_HANDLE_ARRAY_SIZE(psBase, ui32HandleNumberIncrement);
2998 +#ifdef __linux__
2999 +       IMG_BOOL bVmallocUsed = IMG_FALSE;
3000 +#endif
3001
3002
3003         eError = OSAllocMem(PVRSRV_OS_NON_PAGEABLE_HEAP,
3004 -               (psBase->ui32TotalHandCount + HANDLE_BLOCK_SIZE) * sizeof(struct sHandle),
3005 +               ui32NewHandleArraySize,
3006                 (IMG_PVOID *)&psNewHandleArray,
3007                 &hNewHandBlockAlloc);
3008         if (eError != PVRSRV_OK)
3009         {
3010 +#ifdef __linux__
3011 +               PVR_TRACE(("IncreaseHandleArraySize:  OSAllocMem failed (%d), trying vmalloc", eError));
3012 +
3013 +               ui32HandleNumberIncrement =  HANDLE_LARGE_BLOCK_SIZE;
3014 +               ui32NewHandleArraySize = NEW_HANDLE_ARRAY_SIZE(psBase, ui32HandleNumberIncrement);
3015 +
3016 +               psNewHandleArray = vmalloc(ui32NewHandleArraySize);
3017 +               if (psNewHandleArray == IMG_NULL)
3018 +               {
3019 +                       PVR_TRACE(("IncreaseHandleArraySize:  vmalloc failed"));
3020 +                       return PVRSRV_ERROR_OUT_OF_MEMORY;
3021 +               }
3022 +               bVmallocUsed = IMG_TRUE;
3023 +#else
3024                 PVR_DPF((PVR_DBG_ERROR, "IncreaseHandleArraySize: Couldn't allocate new handle array (%d)", eError));
3025                 return eError;
3026 +#endif
3027         }
3028
3029
3030 @@ -521,7 +562,7 @@
3031
3032
3033         for(psHandle = psNewHandleArray + psBase->ui32TotalHandCount;
3034 -               psHandle < psNewHandleArray + psBase->ui32TotalHandCount + HANDLE_BLOCK_SIZE;
3035 +               psHandle < psNewHandleArray + psBase->ui32TotalHandCount + ui32HandleNumberIncrement;
3036                 psHandle++)
3037         {
3038                 psHandle->eType = PVRSRV_HANDLE_TYPE_NONE;
3039 @@ -538,15 +579,18 @@
3040
3041         psBase->psHandleArray = psNewHandleArray;
3042         psBase->hHandBlockAlloc = hNewHandBlockAlloc;
3043 +#ifdef __linux__
3044 +       psBase->bVmallocUsed = bVmallocUsed;
3045 +#endif
3046
3047
3048         PVR_ASSERT(psBase->ui32FreeHandCount == 0);
3049 -       psBase->ui32FreeHandCount = HANDLE_BLOCK_SIZE;
3050 +       psBase->ui32FreeHandCount = ui32HandleNumberIncrement;
3051
3052         PVR_ASSERT(psBase->ui32FirstFreeIndex == 0);
3053         psBase->ui32FirstFreeIndex = psBase->ui32TotalHandCount;
3054
3055 -       psBase->ui32TotalHandCount += HANDLE_BLOCK_SIZE;
3056 +       psBase->ui32TotalHandCount += ui32HandleNumberIncrement;
3057
3058         PVR_ASSERT(psBase->ui32LastFreeIndexPlusOne == 0);
3059         psBase->ui32LastFreeIndexPlusOne = psBase->ui32TotalHandCount;
3060 @@ -564,7 +608,7 @@
3061
3062         PVR_ASSERT(eType != PVRSRV_HANDLE_TYPE_NONE);
3063
3064 -       PVR_ASSERT(psBase->psHashTab != NULL);
3065 +       PVR_ASSERT(psBase->psHashTab != IMG_NULL);
3066
3067         if (!(eFlag & PVRSRV_HANDLE_ALLOC_FLAG_MULTI))
3068         {
3069 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/common/power.c git/drivers/gpu/pvr/services4/srvkm/common/power.c
3070 --- git/drivers/gpu/pvr/services4/srvkm/common/power.c  2009-01-05 20:00:44.000000000 +0100
3071 +++ git/drivers/gpu/pvr/services4/srvkm/common/power.c  2008-12-18 15:47:29.000000000 +0100
3072 @@ -207,6 +207,21 @@
3073  }
3074
3075
3076 +PVRSRV_ERROR PVRSRVSetDevicePowerStateCoreKM(IMG_UINT32                        ui32DeviceIndex,
3077 +                                             PVR_POWER_STATE   eNewPowerState)
3078 +{
3079 +       PVRSRV_ERROR    eError;
3080 +       eError = PVRSRVDevicePrePowerStateKM(IMG_FALSE, ui32DeviceIndex, eNewPowerState);
3081 +       if(eError != PVRSRV_OK)
3082 +       {
3083 +               return eError;
3084 +       }
3085 +
3086 +       eError = PVRSRVDevicePostPowerStateKM(IMG_FALSE, ui32DeviceIndex, eNewPowerState);
3087 +       return eError;
3088 +}
3089 +
3090 +
3091  IMG_EXPORT
3092  PVRSRV_ERROR PVRSRVSetDevicePowerStateKM(IMG_UINT32                    ui32DeviceIndex,
3093                                                                                  PVR_POWER_STATE        eNewPowerState,
3094 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/common/pvrsrv.c git/drivers/gpu/pvr/services4/srvkm/common/pvrsrv.c
3095 --- git/drivers/gpu/pvr/services4/srvkm/common/pvrsrv.c 2009-01-05 20:00:44.000000000 +0100
3096 +++ git/drivers/gpu/pvr/services4/srvkm/common/pvrsrv.c 2008-12-18 15:47:29.000000000 +0100
3097 @@ -28,6 +28,7 @@
3098  #include "buffer_manager.h"
3099  #include "handle.h"
3100  #include "perproc.h"
3101 +#include "pdump_km.h"
3102
3103
3104  #include "ra.h"
3105 @@ -180,7 +181,7 @@
3106  }
3107
3108
3109 -PVRSRV_ERROR PVRSRVInit(PSYS_DATA psSysData)
3110 +PVRSRV_ERROR IMG_CALLCONV PVRSRVInit(PSYS_DATA psSysData)
3111  {
3112         PVRSRV_ERROR    eError;
3113
3114 @@ -215,6 +216,20 @@
3115         gpsSysData->eCurrentPowerState = PVRSRV_POWER_STATE_D0;
3116         gpsSysData->eFailedPowerState = PVRSRV_POWER_Unspecified;
3117
3118 +
3119 +       if(OSAllocMem( PVRSRV_OS_PAGEABLE_HEAP,
3120 +                                        sizeof(PVRSRV_EVENTOBJECT) ,
3121 +                                        (IMG_VOID **)&psSysData->psGlobalEventObject, 0) != PVRSRV_OK)
3122 +       {
3123 +
3124 +               goto Error;
3125 +       }
3126 +
3127 +       if(OSEventObjectCreate("PVRSRV_GLOBAL_EVENTOBJECT", psSysData->psGlobalEventObject) != PVRSRV_OK)
3128 +       {
3129 +               goto Error;
3130 +       }
3131 +
3132         return eError;
3133
3134  Error:
3135 @@ -224,12 +239,21 @@
3136
3137
3138
3139 -IMG_VOID PVRSRVDeInit(PSYS_DATA psSysData)
3140 +IMG_VOID IMG_CALLCONV PVRSRVDeInit(PSYS_DATA psSysData)
3141  {
3142         PVRSRV_ERROR    eError;
3143
3144         PVR_UNREFERENCED_PARAMETER(psSysData);
3145
3146 +
3147 +       if(psSysData->psGlobalEventObject)
3148 +       {
3149 +               OSEventObjectDestroy(psSysData->psGlobalEventObject);
3150 +               OSFreeMem( PVRSRV_OS_PAGEABLE_HEAP,
3151 +                                                sizeof(PVRSRV_EVENTOBJECT) ,
3152 +                                                psSysData->psGlobalEventObject, 0);
3153 +       }
3154 +
3155         eError = PVRSRVHandleDeInit();
3156         if (eError != PVRSRV_OK)
3157         {
3158 @@ -246,10 +270,10 @@
3159  }
3160
3161
3162 -PVRSRV_ERROR PVRSRVRegisterDevice(PSYS_DATA psSysData,
3163 -                                                                 PVRSRV_ERROR (*pfnRegisterDevice)(PVRSRV_DEVICE_NODE*),
3164 -                                                                 IMG_UINT32 ui32SOCInterruptBit,
3165 -                                                                 IMG_UINT32 *pui32DeviceIndex)
3166 +PVRSRV_ERROR IMG_CALLCONV PVRSRVRegisterDevice(PSYS_DATA psSysData,
3167 +                                                                                         PVRSRV_ERROR (*pfnRegisterDevice)(PVRSRV_DEVICE_NODE*),
3168 +                                                                                         IMG_UINT32 ui32SOCInterruptBit,
3169 +                                                                                         IMG_UINT32 *pui32DeviceIndex)
3170  {
3171         PVRSRV_ERROR            eError;
3172         PVRSRV_DEVICE_NODE      *psDeviceNode;
3173 @@ -342,6 +366,61 @@
3174                 }
3175         }
3176
3177 +
3178 +
3179 +
3180 +       eError = PVRSRVResManConnect(RESMAN_KERNEL_PROCESSID, IMG_TRUE);
3181 +       if (eError != PVRSRV_OK)
3182 +       {
3183 +               PVR_DPF((PVR_DBG_ERROR,"PVRSRVInitialiseDevice: Failed PVRSRVResManConnect call"));
3184 +               return eError;
3185 +       }
3186 +
3187 +       return PVRSRV_OK;
3188 +}
3189 +
3190 +
3191 +PVRSRV_ERROR IMG_CALLCONV PVRSRVFinaliseSystem(IMG_BOOL bInitSuccessful)
3192 +{
3193 +       PVRSRV_DEVICE_NODE      *psDeviceNode;
3194 +       SYS_DATA                *psSysData;
3195 +       PVRSRV_ERROR            eError;
3196 +
3197 +       PVR_DPF((PVR_DBG_MESSAGE, "PVRSRVFinaliseSystem"));
3198 +
3199 +       eError = SysAcquireData(&psSysData);
3200 +       if(eError != PVRSRV_OK)
3201 +       {
3202 +               PVR_DPF((PVR_DBG_ERROR,"PVRSRVFinaliseSystem: Failed to get SysData"));
3203 +               return(eError);
3204 +       }
3205 +
3206 +       if (bInitSuccessful)
3207 +       {
3208 +               eError = SysFinalise();
3209 +               if (eError != PVRSRV_OK)
3210 +               {
3211 +                       PVR_DPF((PVR_DBG_ERROR,"PVRSRVFinaliseSystem: SysFinalise failed (%d)", eError));
3212 +                       return eError;
3213 +               }
3214 +
3215 +
3216 +               psDeviceNode = psSysData->psDeviceNodeList;
3217 +               while (psDeviceNode)
3218 +               {
3219 +                       eError = PVRSRVSetDevicePowerStateKM(psDeviceNode->sDevId.ui32DeviceIndex,
3220 +                                                                                                                        PVRSRV_POWER_Unspecified,
3221 +                                                                                                                        KERNEL_ID, IMG_FALSE);
3222 +                       if (eError != PVRSRV_OK)
3223 +                       {
3224 +                               PVR_DPF((PVR_DBG_ERROR,"PVRSRVFinaliseSystem: Failed PVRSRVSetDevicePowerStateKM call (device index: %d)", psDeviceNode->sDevId.ui32DeviceIndex));
3225 +                       }
3226 +                       psDeviceNode = psDeviceNode->psNext;
3227 +               }
3228 +       }
3229 +
3230 +       PDUMPENDINITPHASE();
3231 +
3232         return PVRSRV_OK;
3233  }
3234
3235 @@ -408,7 +487,7 @@
3236  }
3237
3238
3239 -PVRSRV_ERROR PVRSRVDeinitialiseDevice(IMG_UINT32 ui32DevIndex)
3240 +PVRSRV_ERROR IMG_CALLCONV PVRSRVDeinitialiseDevice(IMG_UINT32 ui32DevIndex)
3241  {
3242         PVRSRV_DEVICE_NODE      *psDeviceNode;
3243         PVRSRV_DEVICE_NODE      **ppsDevNode;
3244 @@ -441,10 +520,6 @@
3245
3246
3247
3248 -
3249 -#if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT)
3250 -
3251 -
3252         eError = PVRSRVSetDevicePowerStateKM(ui32DevIndex,
3253                                                                                  PVRSRV_POWER_STATE_D3,
3254                                                                                  KERNEL_ID,
3255 @@ -454,7 +529,16 @@
3256                 PVR_DPF((PVR_DBG_ERROR,"PVRSRVDeinitialiseDevice: Failed PVRSRVSetDevicePowerStateKM call"));
3257                 return eError;
3258         }
3259 -#endif
3260 +
3261 +
3262 +
3263 +
3264 +       eError = PVRSRVResManConnect(RESMAN_KERNEL_PROCESSID, IMG_FALSE);
3265 +       if (eError != PVRSRV_OK)
3266 +       {
3267 +               PVR_DPF((PVR_DBG_ERROR,"PVRSRVDeinitialiseDevice: Failed PVRSRVResManConnect call"));
3268 +               return eError;
3269 +       }
3270
3271
3272
3273 @@ -481,11 +565,11 @@
3274
3275
3276  IMG_EXPORT
3277 -PVRSRV_ERROR PollForValueKM (volatile IMG_UINT32* pui32LinMemAddr,
3278 -                                                                         IMG_UINT32 ui32Value,
3279 -                                                                         IMG_UINT32 ui32Mask,
3280 -                                                                         IMG_UINT32 ui32Waitus,
3281 -                                                                         IMG_UINT32 ui32Tries)
3282 +PVRSRV_ERROR IMG_CALLCONV PollForValueKM (volatile IMG_UINT32* pui32LinMemAddr,
3283 +                                                                                 IMG_UINT32 ui32Value,
3284 +                                                                                 IMG_UINT32 ui32Mask,
3285 +                                                                                 IMG_UINT32 ui32Waitus,
3286 +                                                                                 IMG_UINT32 ui32Tries)
3287  {
3288         IMG_BOOL        bStart = IMG_FALSE;
3289         IMG_UINT32      uiStart = 0, uiCurrent=0, uiMaxTime;
3290 @@ -585,7 +669,8 @@
3291
3292         if(psMiscInfo->ui32StateRequest & ~(PVRSRV_MISC_INFO_TIMER_PRESENT
3293                                                                                 |PVRSRV_MISC_INFO_CLOCKGATE_PRESENT
3294 -                                                                               |PVRSRV_MISC_INFO_MEMSTATS_PRESENT))
3295 +                                                                               |PVRSRV_MISC_INFO_MEMSTATS_PRESENT
3296 +                                                                               |PVRSRV_MISC_INFO_GLOBALEVENTOBJECT_PRESENT))
3297         {
3298                 PVR_DPF((PVR_DBG_ERROR,"PVRSRVGetMiscInfoKM: invalid state request flags"));
3299                 return PVRSRV_ERROR_INVALID_PARAMS;
3300 @@ -719,13 +804,20 @@
3301                 i32Count = OSSNPrintf(pszStr, 100, "\n\0");
3302                 UPDATE_SPACE(pszStr, i32Count, ui32StrLen);
3303         }
3304 +
3305 +       if((psMiscInfo->ui32StateRequest & PVRSRV_MISC_INFO_GLOBALEVENTOBJECT_PRESENT)
3306 +       && psSysData->psGlobalEventObject)
3307 +       {
3308 +               psMiscInfo->ui32StatePresent |= PVRSRV_MISC_INFO_GLOBALEVENTOBJECT_PRESENT;
3309 +               psMiscInfo->sGlobalEventObject = *psSysData->psGlobalEventObject;
3310 +       }
3311
3312         return PVRSRV_OK;
3313  }
3314
3315
3316 -PVRSRV_ERROR PVRSRVGetFBStatsKM(IMG_UINT32             *pui32Total,
3317 -                                                               IMG_UINT32              *pui32Available)
3318 +PVRSRV_ERROR IMG_CALLCONV PVRSRVGetFBStatsKM(IMG_UINT32                *pui32Total,
3319 +                                                                                        IMG_UINT32             *pui32Available)
3320  {
3321         IMG_UINT32 ui32Total = 0, i = 0;
3322         IMG_UINT32 ui32Available = 0;
3323 @@ -746,7 +838,7 @@
3324  }
3325
3326
3327 -IMG_BOOL PVRSRVDeviceLISR(PVRSRV_DEVICE_NODE *psDeviceNode)
3328 +IMG_BOOL IMG_CALLCONV PVRSRVDeviceLISR(PVRSRV_DEVICE_NODE *psDeviceNode)
3329  {
3330         SYS_DATA                        *psSysData;
3331         IMG_BOOL                        bStatus = IMG_FALSE;
3332 @@ -776,7 +868,7 @@
3333  }
3334
3335
3336 -IMG_BOOL PVRSRVSystemLISR(IMG_VOID *pvSysData)
3337 +IMG_BOOL IMG_CALLCONV PVRSRVSystemLISR(IMG_VOID *pvSysData)
3338  {
3339         SYS_DATA                        *psSysData = pvSysData;
3340         IMG_BOOL                        bStatus = IMG_FALSE;
3341 @@ -826,7 +918,7 @@
3342  }
3343
3344
3345 -IMG_VOID PVRSRVMISR(IMG_VOID *pvSysData)
3346 +IMG_VOID IMG_CALLCONV PVRSRVMISR(IMG_VOID *pvSysData)
3347  {
3348         SYS_DATA                        *psSysData = pvSysData;
3349         PVRSRV_DEVICE_NODE      *psDeviceNode;
3350 @@ -853,10 +945,21 @@
3351         {
3352                 PVRSRVProcessQueues(ISR_ID, IMG_FALSE);
3353         }
3354 +
3355 +
3356 +       if (psSysData->psGlobalEventObject)
3357 +       {
3358 +               IMG_HANDLE hOSEventKM = psSysData->psGlobalEventObject->hOSEventKM;
3359 +               if(hOSEventKM)
3360 +               {
3361 +                       OSEventObjectSignal(hOSEventKM);
3362 +               }
3363 +       }
3364  }
3365
3366
3367 -PVRSRV_ERROR PVRSRVSaveRestoreLiveSegments(IMG_HANDLE hArena, IMG_PBYTE pbyBuffer, IMG_UINT32 *puiBufSize, IMG_BOOL bSave)
3368 +PVRSRV_ERROR IMG_CALLCONV PVRSRVSaveRestoreLiveSegments(IMG_HANDLE hArena, IMG_PBYTE pbyBuffer,
3369 +                                                                                                               IMG_UINT32 *puiBufSize, IMG_BOOL bSave)
3370  {
3371         IMG_UINT32         uiBytesSaved = 0;
3372         IMG_PVOID          pvLocalMemCPUVAddr;
3373 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/common/queue.c git/drivers/gpu/pvr/services4/srvkm/common/queue.c
3374 --- git/drivers/gpu/pvr/services4/srvkm/common/queue.c  2009-01-05 20:00:44.000000000 +0100
3375 +++ git/drivers/gpu/pvr/services4/srvkm/common/queue.c  2008-12-18 15:47:29.000000000 +0100
3376 @@ -760,14 +760,10 @@
3377
3378         PVRSRVCommandCompleteCallbacks();
3379
3380 -#if defined(SYS_USING_INTERRUPTS)
3381         if(bScheduleMISR)
3382         {
3383                 OSScheduleMISR(psSysData);
3384         }
3385 -#else
3386 -       PVR_UNREFERENCED_PARAMETER(bScheduleMISR);
3387 -#endif
3388  }
3389
3390
3391 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/common/resman.c git/drivers/gpu/pvr/services4/srvkm/common/resman.c
3392 --- git/drivers/gpu/pvr/services4/srvkm/common/resman.c 2009-01-05 20:00:44.000000000 +0100
3393 +++ git/drivers/gpu/pvr/services4/srvkm/common/resman.c 2008-12-18 15:47:29.000000000 +0100
3394 @@ -145,6 +141,10 @@
3395
3396                 case RESMAN_TYPE_HW_RENDER_CONTEXT:
3397                         return "HW Render Context Resource";
3398 +               case RESMAN_TYPE_HW_TRANSFER_CONTEXT:
3399 +                       return "HW Transfer Context Resource";
3400 +               case RESMAN_TYPE_HW_2D_CONTEXT:
3401 +                       return "HW 2D Context Resource";
3402                 case RESMAN_TYPE_SHARED_PB_DESC:
3403                         return "Shared Parameter Buffer Description Resource";
3404
3405 @@ -378,7 +378,12 @@
3406                 FreeResourceByCriteria(psProcess, RESMAN_CRITERIA_RESTYPE, RESMAN_TYPE_OS_USERMODE_MAPPING, 0, 0, IMG_TRUE);
3407
3408
3409 +               FreeResourceByCriteria(psProcess, RESMAN_CRITERIA_RESTYPE, RESMAN_TYPE_EVENT_OBJECT, 0, 0, IMG_TRUE);
3410 +
3411 +
3412                 FreeResourceByCriteria(psProcess, RESMAN_CRITERIA_RESTYPE, RESMAN_TYPE_HW_RENDER_CONTEXT, 0, 0, IMG_TRUE);
3413 +               FreeResourceByCriteria(psProcess, RESMAN_CRITERIA_RESTYPE, RESMAN_TYPE_HW_TRANSFER_CONTEXT, 0, 0, IMG_TRUE);
3414 +               FreeResourceByCriteria(psProcess, RESMAN_CRITERIA_RESTYPE, RESMAN_TYPE_HW_2D_CONTEXT, 0, 0, IMG_TRUE);
3415                 FreeResourceByCriteria(psProcess, RESMAN_CRITERIA_RESTYPE, RESMAN_TYPE_TRANSFER_CONTEXT, 0, 0, IMG_TRUE);
3416                 FreeResourceByCriteria(psProcess, RESMAN_CRITERIA_RESTYPE, RESMAN_TYPE_SHARED_PB_DESC, 0, 0, IMG_TRUE);
3417
3418 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/devices/sgx/mmu.c git/drivers/gpu/pvr/services4/srvkm/devices/sgx/mmu.c
3419 --- git/drivers/gpu/pvr/services4/srvkm/devices/sgx/mmu.c       2009-01-05 20:00:44.000000000 +0100
3420 +++ git/drivers/gpu/pvr/services4/srvkm/devices/sgx/mmu.c       2008-12-18 15:47:29.000000000 +0100
3421 @@ -1966,6 +1966,8 @@
3422  }
3423
3424
3425 +
3426 +
3427  #if PAGE_TEST
3428  static void PageTest(void* pMem, IMG_DEV_PHYADDR sDevPAddr)
3429  {
3430 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/devices/sgx/mmu.h git/drivers/gpu/pvr/services4/srvkm/devices/sgx/mmu.h
3431 --- git/drivers/gpu/pvr/services4/srvkm/devices/sgx/mmu.h       2009-01-05 20:00:44.000000000 +0100
3432 +++ git/drivers/gpu/pvr/services4/srvkm/devices/sgx/mmu.h       2008-12-18 15:47:29.000000000 +0100
3433 @@ -27,6 +27,8 @@
3434  #ifndef _MMU_H_
3435  #define _MMU_H_
3436
3437 +#include "sgxinfokm.h"
3438 +
3439  PVRSRV_ERROR
3440  MMU_Initialise (PVRSRV_DEVICE_NODE *psDeviceNode, MMU_CONTEXT **ppsMMUContext, IMG_DEV_PHYADDR *psPDDevPAddr);
3441
3442 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/devices/sgx/pb.c git/drivers/gpu/pvr/services4/srvkm/devices/sgx/pb.c
3443 --- git/drivers/gpu/pvr/services4/srvkm/devices/sgx/pb.c        2009-01-05 20:00:44.000000000 +0100
3444 +++ git/drivers/gpu/pvr/services4/srvkm/devices/sgx/pb.c        2008-12-18 15:47:29.000000000 +0100
3445 @@ -56,11 +56,26 @@
3446
3447         psSGXDevInfo = (PVRSRV_SGXDEV_INFO *)((PVRSRV_DEVICE_NODE *)hDevCookie)->pvDevice;
3448
3449 +
3450 +
3451 +
3452 +#if defined(FIXME)
3453         for(psStubPBDesc = psSGXDevInfo->psStubPBDescListKM;
3454                 psStubPBDesc != IMG_NULL;
3455                 psStubPBDesc = psStubPBDesc->psNext)
3456         {
3457                 if(psStubPBDesc->ui32TotalPBSize == ui32TotalPBSize)
3458 +#else
3459 +       psStubPBDesc = psSGXDevInfo->psStubPBDescListKM;
3460 +       if (psStubPBDesc != IMG_NULL)
3461 +       {
3462 +               if(psStubPBDesc->ui32TotalPBSize != ui32TotalPBSize)
3463 +               {
3464 +                       PVR_DPF((PVR_DBG_ERROR,
3465 +                                       "SGXFindSharedPBDescKM: Shared PB requested with different size (0x%x) from existing shared PB (0x%x) - requested size ignored",
3466 +                                       ui32TotalPBSize, psStubPBDesc->ui32TotalPBSize));
3467 +               }
3468 +#endif
3469                 {
3470                         IMG_UINT32 i;
3471                         PRESMAN_ITEM psResItem;
3472 @@ -125,20 +140,6 @@
3473         return eError;
3474  }
3475
3476 -IMG_VOID ResetPBs(PVRSRV_SGXDEV_INFO* psSGXDevInfo)
3477 -{
3478 -       PVRSRV_STUB_PBDESC **ppsStubPBDesc;
3479 -
3480 -       for(ppsStubPBDesc = (PVRSRV_STUB_PBDESC **)&psSGXDevInfo->psStubPBDescListKM;
3481 -               *ppsStubPBDesc != IMG_NULL;
3482 -               ppsStubPBDesc = &(*ppsStubPBDesc)->psNext)
3483 -       {
3484 -               PVRSRV_STUB_PBDESC *psStubPBDesc = *ppsStubPBDesc;
3485 -               IMG_UINT32* pui32Flags = (IMG_UINT32*)psStubPBDesc->psHWPBDescKernelMemInfo->pvLinAddrKM;
3486 -               *pui32Flags |= 1;
3487 -       }
3488 -}
3489 -
3490
3491  static PVRSRV_ERROR
3492  SGXCleanupSharedPBDescKM(PVRSRV_STUB_PBDESC *psStubPBDescIn)
3493 @@ -266,7 +267,7 @@
3494                         {
3495                                 PVR_DPF((PVR_DBG_ERROR,
3496                                         "SGXAddSharedPBDescKM: "
3497 -                                       "Failed to register exisitng shared "
3498 +                                       "Failed to register existing shared "
3499                                         "PBDesc with the resource manager"));
3500                                 goto NoAddKeepPB;
3501                         }
3502 @@ -301,7 +302,7 @@
3503         }
3504
3505
3506 -       psStubPBDesc->ppsSubKernelMemInfos=IMG_NULL;
3507 +       psStubPBDesc->ppsSubKernelMemInfos = IMG_NULL;
3508
3509         if(OSAllocMem(PVRSRV_OS_NON_PAGEABLE_HEAP,
3510                                   sizeof(PVRSRV_KERNEL_MEM_INFO *)
3511 @@ -395,8 +396,10 @@
3512         }
3513
3514  NoAddKeepPB:
3515 -       for(i=0; i<ui32SharedPBDescSubKernelMemInfosCount; i++)
3516 +       for (i = 0; i < ui32SharedPBDescSubKernelMemInfosCount; i++)
3517 +       {
3518                 PVRSRVFreeDeviceMemKM(hDevCookie, ppsSharedPBDescSubKernelMemInfos[i], IMG_FALSE);
3519 +       }
3520
3521         PVRSRVFreeSharedSysMemoryKM(psSharedPBDescKernelMemInfo);
3522         PVRSRVFreeDeviceMemKM(hDevCookie, psStubPBDesc->psHWPBDescKernelMemInfo, IMG_FALSE);
3523 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgx2dcore.c git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgx2dcore.c
3524 --- git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgx2dcore.c 2009-01-05 20:00:44.000000000 +0100
3525 +++ git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgx2dcore.c 2008-12-18 15:47:29.000000000 +0100
3526 @@ -27,12 +27,15 @@
3527  #include "sgxdefs.h"
3528  #include "services_headers.h"
3529  #include "sgxinfo.h"
3530 +#include "sgxinfokm.h"
3531
3532  #if defined(SGX_FEATURE_2D_HARDWARE)
3533
3534  #include "sgx2dcore.h"
3535
3536 -#define SGX2D_FLUSH_BH                                                 (0xF0000000)
3537 +#define SGX2D_FLUSH_BH 0xF0000000
3538 +#define        SGX2D_FENCE_BH  0x70000000
3539 +
3540  #define SGX2D_QUEUED_BLIT_PAD  4
3541
3542  #define SGX2D_COMMAND_QUEUE_SIZE 1024
3543 @@ -521,7 +524,7 @@
3544
3545         if (hCmdCookie != IMG_NULL)
3546         {
3547 -               PVRSRVCommandCompleteKM(hCmdCookie, IMG_FALSE);
3548 +               PVRSRVCommandCompleteKM(hCmdCookie, IMG_TRUE);
3549         }
3550
3551         PVR_DPF((PVR_DBG_CALLTRACE, "SGX2DHandle2DComplete: Exit"));
3552 @@ -723,7 +726,7 @@
3553
3554                         SGX2DWriteSlavePortBatch(psDevInfo, pui32BltData, ui32DataByteSize);
3555
3556 -                       SGX2DWriteSlavePort(psDevInfo, EURASIA2D_FENCE_BH);
3557 +                       SGX2DWriteSlavePort(psDevInfo, SGX2D_FENCE_BH);
3558                 }
3559         }
3560
3561 @@ -817,6 +820,18 @@
3562
3563         PVR_DPF((PVR_DBG_ERROR,"SGX2DQueryBlitsCompleteKM: Timed out. Ops pending."));
3564
3565 +#if defined(DEBUG)
3566 +       {
3567 +               PVRSRV_SYNC_DATA *psSyncData = psSyncInfo->psSyncData;
3568 +
3569 +               PVR_TRACE(("SGX2DQueryBlitsCompleteKM: Syncinfo: %p, Syncdata: %p", psSyncInfo, psSyncData));
3570 +
3571 +               PVR_TRACE(("SGX2DQueryBlitsCompleteKM: Read ops complete: %d, Read ops pending: %d", psSyncData->ui32ReadOpsComplete, psSyncData->ui32ReadOpsPending));
3572 +               PVR_TRACE(("SGX2DQueryBlitsCompleteKM: Write ops complete: %d, Write ops pending: %d", psSyncData->ui32WriteOpsComplete, psSyncData->ui32WriteOpsPending));
3573 +
3574 +       }
3575 +#endif
3576 +
3577         return PVRSRV_ERROR_TIMEOUT;
3578  }
3579  #endif
3580 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgx_bridge_km.h git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgx_bridge_km.h
3581 --- git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgx_bridge_km.h     1970-01-01 01:00:00.000000000 +0100
3582 +++ git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgx_bridge_km.h     2008-12-18 15:47:29.000000000 +0100
3583 @@ -0,0 +1,158 @@
3584 +/**********************************************************************
3585 + *
3586 + * Copyright(c) 2008 Imagination Technologies Ltd. All rights reserved.
3587 + *
3588 + * This program is free software; you can redistribute it and/or modify it
3589 + * under the terms and conditions of the GNU General Public License,
3590 + * version 2, as published by the Free Software Foundation.
3591 + *
3592 + * This program is distributed in the hope it will be useful but, except
3593 + * as otherwise stated in writing, without any warranty; without even the
3594 + * implied warranty of merchantability or fitness for a particular purpose.
3595 + * See the GNU General Public License for more details.
3596 + *
3597 + * You should have received a copy of the GNU General Public License along with
3598 + * this program; if not, write to the Free Software Foundation, Inc.,
3599 + * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
3600 + *
3601 + * The full GNU General Public License is included in this distribution in
3602 + * the file called "COPYING".
3603 + *
3604 + * Contact Information:
3605 + * Imagination Technologies Ltd. <gpl-support@imgtec.com>
3606 + * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
3607 + *
3608 + ******************************************************************************/
3609 +
3610 +#if !defined(__SGX_BRIDGE_KM_H__)
3611 +#define __SGX_BRIDGE_KM_H__
3612 +
3613 +#include "sgxapi_km.h"
3614 +#include "sgxinfo.h"
3615 +#include "sgxinfokm.h"
3616 +#include "sgx_bridge.h"
3617 +#include "pvr_bridge.h"
3618 +#include "perproc.h"
3619 +
3620 +#if defined (__cplusplus)
3621 +extern "C" {
3622 +#endif
3623 +
3624 +IMG_IMPORT
3625 +PVRSRV_ERROR SGXSubmitTransferKM(IMG_HANDLE hDevHandle, PVRSRV_TRANSFER_SGX_KICK *psKick);
3626 +
3627 +#if defined(SGX_FEATURE_2D_HARDWARE)
3628 +IMG_EXPORT PVRSRV_ERROR SGXSubmit2DKM(IMG_HANDLE hDevHandle, PVRSRV_2D_SGX_KICK *psKick);
3629 +#endif
3630 +
3631 +IMG_IMPORT
3632 +PVRSRV_ERROR SGXDoKickKM(IMG_HANDLE hDevHandle,
3633 +                                                PVR3DIF4_CCB_KICK *psCCBKick);
3634 +
3635 +IMG_IMPORT
3636 +PVRSRV_ERROR SGXGetPhysPageAddrKM(IMG_HANDLE hDevMemHeap,
3637 +                                                                 IMG_DEV_VIRTADDR sDevVAddr,
3638 +                                                                 IMG_DEV_PHYADDR *pDevPAddr,
3639 +                                                                 IMG_CPU_PHYADDR *pCpuPAddr);
3640 +
3641 +IMG_IMPORT
3642 +PVRSRV_ERROR IMG_CALLCONV SGXGetMMUPDAddrKM(IMG_HANDLE         hDevCookie,
3643 +                                                                                       IMG_HANDLE              hDevMemContext,
3644 +                                                                                       IMG_DEV_PHYADDR *psPDDevPAddr);
3645 +
3646 +IMG_IMPORT
3647 +PVRSRV_ERROR SGXGetClientInfoKM(IMG_HANDLE                             hDevCookie,
3648 +                                                               PVR3DIF4_CLIENT_INFO*   psClientInfo);
3649 +
3650 +IMG_IMPORT
3651 +PVRSRV_ERROR SGXGetMiscInfoKM(PVRSRV_SGXDEV_INFO       *psDevInfo,
3652 +                                                         SGX_MISC_INFO                 *psMiscInfo);
3653 +
3654 +#if defined(SUPPORT_SGX_HWPERF)
3655 +IMG_IMPORT
3656 +PVRSRV_ERROR SGXReadHWPerfCountersKM(PVRSRV_SGXDEV_INFO        *psDevInfo,
3657 +                                                                        IMG_UINT32                     ui32PerfReg,
3658 +                                                                        IMG_UINT32                     *pui32OldPerf,
3659 +                                                                        IMG_BOOL                       bNewPerf,
3660 +                                                                        IMG_UINT32                     ui32NewPerf,
3661 +                                                                        IMG_UINT32                     ui32NewPerfReset,
3662 +                                                                        IMG_UINT32                     ui32PerfCountersReg,
3663 +                                                                        IMG_UINT32                     *pui32Counters,
3664 +                                                                        IMG_UINT32                     *pui32KickTACounter,
3665 +                                                                        IMG_UINT32                     *pui32KickTARenderCounter,
3666 +                                                                        IMG_UINT32                     *pui32CPUTime,
3667 +                                                                        IMG_UINT32                     *pui32SGXTime);
3668 +#endif
3669 +
3670 +#if defined(SGX_FEATURE_2D_HARDWARE)
3671 +IMG_IMPORT
3672 +PVRSRV_ERROR SGX2DQueueBlitKM(PVRSRV_SGXDEV_INFO               *psDevInfo,
3673 +                                                         PVRSRV_KERNEL_SYNC_INFO       *psDstSync,
3674 +                                                         IMG_UINT32            ui32NumSrcSyncs,
3675 +                                                         PVRSRV_KERNEL_SYNC_INFO *apsSrcSync[],
3676 +                                                         IMG_UINT32            ui32DataByteSize,
3677 +                                                         IMG_UINT32            *pui32BltData);
3678 +
3679 +#if defined(SGX2D_DIRECT_BLITS)
3680 +IMG_IMPORT
3681 +PVRSRV_ERROR SGX2DDirectBlitKM(PVRSRV_SGXDEV_INFO      *psDevInfo,
3682 +                                                          IMG_UINT32                   ui32DataByteSize,
3683 +                                                          IMG_UINT32                   *pui32BltData);
3684 +#endif
3685 +#endif
3686 +
3687 +#if defined(SGX_FEATURE_2D_HARDWARE) || defined(PVR2D_ALT_2DHW)
3688 +IMG_IMPORT
3689 +PVRSRV_ERROR SGX2DQueryBlitsCompleteKM(PVRSRV_SGXDEV_INFO              *psDevInfo,
3690 +                                                                          PVRSRV_KERNEL_SYNC_INFO      *psSyncInfo,
3691 +                                                                          IMG_BOOL bWaitForComplete);
3692 +#endif
3693 +
3694 +IMG_IMPORT
3695 +PVRSRV_ERROR SGXGetInfoForSrvinitKM(IMG_HANDLE hDevHandle,
3696 +                                                                       SGX_BRIDGE_INFO_FOR_SRVINIT *psInitInfo);
3697 +
3698 +IMG_IMPORT
3699 +PVRSRV_ERROR DevInitSGXPart2KM(PVRSRV_PER_PROCESS_DATA *psPerProc,
3700 +                                                          IMG_HANDLE hDevHandle,
3701 +                                                          SGX_BRIDGE_INIT_INFO *psInitInfo);
3702 +
3703 +IMG_IMPORT PVRSRV_ERROR
3704 +SGXFindSharedPBDescKM(IMG_HANDLE hDevCookie,
3705 +                                         IMG_UINT32 ui32TotalPBSize,
3706 +                                         IMG_HANDLE *phSharedPBDesc,
3707 +                                         PVRSRV_KERNEL_MEM_INFO **ppsSharedPBDescKernelMemInfo,
3708 +                                         PVRSRV_KERNEL_MEM_INFO **ppsHWPBDescKernelMemInfo,
3709 +                                         PVRSRV_KERNEL_MEM_INFO **ppsBlockKernelMemInfo,
3710 +                                         PVRSRV_KERNEL_MEM_INFO ***pppsSharedPBDescSubKernelMemInfos,
3711 +                                         IMG_UINT32 *ui32SharedPBDescSubKernelMemInfosCount);
3712 +
3713 +IMG_IMPORT PVRSRV_ERROR
3714 +SGXUnrefSharedPBDescKM(IMG_HANDLE hSharedPBDesc);
3715 +
3716 +IMG_IMPORT PVRSRV_ERROR
3717 +SGXAddSharedPBDescKM(IMG_HANDLE hDevCookie,
3718 +                                        PVRSRV_KERNEL_MEM_INFO *psSharedPBDescKernelMemInfo,
3719 +                                        PVRSRV_KERNEL_MEM_INFO *psHWPBDescKernelMemInfo,
3720 +                                        PVRSRV_KERNEL_MEM_INFO *psBlockKernelMemInfo,
3721 +                                        IMG_UINT32 ui32TotalPBSize,
3722 +                                        IMG_HANDLE *phSharedPBDesc,
3723 +                                        PVRSRV_KERNEL_MEM_INFO **psSharedPBDescSubKernelMemInfos,
3724 +                                        IMG_UINT32 ui32SharedPBDescSubKernelMemInfosCount);
3725 +
3726 +
3727 +IMG_IMPORT PVRSRV_ERROR
3728 +SGXGetInternalDevInfoKM(IMG_HANDLE hDevCookie,
3729 +                                               PVR3DIF4_INTERNAL_DEVINFO *psSGXInternalDevInfo);
3730 +
3731 +
3732 +#if defined(SGX_FEATURE_2D_HARDWARE)
3733 +#define        SGX2D_MAX_BLT_CMD_SIZ           256
3734 +#endif
3735 +
3736 +#if defined (__cplusplus)
3737 +}
3738 +#endif
3739 +
3740 +#endif
3741 +
3742 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgxinfokm.h git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgxinfokm.h
3743 --- git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgxinfokm.h 2009-01-05 20:00:44.000000000 +0100
3744 +++ git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgxinfokm.h 2008-12-18 15:47:29.000000000 +0100
3745 @@ -45,14 +45,152 @@
3746
3747  #define PVRSRV_USSE_EDM_RESMAN_CLEANUP_RT_REQUEST      0x01
3748  #define PVRSRV_USSE_EDM_RESMAN_CLEANUP_RC_REQUEST      0x02
3749 -#define PVRSRV_USSE_EDM_RESMAN_CLEANUP_COMPLETE        0x04
3750 -#define PVRSRV_USSE_EDM_RESMAN_CLEANUP_INVALPD         0x10
3751 -#define PVRSRV_USSE_EDM_RESMAN_CLEANUP_INVALPT         0x20
3752 +#define PVRSRV_USSE_EDM_RESMAN_CLEANUP_TC_REQUEST      0x04
3753 +#define PVRSRV_USSE_EDM_RESMAN_CLEANUP_2DC_REQUEST     0x08
3754 +#define PVRSRV_USSE_EDM_RESMAN_CLEANUP_COMPLETE        0x10
3755 +#define PVRSRV_USSE_EDM_RESMAN_CLEANUP_INVALPD         0x20
3756 +#define PVRSRV_USSE_EDM_RESMAN_CLEANUP_INVALPT         0x40
3757 +
3758 +typedef struct _PVRSRV_SGXDEV_INFO_
3759 +{
3760 +       PVRSRV_DEVICE_TYPE              eDeviceType;
3761 +       PVRSRV_DEVICE_CLASS             eDeviceClass;
3762 +
3763 +       IMG_UINT8                               ui8VersionMajor;
3764 +       IMG_UINT8                               ui8VersionMinor;
3765 +       IMG_UINT32                              ui32CoreConfig;
3766 +       IMG_UINT32                              ui32CoreFlags;
3767 +
3768 +
3769 +       IMG_PVOID                               pvRegsBaseKM;
3770 +
3771 +
3772 +
3773 +       IMG_HANDLE                              hRegMapping;
3774 +
3775 +
3776 +       IMG_SYS_PHYADDR                 sRegsPhysBase;
3777 +
3778 +       IMG_UINT32                              ui32RegSize;
3779 +
3780 +
3781 +       IMG_UINT32                              ui32CoreClockSpeed;
3782 +       IMG_UINT32                              ui32uKernelTimerClock;
3783 +
3784 +#if defined(SGX_FEATURE_2D_HARDWARE)
3785 +
3786 +       SGX_SLAVE_PORT                  s2DSlavePortKM;
3787 +
3788 +
3789 +       PVRSRV_RESOURCE                 s2DSlaveportResource;
3790 +
3791 +
3792 +       IMG_UINT32                      ui322DFifoSize;
3793 +       IMG_UINT32                      ui322DFifoOffset;
3794 +
3795 +       IMG_HANDLE                      h2DCmdCookie;
3796 +
3797 +       IMG_HANDLE                      h2DQueue;
3798 +       IMG_BOOL                        b2DHWRecoveryInProgress;
3799 +       IMG_BOOL                        b2DHWRecoveryEndPending;
3800 +       IMG_UINT32                      ui322DCompletedBlits;
3801 +       IMG_BOOL                        b2DLockupSuspected;
3802 +#endif
3803 +
3804 +
3805 +       IMG_VOID                        *psStubPBDescListKM;
3806 +
3807 +
3808 +
3809 +       IMG_DEV_PHYADDR                 sKernelPDDevPAddr;
3810 +
3811 +       IMG_VOID                                *pvDeviceMemoryHeap;
3812 +       PPVRSRV_KERNEL_MEM_INFO psKernelCCBMemInfo;
3813 +       PVRSRV_SGX_KERNEL_CCB   *psKernelCCB;
3814 +       PPVRSRV_SGX_CCB_INFO    psKernelCCBInfo;
3815 +       PPVRSRV_KERNEL_MEM_INFO psKernelCCBCtlMemInfo;
3816 +       PVRSRV_SGX_CCB_CTL              *psKernelCCBCtl;
3817 +       PPVRSRV_KERNEL_MEM_INFO psKernelCCBEventKickerMemInfo;
3818 +       IMG_UINT32                              *pui32KernelCCBEventKicker;
3819 +       IMG_UINT32                              ui32TAKickAddress;
3820 +       IMG_UINT32                              ui32TexLoadKickAddress;
3821 +       IMG_UINT32                              ui32VideoHandlerAddress;
3822 +#if defined(SGX_SUPPORT_HWPROFILING)
3823 +       PPVRSRV_KERNEL_MEM_INFO psKernelHWProfilingMemInfo;
3824 +#endif
3825 +       IMG_UINT32                              ui32KickTACounter;
3826 +       IMG_UINT32                              ui32KickTARenderCounter;
3827 +#if defined(SUPPORT_SGX_HWPERF)
3828 +       PPVRSRV_KERNEL_MEM_INFO psKernelHWPerfCBMemInfo;
3829 +#endif
3830
3831 +
3832 +       IMG_UINT32                              ui32ClientRefCount;
3833
3834 +
3835 +       IMG_UINT32                              ui32CacheControl;
3836
3837 +
3838
3839
3840 +       IMG_VOID                                *pvMMUContextList;
3841 +
3842 +
3843 +       IMG_BOOL                                bForcePTOff;
3844 +
3845 +       IMG_UINT32                              ui32EDMTaskReg0;
3846 +       IMG_UINT32                              ui32EDMTaskReg1;
3847 +
3848 +       IMG_UINT32                              ui32ClkGateCtl;
3849 +       IMG_UINT32                              ui32ClkGateCtl2;
3850 +       IMG_UINT32                              ui32ClkGateStatusMask;
3851 +       SGX_INIT_SCRIPTS                sScripts;
3852 +
3853 +
3854 +       IMG_HANDLE                              hBIFResetPDOSMemHandle;
3855 +       IMG_DEV_PHYADDR                 sBIFResetPDDevPAddr;
3856 +       IMG_DEV_PHYADDR                 sBIFResetPTDevPAddr;
3857 +       IMG_DEV_PHYADDR                 sBIFResetPageDevPAddr;
3858 +       IMG_UINT32                              *pui32BIFResetPD;
3859 +       IMG_UINT32                              *pui32BIFResetPT;
3860 +
3861 +
3862 +#if defined(SUPPORT_HW_RECOVERY)
3863 +
3864 +       IMG_HANDLE                              hTimer;
3865 +
3866 +       IMG_UINT32                              ui32TimeStamp;
3867 +#endif
3868 +
3869 +
3870 +       IMG_UINT32                              ui32NumResets;
3871 +
3872 +       PVRSRV_KERNEL_MEM_INFO                  *psKernelSGXHostCtlMemInfo;
3873 +       PVRSRV_SGX_HOST_CTL                             *psSGXHostCtl;
3874 +
3875 +       IMG_UINT32                              ui32Flags;
3876 +
3877 +
3878 +       IMG_UINT32                              ui32RegFlags;
3879 +
3880 +       #if defined(PDUMP)
3881 +       PVRSRV_SGX_PDUMP_CONTEXT        sPDContext;
3882 +       #endif
3883 +
3884 +#if defined(SUPPORT_SGX_MMU_DUMMY_PAGE)
3885 +
3886 +       IMG_VOID                                *pvDummyPTPageCpuVAddr;
3887 +       IMG_DEV_PHYADDR                 sDummyPTDevPAddr;
3888 +       IMG_HANDLE                              hDummyPTPageOSMemHandle;
3889 +       IMG_VOID                                *pvDummyDataPageCpuVAddr;
3890 +       IMG_DEV_PHYADDR                 sDummyDataDevPAddr;
3891 +       IMG_HANDLE                              hDummyDataPageOSMemHandle;
3892 +#endif
3893 +
3894 +       IMG_UINT32                              asSGXDevData[SGX_MAX_DEV_DATA];
3895 +
3896 +} PVRSRV_SGXDEV_INFO;
3897 +
3898
3899  typedef struct _SGX_TIMING_INFORMATION_
3900  {
3901 @@ -122,10 +260,8 @@
3902
3903  PVRSRV_ERROR SGXRegisterDevice (PVRSRV_DEVICE_NODE *psDeviceNode);
3904
3905 -
3906  IMG_VOID SGXOSTimer(IMG_VOID *pvData);
3907
3908 -IMG_VOID ResetPBs(PVRSRV_SGXDEV_INFO   *psDevInfo);
3909  #if defined(NO_HARDWARE)
3910  static INLINE IMG_VOID NoHardwareGenerateEvent(PVRSRV_SGXDEV_INFO              *psDevInfo,
3911                                                                                                 IMG_UINT32 ui32StatusRegister,
3912 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgxinit.c git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgxinit.c
3913 --- git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgxinit.c   2009-01-05 20:00:44.000000000 +0100
3914 +++ git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgxinit.c   2008-12-18 15:47:29.000000000 +0100
3915 @@ -54,23 +54,16 @@
3916  #endif
3917
3918  IMG_BOOL SGX_ISRHandler(IMG_VOID *pvData);
3919 -IMG_VOID SGXScheduleProcessQueues(IMG_VOID *pvData);
3920
3921  IMG_UINT32 gui32EventStatusServicesByISR = 0;
3922
3923 -static IMG_VOID ResetSGX(PVRSRV_SGXDEV_INFO    *psDevInfo,
3924 -                                                IMG_UINT32                      ui32PDUMPFlags);
3925 +IMG_VOID SGXReset(PVRSRV_SGXDEV_INFO   *psDevInfo,
3926 +                                 IMG_UINT32                     ui32PDUMPFlags);
3927
3928 -PVRSRV_ERROR SGXInitialise(PVRSRV_SGXDEV_INFO  *psDevInfo,
3929 -                                                  IMG_BOOL                             bHardwareRecovery);
3930 +static PVRSRV_ERROR SGXInitialise(PVRSRV_SGXDEV_INFO   *psDevInfo,
3931 +                                                                 IMG_BOOL                              bHardwareRecovery);
3932  PVRSRV_ERROR SGXDeinitialise(IMG_HANDLE hDevCookie);
3933
3934 -#if defined(SGX_FEATURE_MULTIPLE_MEM_CONTEXTS)
3935 -#define SGX_BIF_DIR_LIST_INDEX_EDM     15
3936 -#define SGX_BIF_DIR_LIST_REG_EDM       EUR_CR_BIF_DIR_LIST_BASE15
3937 -#else
3938 -#define SGX_BIF_DIR_LIST_REG_EDM       EUR_CR_BIF_DIR_LIST_BASE0
3939 -#endif
3940
3941  static IMG_VOID SGXCommandComplete(PVRSRV_DEVICE_NODE *psDeviceNode)
3942  {
3943 @@ -116,6 +109,9 @@
3944  #if defined(SGX_SUPPORT_HWPROFILING)
3945         psDevInfo->psKernelHWProfilingMemInfo = (PVRSRV_KERNEL_MEM_INFO *)psInitInfo->hKernelHWProfilingMemInfo;
3946  #endif
3947 +#if defined(SUPPORT_SGX_HWPERF)
3948 +       psDevInfo->psKernelHWPerfCBMemInfo = (PVRSRV_KERNEL_MEM_INFO *)psInitInfo->hKernelHWPerfCBMemInfo;
3949 +#endif
3950
3951
3952
3953 @@ -124,7 +120,7 @@
3954                                                 (IMG_VOID **)&psKernelCCBInfo, 0);
3955         if (eError != PVRSRV_OK)
3956         {
3957 -               PVR_DPF((PVR_DBG_ERROR,"DevInitSGXPart2KM: Failed to alloc memory"));
3958 +               PVR_DPF((PVR_DBG_ERROR,"InitDevInfo: Failed to alloc memory"));
3959                 goto failed_allockernelccb;
3960         }
3961
3962 @@ -151,7 +147,9 @@
3963
3964         psDevInfo->ui32EDMTaskReg0 = psInitInfo->ui32EDMTaskReg0;
3965         psDevInfo->ui32EDMTaskReg1 = psInitInfo->ui32EDMTaskReg1;
3966 -       psDevInfo->ui32ClockGateMask = psInitInfo->ui32ClockGateMask;
3967 +       psDevInfo->ui32ClkGateCtl = psInitInfo->ui32ClkGateCtl;
3968 +       psDevInfo->ui32ClkGateCtl2 = psInitInfo->ui32ClkGateCtl2;
3969 +       psDevInfo->ui32ClkGateStatusMask = psInitInfo->ui32ClkGateStatusMask;
3970
3971
3972
3973 @@ -183,10 +181,20 @@
3974                 if (eNewPowerState == PVRSRV_POWER_STATE_D3)
3975                 {
3976                         PVRSRV_SGX_HOST_CTL *psSGXHostCtl = psDevInfo->psSGXHostCtl;
3977 -                       #if defined (SGX_FEATURE_AUTOCLOCKGATING) && (!defined(NO_HARDWARE) || defined(PDUMP))
3978 -                       IMG_UINT32 ui32ClockMask = psDevInfo->ui32ClockGateMask;
3979 +
3980 +            #if defined (SGX_FEATURE_AUTOCLOCKGATING) && (!defined(NO_HARDWARE) || defined(PDUMP))
3981 +                       IMG_UINT32 ui32ClockMask = psDevInfo->ui32ClkGateStatusMask;
3982                         #endif
3983
3984 +#if defined(SUPPORT_HW_RECOVERY)
3985 +
3986 +                       if (OSDisableTimer(psDevInfo->hTimer) != PVRSRV_OK)
3987 +                       {
3988 +                               PVR_DPF((PVR_DBG_ERROR,"SGXPrePowerState: Failed to disable timer"));
3989 +                               return  PVRSRV_ERROR_GENERIC;
3990 +                       }
3991 +#endif
3992 +
3993
3994                         psSGXHostCtl->ui32PowManFlags |= PVRSRV_USSE_EDM_POWMAN_POWEROFF_REQUEST;
3995
3996 @@ -202,7 +210,7 @@
3997                                                                 MAX_HW_TIME_US/WAIT_TRY_COUNT,
3998                                                                 WAIT_TRY_COUNT) != PVRSRV_OK)
3999                         {
4000 -                               PVR_DPF((PVR_DBG_ERROR,"Wait for chip power off failed."));
4001 +                               PVR_DPF((PVR_DBG_ERROR,"SGXPrePowerState: Wait for chip power off failed."));
4002                         }
4003                         #endif
4004
4005 @@ -229,7 +237,7 @@
4006                                                                 MAX_HW_TIME_US/WAIT_TRY_COUNT,
4007                                                                 WAIT_TRY_COUNT) != PVRSRV_OK)
4008                         {
4009 -                               PVR_DPF((PVR_DBG_ERROR,"Wait for chip idle failed."));
4010 +                               PVR_DPF((PVR_DBG_ERROR,"SGXPrePowerState: Wait for chip idle failed."));
4011                         }
4012                         #endif
4013                         PDUMPREGPOL(EUR_CR_CLKGATESTATUS, 0, ui32ClockMask);
4014 @@ -278,6 +286,14 @@
4015                                 PVR_DPF((PVR_DBG_ERROR,"SGXPostPowerState: SGXInitialise failed"));
4016                                 return eError;
4017                         }
4018 +#if defined(SUPPORT_HW_RECOVERY)
4019 +                       eError = OSEnableTimer(psDevInfo->hTimer);
4020 +                       if (eError != PVRSRV_OK)
4021 +                       {
4022 +                               PVR_DPF((PVR_DBG_ERROR,"SGXPostPowerState : Failed to enable host timer"));
4023 +                               return PVRSRV_ERROR_GENERIC;
4024 +                       }
4025 +#endif
4026                 }
4027
4028                 PVR_DPF((PVR_DBG_WARNING,
4029 @@ -288,8 +304,6 @@
4030         return PVRSRV_OK;
4031  }
4032
4033 -#define        SCRIPT_DATA(pData, offset, type) (*((type *)(((char *)pData) + offset)))
4034 -#define        SCRIPT_DATA_UI32(pData, offset) SCRIPT_DATA(pData, offset, IMG_UINT32)
4035
4036  static PVRSRV_ERROR SGXRunScript(PVRSRV_SGXDEV_INFO *psDevInfo, SGX_INIT_COMMAND *psScript, IMG_UINT32 ui32NumInitCommands)
4037  {
4038 @@ -333,14 +347,18 @@
4039         return PVRSRV_ERROR_GENERIC;;
4040  }
4041
4042 -PVRSRV_ERROR SGXInitialise(PVRSRV_SGXDEV_INFO  *psDevInfo,
4043 -                                                  IMG_BOOL                             bHardwareRecovery)
4044 +static PVRSRV_ERROR SGXInitialise(PVRSRV_SGXDEV_INFO   *psDevInfo,
4045 +                                                                 IMG_BOOL                              bHardwareRecovery)
4046  {
4047         PVRSRV_ERROR            eError;
4048         IMG_UINT32                      ui32ReadOffset, ui32WriteOffset;
4049
4050
4051 -       ResetSGX(psDevInfo, PDUMP_FLAGS_CONTINUOUS);
4052 +       OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_CLKGATECTL, psDevInfo->ui32ClkGateCtl);
4053 +       PDUMPREGWITHFLAGS(EUR_CR_CLKGATECTL, psDevInfo->ui32ClkGateCtl, PDUMP_FLAGS_CONTINUOUS);
4054 +
4055 +
4056 +       SGXReset(psDevInfo, PDUMP_FLAGS_CONTINUOUS);
4057
4058
4059         *psDevInfo->pui32KernelCCBEventKicker = 0;
4060 @@ -381,12 +399,14 @@
4061                                                    0,
4062                                                    PVRSRV_USSE_EDM_INTERRUPT_HWR,
4063                                                    MAX_HW_TIME_US/WAIT_TRY_COUNT,
4064 -                                                  WAIT_TRY_COUNT) != PVRSRV_OK)
4065 +                                                  1000) != PVRSRV_OK)
4066                 {
4067 -                       PVR_DPF((PVR_DBG_ERROR, "HWRecoveryResetSGXEDM: Wait for uKernel HW Recovery failed"));
4068 +                       PVR_DPF((PVR_DBG_ERROR, "SGXInitialise: Wait for uKernel HW Recovery failed"));
4069 +                       return PVRSRV_ERROR_RETRY;
4070                 }
4071         }
4072
4073 +
4074
4075
4076
4077 @@ -426,259 +446,6 @@
4078  }
4079
4080
4081 -static IMG_VOID ResetSGXSleep(PVRSRV_SGXDEV_INFO       *psDevInfo,
4082 -                                                         IMG_UINT32                    ui32PDUMPFlags,
4083 -                                                         IMG_BOOL                              bPDump)
4084 -{
4085 -#if !defined(PDUMP)
4086 -       PVR_UNREFERENCED_PARAMETER(ui32PDUMPFlags);
4087 -#endif
4088 -
4089 -
4090 -       OSWaitus(1000 * 1000000 / psDevInfo->ui32CoreClockSpeed);
4091 -       if (bPDump)
4092 -       {
4093 -               PDUMPIDLWITHFLAGS(1000, ui32PDUMPFlags);
4094 -       }
4095 -}
4096 -
4097 -
4098 -static IMG_VOID ResetSGX(PVRSRV_SGXDEV_INFO    *psDevInfo,
4099 -                                                IMG_UINT32                      ui32PDUMPFlags)
4100 -{
4101 -       IMG_UINT32 ui32RegVal;
4102 -
4103 -       const IMG_UINT32 ui32SoftResetRegVal =
4104 -                                       #ifdef EUR_CR_SOFT_RESET_TWOD_RESET_MASK
4105 -                                       EUR_CR_SOFT_RESET_TWOD_RESET_MASK       |
4106 -                                       #endif
4107 -                                       EUR_CR_SOFT_RESET_DPM_RESET_MASK        |
4108 -                                       EUR_CR_SOFT_RESET_TA_RESET_MASK         |
4109 -                                       EUR_CR_SOFT_RESET_USE_RESET_MASK        |
4110 -                                       EUR_CR_SOFT_RESET_ISP_RESET_MASK        |
4111 -                                       EUR_CR_SOFT_RESET_TSP_RESET_MASK;
4112 -
4113 -       const IMG_UINT32 ui32BifInvalDCVal = EUR_CR_BIF_CTRL_INVALDC_MASK;
4114 -
4115 -       const IMG_UINT32 ui32BifFaultMask =
4116 -                                               EUR_CR_BIF_INT_STAT_FAULT_MASK;
4117 -
4118 -#if defined(SGX_FEATURE_MULTIPLE_MEM_CONTEXTS)
4119 -       IMG_UINT32                      ui32BIFCtrl;
4120 -#if defined(EUR_CR_BIF_MEM_ARB_CONFIG)
4121 -       IMG_UINT32                      ui32BIFMemArb;
4122 -#endif
4123 -#endif
4124 -
4125 -#ifndef PDUMP
4126 -       PVR_UNREFERENCED_PARAMETER(ui32PDUMPFlags);
4127 -#endif
4128 -
4129 -       psDevInfo->ui32NumResets++;
4130 -
4131 -       PDUMPCOMMENTWITHFLAGS(ui32PDUMPFlags, "Start of SGX reset sequence\r\n");
4132 -
4133 -#if defined(FIX_HW_BRN_23944)
4134 -
4135 -       ui32RegVal = EUR_CR_BIF_CTRL_PAUSE_MASK;
4136 -       OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_CTRL, ui32RegVal);
4137 -       PDUMPREGWITHFLAGS(EUR_CR_BIF_CTRL, ui32RegVal, ui32PDUMPFlags);
4138 -
4139 -       ResetSGXSleep(psDevInfo, ui32PDUMPFlags, IMG_TRUE);
4140 -
4141 -       ui32RegVal = OSReadHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_INT_STAT);
4142 -       if (ui32RegVal & ui32BifFaultMask)
4143 -       {
4144 -
4145 -               ui32RegVal = EUR_CR_BIF_CTRL_PAUSE_MASK | EUR_CR_BIF_CTRL_CLEAR_FAULT_MASK;
4146 -               OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_CTRL, ui32RegVal);
4147 -               PDUMPREGWITHFLAGS(EUR_CR_BIF_CTRL, ui32RegVal, ui32PDUMPFlags);
4148 -
4149 -               ResetSGXSleep(psDevInfo, ui32PDUMPFlags, IMG_TRUE);
4150 -
4151 -               ui32RegVal = EUR_CR_BIF_CTRL_PAUSE_MASK;
4152 -               OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_CTRL, ui32RegVal);
4153 -               PDUMPREGWITHFLAGS(EUR_CR_BIF_CTRL, ui32RegVal, ui32PDUMPFlags);
4154 -
4155 -               ResetSGXSleep(psDevInfo, ui32PDUMPFlags, IMG_TRUE);
4156 -       }
4157 -#endif
4158 -
4159 -
4160 -       ui32RegVal = ui32SoftResetRegVal | EUR_CR_SOFT_RESET_BIF_RESET_MASK;
4161 -       OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_SOFT_RESET, ui32RegVal);
4162 -       PDUMPREGWITHFLAGS(EUR_CR_SOFT_RESET, ui32RegVal, ui32PDUMPFlags);
4163 -
4164 -       ResetSGXSleep(psDevInfo, ui32PDUMPFlags, IMG_TRUE);
4165 -
4166 -
4167 -
4168 -#if defined(SGX_FEATURE_MULTIPLE_MEM_CONTEXTS)
4169 -       ui32RegVal = 0;
4170 -       OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_BANK_SET, ui32RegVal);
4171 -       PDUMPREGWITHFLAGS(EUR_CR_BIF_BANK_SET, ui32RegVal, ui32PDUMPFlags);
4172 -       OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_BANK0, ui32RegVal);
4173 -       PDUMPREGWITHFLAGS(EUR_CR_BIF_BANK0, ui32RegVal, ui32PDUMPFlags);
4174 -
4175 -#if defined(EUR_CR_BIF_MEM_ARB_CONFIG)
4176 -
4177 -
4178 -       ui32BIFMemArb   = (12UL << EUR_CR_BIF_MEM_ARB_CONFIG_PAGE_SIZE_SHIFT) |
4179 -                                         (7UL << EUR_CR_BIF_MEM_ARB_CONFIG_BEST_CNT_SHIFT) |
4180 -                                         (12UL << EUR_CR_BIF_MEM_ARB_CONFIG_TTE_THRESH_SHIFT);
4181 -       OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_MEM_ARB_CONFIG, ui32BIFMemArb);
4182 -       PDUMPREGWITHFLAGS(EUR_CR_BIF_MEM_ARB_CONFIG, ui32BIFMemArb, ui32PDUMPFlags);
4183 -#endif
4184 -#endif
4185 -
4186 -
4187 -
4188 -
4189 -
4190 -
4191 -
4192 -       ui32RegVal = psDevInfo->sBIFResetPDDevPAddr.uiAddr;
4193 -       OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_DIR_LIST_BASE0, ui32RegVal);
4194 -
4195 -       ResetSGXSleep(psDevInfo, ui32PDUMPFlags, IMG_FALSE);
4196 -
4197 -
4198 -       ui32RegVal = ui32SoftResetRegVal;
4199 -       OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_SOFT_RESET, ui32RegVal);
4200 -       PDUMPREGWITHFLAGS(EUR_CR_SOFT_RESET, ui32RegVal, ui32PDUMPFlags);
4201 -
4202 -
4203 -       OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_CTRL, ui32BifInvalDCVal);
4204 -       ResetSGXSleep(psDevInfo, ui32PDUMPFlags, IMG_FALSE);
4205 -       ui32RegVal = 0;
4206 -       OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_CTRL, ui32RegVal);
4207 -
4208 -       ResetSGXSleep(psDevInfo, ui32PDUMPFlags, IMG_TRUE);
4209 -
4210 -
4211 -
4212 -
4213 -       for (;;)
4214 -       {
4215 -               IMG_UINT32 ui32BifIntStat = OSReadHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_INT_STAT);
4216 -               IMG_DEV_VIRTADDR sBifFault;
4217 -               IMG_UINT32 ui32PDIndex, ui32PTIndex;
4218 -
4219 -               if ((ui32BifIntStat & ui32BifFaultMask) == 0)
4220 -               {
4221 -                       break;
4222 -               }
4223 -
4224 -
4225 -
4226 -
4227 -
4228 -
4229 -
4230 -               sBifFault.uiAddr = OSReadHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_FAULT);
4231 -               PVR_DPF((PVR_DBG_WARNING, "ResetSGX: Page fault 0x%x/0x%x", ui32BifIntStat, sBifFault.uiAddr));
4232 -               ui32PDIndex = sBifFault.uiAddr >> (SGX_MMU_PAGE_SHIFT + SGX_MMU_PT_SHIFT);
4233 -               ui32PTIndex = (sBifFault.uiAddr & SGX_MMU_PT_MASK) >> SGX_MMU_PAGE_SHIFT;
4234 -
4235 -
4236 -               ui32RegVal = ui32SoftResetRegVal | EUR_CR_SOFT_RESET_BIF_RESET_MASK;
4237 -               OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_SOFT_RESET, ui32RegVal);
4238 -
4239 -
4240 -               psDevInfo->pui32BIFResetPD[ui32PDIndex] = psDevInfo->sBIFResetPTDevPAddr.uiAddr | SGX_MMU_PDE_VALID;
4241 -               psDevInfo->pui32BIFResetPT[ui32PTIndex] = psDevInfo->sBIFResetPageDevPAddr.uiAddr | SGX_MMU_PTE_VALID;
4242 -
4243 -
4244 -               ui32RegVal = OSReadHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_EVENT_STATUS);
4245 -               OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_EVENT_HOST_CLEAR, ui32RegVal);
4246 -               ui32RegVal = OSReadHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_EVENT_STATUS2);
4247 -               OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_EVENT_HOST_CLEAR2, ui32RegVal);
4248 -
4249 -               ResetSGXSleep(psDevInfo, ui32PDUMPFlags, IMG_FALSE);
4250 -
4251 -
4252 -               ui32RegVal = ui32SoftResetRegVal;
4253 -               OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_SOFT_RESET, ui32RegVal);
4254 -               ResetSGXSleep(psDevInfo, ui32PDUMPFlags, IMG_FALSE);
4255 -
4256 -
4257 -               OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_CTRL, ui32BifInvalDCVal);
4258 -               ResetSGXSleep(psDevInfo, ui32PDUMPFlags, IMG_FALSE);
4259 -               ui32RegVal = 0;
4260 -               OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_CTRL, ui32RegVal);
4261 -               ResetSGXSleep(psDevInfo, ui32PDUMPFlags, IMG_FALSE);
4262 -
4263 -
4264 -               psDevInfo->pui32BIFResetPD[ui32PDIndex] = 0;
4265 -               psDevInfo->pui32BIFResetPT[ui32PTIndex] = 0;
4266 -       }
4267 -
4268 -
4269 -
4270 -
4271 -#if defined(SGX_FEATURE_MULTIPLE_MEM_CONTEXTS)
4272 -
4273 -       ui32BIFCtrl = (SGX_BIF_DIR_LIST_INDEX_EDM << EUR_CR_BIF_BANK0_INDEX_EDM_SHIFT);
4274 -#ifdef SGX_FEATURE_2D_HARDWARE
4275 -
4276 -       ui32BIFCtrl |= (SGX_BIF_DIR_LIST_INDEX_EDM << EUR_CR_BIF_BANK0_INDEX_2D_SHIFT);
4277 -#endif
4278 -#if defined(FIX_HW_BRN_23410)
4279 -
4280 -       ui32BIFCtrl |= (SGX_BIF_DIR_LIST_INDEX_EDM << EUR_CR_BIF_BANK0_INDEX_TA_SHIFT);
4281 -#endif
4282 -
4283 -       OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_BANK0, ui32BIFCtrl);
4284 -       PDUMPREGWITHFLAGS(EUR_CR_BIF_BANK0, ui32BIFCtrl, ui32PDUMPFlags);
4285 -#endif
4286 -
4287 -
4288 -       OSWriteHWReg(psDevInfo->pvRegsBaseKM, SGX_BIF_DIR_LIST_REG_EDM, psDevInfo->sKernelPDDevPAddr.uiAddr);
4289 -       PDUMPPDREGWITHFLAGS(SGX_BIF_DIR_LIST_REG_EDM, psDevInfo->sKernelPDDevPAddr.uiAddr, ui32PDUMPFlags, PDUMP_PD_UNIQUETAG);
4290 -
4291 -#ifdef SGX_FEATURE_2D_HARDWARE
4292 -
4293 -       OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_TWOD_REQ_BASE, SGX_2D_HEAP_BASE);
4294 -       PDUMPREGWITHFLAGS(EUR_CR_BIF_TWOD_REQ_BASE, SGX_2D_HEAP_BASE, ui32PDUMPFlags);
4295 -#endif
4296 -
4297 -#if !defined(SGX_FEATURE_MULTIPLE_MEM_CONTEXTS)
4298 -
4299 -       ui32RegVal = ui32SoftResetRegVal | EUR_CR_SOFT_RESET_BIF_RESET_MASK;
4300 -       OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_SOFT_RESET, ui32RegVal);
4301 -       PDUMPREGWITHFLAGS(EUR_CR_SOFT_RESET, ui32RegVal, ui32PDUMPFlags);
4302 -       ResetSGXSleep(psDevInfo, ui32PDUMPFlags, IMG_TRUE);
4303 -
4304 -       ui32RegVal = ui32SoftResetRegVal;
4305 -       OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_SOFT_RESET, ui32RegVal);
4306 -       PDUMPREGWITHFLAGS(EUR_CR_SOFT_RESET, ui32RegVal, ui32PDUMPFlags);
4307 -       ResetSGXSleep(psDevInfo, ui32PDUMPFlags, IMG_TRUE);
4308 -#endif
4309 -
4310 -
4311 -       OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_CTRL, ui32BifInvalDCVal);
4312 -       PDUMPREGWITHFLAGS(EUR_CR_BIF_CTRL, ui32BifInvalDCVal, ui32PDUMPFlags);
4313 -
4314 -       ResetSGXSleep(psDevInfo, ui32PDUMPFlags, IMG_TRUE);
4315 -
4316 -       ui32RegVal = 0;
4317 -       OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_CTRL, ui32RegVal);
4318 -       PDUMPREGWITHFLAGS(EUR_CR_BIF_CTRL, ui32RegVal, ui32PDUMPFlags);
4319 -
4320 -       PVR_DPF((PVR_DBG_WARNING,"Soft Reset of SGX"));
4321 -       ResetSGXSleep(psDevInfo, ui32PDUMPFlags, IMG_TRUE);
4322 -
4323 -
4324 -       ui32RegVal = 0;
4325 -       OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_SOFT_RESET, ui32RegVal);
4326 -       PDUMPREGWITHFLAGS(EUR_CR_SOFT_RESET, ui32RegVal, ui32PDUMPFlags);
4327 -
4328 -
4329 -       ResetSGXSleep(psDevInfo, ui32PDUMPFlags, IMG_TRUE);
4330 -
4331 -       PDUMPCOMMENTWITHFLAGS(ui32PDUMPFlags, "End of SGX reset sequence\r\n");
4332 -}
4333 -
4334  static PVRSRV_ERROR DevInitSGXPart1 (IMG_VOID *pvDeviceNode)
4335  {
4336         PVRSRV_SGXDEV_INFO      *psDevInfo;
4337 @@ -730,6 +497,7 @@
4338
4339         psDevInfo->sKernelPDDevPAddr = sPDDevPAddr;
4340
4341 +
4342
4343         for(i=0; i<psDeviceNode->sDevMemoryInfo.ui32HeapCount; i++)
4344         {
4345 @@ -759,25 +527,6 @@
4346                 return PVRSRV_ERROR_GENERIC;
4347         }
4348
4349 -#if defined(SUPPORT_SGX_EVENT_OBJECT)
4350 -
4351 -       if(OSAllocMem( PVRSRV_OS_PAGEABLE_HEAP,
4352 -                                        sizeof(PVRSRV_EVENTOBJECT) ,
4353 -                                        (IMG_VOID **)&psDevInfo->psSGXEventObject, 0) != PVRSRV_OK)
4354 -       {
4355 -
4356 -               PVR_DPF((PVR_DBG_ERROR,"DevInitSGXPart1 : Failed to alloc memory for event object"));
4357 -               return (PVRSRV_ERROR_OUT_OF_MEMORY);
4358 -       }
4359 -
4360 -       if(OSEventObjectCreate("PVRSRV_EVENTOBJECT_SGX", psDevInfo->psSGXEventObject) != PVRSRV_OK)
4361 -       {
4362 -               PVR_DPF((PVR_DBG_ERROR,"DevInitSGXPart1 : Failed to create event object"));
4363 -               return (PVRSRV_ERROR_OUT_OF_MEMORY);
4364 -
4365 -       }
4366 -#endif
4367 -
4368         return PVRSRV_OK;
4369  }
4370
4371 @@ -816,9 +565,10 @@
4372
4373
4374         psDevInfo->ui32CoreClockSpeed = psSGXTimingInfo->ui32CoreClockSpeed;
4375 +       psDevInfo->ui32uKernelTimerClock = psSGXTimingInfo->ui32CoreClockSpeed / psSGXTimingInfo->ui32uKernelFreq;
4376
4377
4378 -       psInitInfo->ui32uKernelTimerClock = psSGXTimingInfo->ui32CoreClockSpeed / psSGXTimingInfo->ui32uKernelFreq;
4379 +       psInitInfo->ui32uKernelTimerClock = psDevInfo->ui32uKernelTimerClock;
4380  #if defined(SUPPORT_HW_RECOVERY)
4381         psInitInfo->ui32HWRecoverySampleRate = psSGXTimingInfo->ui32uKernelFreq / psSGXTimingInfo->ui32HWRecoveryFreq;
4382  #endif
4383 @@ -970,7 +720,6 @@
4384  #endif
4385
4386
4387 -
4388
4389
4390         OSMemSet(psDevInfo->psKernelCCB, 0, sizeof(PVRSRV_SGX_KERNEL_CCB));
4391 @@ -983,27 +732,16 @@
4392         PDUMPCOMMENT("Kernel CCB Event Kicker");
4393         PDUMPMEM(IMG_NULL, psDevInfo->psKernelCCBEventKickerMemInfo, 0, sizeof(*psDevInfo->pui32KernelCCBEventKicker), PDUMP_FLAGS_CONTINUOUS, MAKEUNIQUETAG(psDevInfo->psKernelCCBEventKickerMemInfo));
4394
4395 -
4396 +#if defined(SUPPORT_HW_RECOVERY)
4397
4398 -       eError = PVRSRVSetDevicePowerStateKM(psDeviceNode->sDevId.ui32DeviceIndex,
4399 -                                                                                PVRSRV_POWER_Unspecified,
4400 -                                                                                KERNEL_ID, IMG_FALSE);
4401 -       if (eError != PVRSRV_OK)
4402 -       {
4403 -               PVR_DPF((PVR_DBG_ERROR,"DevInitSGXPart2KM: Failed PVRSRVSetDevicePowerStateKM call"));
4404 -               return eError;
4405 -       }
4406
4407 -#if defined(SUPPORT_HW_RECOVERY)
4408 +
4409 +       psDevInfo->hTimer = OSAddTimer(SGXOSTimer, psDeviceNode,
4410 +                                                                  1000 * 50 / psSGXDeviceMap->sTimingInfo.ui32uKernelFreq);
4411 +       if(psDevInfo->hTimer == IMG_NULL)
4412         {
4413 -               SGX_TIMING_INFORMATION* psSGXTimingInfo = & psSGXDeviceMap->sTimingInfo;
4414 -
4415 -               psDevInfo->hTimer = OSAddTimer(SGXOSTimer, psDeviceNode, 1000 * 50 / psSGXTimingInfo->ui32uKernelFreq);
4416 -               if(psDevInfo->hTimer == IMG_NULL)
4417 -               {
4418 -                       PVR_DPF((PVR_DBG_ERROR,"OSAddTimer : Failed to register timer callback function"));
4419 -                       return PVRSRV_ERROR_GENERIC;
4420 -               }
4421 +               PVR_DPF((PVR_DBG_ERROR,"DevInitSGXPart2KM : Failed to register timer callback function"));
4422 +               return PVRSRV_ERROR_GENERIC;
4423         }
4424  #endif
4425
4426 @@ -1030,38 +768,17 @@
4427         }
4428
4429  #if defined(SUPPORT_HW_RECOVERY)
4430 -
4431 -       if(psDevInfo->hTimer)
4432 -       {
4433 -               eError = OSRemoveTimer (psDevInfo->hTimer);
4434 -               if (eError != PVRSRV_OK)
4435 -               {
4436 -                       PVR_DPF((PVR_DBG_ERROR,"DevDeInitSGX: Failed to remove timer"));
4437 -                       return  eError;
4438 -               }
4439 -       }
4440 -#endif
4441 -
4442 -       MMU_BIFResetPDFree(psDevInfo);
4443 -
4444 -
4445 -
4446 -
4447 -
4448 -
4449 -
4450 -
4451 -#if !defined(SUPPORT_ACTIVE_POWER_MANAGEMENT)
4452 -
4453 -       eError = SGXDeinitialise((IMG_HANDLE)psDevInfo);
4454 +       eError = OSRemoveTimer(psDevInfo->hTimer);
4455         if (eError != PVRSRV_OK)
4456         {
4457 -               PVR_DPF((PVR_DBG_ERROR,"DevDeInitSGX: SGXDeinitialise failed"));
4458 -               return eError;
4459 +               PVR_DPF((PVR_DBG_ERROR,"DevDeInitSGX: Failed to remove timer"));
4460 +               return  eError;
4461         }
4462 +       psDevInfo->hTimer = IMG_NULL;
4463  #endif
4464
4465
4466 +       MMU_BIFResetPDFree(psDevInfo);
4467
4468
4469
4470 @@ -1146,23 +863,14 @@
4471  #endif
4472
4473
4474 -#if defined(SUPPORT_SGX_EVENT_OBJECT)
4475 -
4476 -       if(psDevInfo->psSGXEventObject)
4477 -       {
4478 -               OSEventObjectDestroy(psDevInfo->psSGXEventObject);
4479 -               OSFreeMem( PVRSRV_OS_PAGEABLE_HEAP,
4480 -                                                sizeof(PVRSRV_EVENTOBJECT) ,
4481 -                                                psDevInfo->psSGXEventObject, 0);
4482 -       }
4483 -#endif
4484
4485
4486         OSFreePages(PVRSRV_OS_PAGEABLE_HEAP|PVRSRV_HAP_MULTI_PROCESS,
4487                                 sizeof(PVRSRV_SGXDEV_INFO),
4488                                 psDevInfo,
4489                                 hDevInfoOSMemHandle);
4490 -
4491 +       psDeviceNode->pvDevice = IMG_NULL;
4492 +
4493         if (psDeviceMemoryHeap != IMG_NULL)
4494         {
4495
4496 @@ -1178,47 +886,17 @@
4497
4498
4499
4500 -IMG_VOID HWRecoveryResetSGX (PVRSRV_SGXDEV_INFO *psDevInfo,
4501 -                                                        IMG_UINT32             ui32Component,
4502 -                                                        IMG_UINT32                     ui32CallerID)
4503 -{
4504 -       PVRSRV_ERROR eError;
4505 -
4506 -       PVR_UNREFERENCED_PARAMETER(ui32Component);
4507 -       PVR_UNREFERENCED_PARAMETER(ui32CallerID);
4508 -
4509 -
4510 -       PVR_DPF((PVR_DBG_ERROR, "HWRecoveryResetSGX: SGX Hardware Recovery triggered"));
4511 -
4512 -
4513 -       PDUMPSUSPEND();
4514 -
4515 -
4516 -       ResetPBs(psDevInfo);
4517 -
4518 -
4519 -       eError = SGXInitialise(psDevInfo, IMG_TRUE);
4520 -       if (eError != PVRSRV_OK)
4521 -       {
4522 -               PVR_DPF((PVR_DBG_ERROR,"HWRecoveryResetSGX: SGXInitialise failed (%d)", eError));
4523 -       }
4524 -
4525 -
4526 -       PDUMPRESUME();
4527 -}
4528 -
4529 -
4530 -IMG_VOID HWRecoveryResetSGXEDM (PVRSRV_DEVICE_NODE *psDeviceNode,
4531 -                                                                       IMG_UINT32                      ui32Component,
4532 +#if defined(SYS_USING_INTERRUPTS) || defined(SUPPORT_HW_RECOVERY)
4533 +static IMG_VOID HWRecoveryResetSGX (PVRSRV_DEVICE_NODE *psDeviceNode,
4534 +                                                                       IMG_UINT32                      ui32Component,
4535                                                                         IMG_UINT32                      ui32CallerID)
4536  {
4537         PVRSRV_ERROR            eError;
4538         PVRSRV_SGXDEV_INFO      *psDevInfo = (PVRSRV_SGXDEV_INFO*)psDeviceNode->pvDevice;
4539         PVRSRV_SGX_HOST_CTL     *psSGXHostCtl = (PVRSRV_SGX_HOST_CTL *)psDevInfo->psSGXHostCtl;
4540
4541 -#if defined(SGX_FEATURE_2D_HARDWARE)
4542 -       SGX2DHWRecoveryStart(psDevInfo);
4543 -#endif
4544 +       PVR_UNREFERENCED_PARAMETER(ui32Component);
4545 +
4546
4547
4548         eError = PVRSRVPowerLock(ui32CallerID, IMG_FALSE);
4549 @@ -1227,15 +905,32 @@
4550
4551
4552
4553 -               PVR_DPF((PVR_DBG_WARNING,"HWRecoveryResetSGXEDM: Power transition in progress"));
4554 +               PVR_DPF((PVR_DBG_WARNING,"HWRecoveryResetSGX: Power transition in progress"));
4555                 return;
4556         }
4557
4558         psSGXHostCtl->ui32InterruptClearFlags |= PVRSRV_USSE_EDM_INTERRUPT_HWR;
4559
4560 +       PVR_DPF((PVR_DBG_ERROR, "HWRecoveryResetSGX: SGX Hardware Recovery triggered"));
4561
4562 -       HWRecoveryResetSGX(psDevInfo, ui32Component, ui32CallerID);
4563 +
4564 +
4565 +       PDUMPSUSPEND();
4566
4567 +
4568 +       do
4569 +       {
4570 +               eError = SGXInitialise(psDevInfo, IMG_TRUE);
4571 +       }
4572 +       while (eError == PVRSRV_ERROR_RETRY);
4573 +       if (eError != PVRSRV_OK)
4574 +       {
4575 +               PVR_DPF((PVR_DBG_ERROR,"HWRecoveryResetSGX: SGXInitialise failed (%d)", eError));
4576 +       }
4577 +
4578 +
4579 +       PDUMPRESUME();
4580 +
4581         PVRSRVPowerUnlock(ui32CallerID);
4582
4583
4584 @@ -1244,11 +939,9 @@
4585
4586
4587         PVRSRVProcessQueues(ui32CallerID, IMG_TRUE);
4588 -
4589 -#if defined(SGX_FEATURE_2D_HARDWARE)
4590 -       SGX2DHWRecoveryEnd(psDevInfo);
4591 -#endif
4592  }
4593 +#endif
4594 +
4595
4596  #if defined(SUPPORT_HW_RECOVERY)
4597  IMG_VOID SGXOSTimer(IMG_VOID *pvData)
4598 @@ -1261,10 +954,6 @@
4599         IMG_UINT32              ui32CurrentEDMTasks;
4600         IMG_BOOL                bLockup = IMG_FALSE;
4601         IMG_BOOL                bPoweredDown;
4602 -#if defined(SGX_FEATURE_2D_HARDWARE)
4603 -       IMG_UINT32              ui322DCompletedBlits = 0;
4604 -       IMG_BOOL                b2DCoreIsBusy;
4605 -#endif
4606
4607
4608         psDevInfo->ui32TimeStamp++;
4609 @@ -1305,42 +994,6 @@
4610                 }
4611         }
4612
4613 -#if defined(SGX_FEATURE_2D_HARDWARE)
4614 -       if (!bPoweredDown)
4615 -       {
4616 -               ui322DCompletedBlits = psDevInfo->ui322DCompletedBlits;
4617 -               psDevInfo->ui322DCompletedBlits = SGX2DCompletedBlits(psDevInfo);
4618 -       }
4619 -
4620 -       if (!bLockup && !bPoweredDown)
4621 -       {
4622 -               b2DCoreIsBusy = SGX2DIsBusy(psDevInfo);
4623 -
4624 -               if (b2DCoreIsBusy && ui322DCompletedBlits == psDevInfo->ui322DCompletedBlits)
4625 -               {
4626 -                       if (psDevInfo->b2DLockupSuspected)
4627 -                       {
4628 -                               PVR_DPF((PVR_DBG_ERROR, "SGXTimer() detects 2D lockup (%d blits completed)", psDevInfo->ui322DCompletedBlits));
4629 -                               bLockup = IMG_TRUE;
4630 -                               psDevInfo->b2DLockupSuspected = IMG_FALSE;
4631 -                       }
4632 -                       else
4633 -                       {
4634 -
4635 -                               psDevInfo->b2DLockupSuspected = IMG_TRUE;
4636 -                       }
4637 -               }
4638 -               else
4639 -               {
4640 -                       psDevInfo->b2DLockupSuspected = IMG_FALSE;
4641 -               }
4642 -       }
4643 -       else
4644 -       {
4645 -                       psDevInfo->b2DLockupSuspected = IMG_FALSE;
4646 -       }
4647 -#endif
4648 -
4649         if (bLockup)
4650         {
4651                 PVRSRV_SGX_HOST_CTL     *psSGXHostCtl = (PVRSRV_SGX_HOST_CTL *)psDevInfo->psSGXHostCtl;
4652 @@ -1349,7 +1002,7 @@
4653                 psSGXHostCtl->ui32HostDetectedLockups ++;
4654
4655
4656 -               HWRecoveryResetSGXEDM(psDeviceNode, 0, KERNEL_ID);
4657 +               HWRecoveryResetSGX(psDeviceNode, 0, KERNEL_ID);
4658         }
4659  }
4660  #endif
4661 @@ -1394,14 +1047,6 @@
4662                         ui32EventClear |= EUR_CR_EVENT_HOST_CLEAR_SW_EVENT_MASK;
4663                 }
4664
4665 -#if defined(SGX_FEATURE_2D_HARDWARE)
4666 -               if (ui32EventStatus & EUR_CR_EVENT_STATUS_TWOD_COMPLETE_MASK)
4667 -               {
4668 -                       ui32EventClear |= EUR_CR_EVENT_HOST_CLEAR_TWOD_COMPLETE_MASK;
4669 -                       SGX2DHandle2DComplete(psDevInfo);
4670 -               }
4671 -#endif
4672 -
4673                 if (ui32EventClear)
4674                 {
4675                         bInterruptProcessed = IMG_TRUE;
4676 @@ -1420,7 +1065,6 @@
4677
4678  IMG_VOID SGX_MISRHandler (IMG_VOID *pvData)
4679  {
4680 -       PVRSRV_ERROR            eError = PVRSRV_OK;
4681         PVRSRV_DEVICE_NODE      *psDeviceNode = (PVRSRV_DEVICE_NODE *)pvData;
4682         PVRSRV_SGXDEV_INFO      *psDevInfo = (PVRSRV_SGXDEV_INFO*)psDeviceNode->pvDevice;
4683         PVRSRV_SGX_HOST_CTL     *psSGXHostCtl = (PVRSRV_SGX_HOST_CTL *)psDevInfo->psSGXHostCtl;
4684 @@ -1428,64 +1072,12 @@
4685         if ((psSGXHostCtl->ui32InterruptFlags & PVRSRV_USSE_EDM_INTERRUPT_HWR) &&
4686                 !(psSGXHostCtl->ui32InterruptClearFlags & PVRSRV_USSE_EDM_INTERRUPT_HWR))
4687         {
4688 -               HWRecoveryResetSGXEDM(psDeviceNode, 0, ISR_ID);
4689 +               HWRecoveryResetSGX(psDeviceNode, 0, ISR_ID);
4690         }
4691
4692 -       if ((eError == PVRSRV_OK) &&
4693 -               (psSGXHostCtl->ui32InterruptFlags & PVRSRV_USSE_EDM_INTERRUPT_ACTIVE_POWER) &&
4694 -               !(psSGXHostCtl->ui32PowManFlags & PVRSRV_USSE_EDM_POWMAN_POWEROFF_REQUEST))
4695 -       {
4696 -
4697 -
4698  #if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT)
4699 -               {
4700 -
4701 -
4702 -                       PDUMPSUSPEND();
4703 -
4704 -                       eError = PVRSRVSetDevicePowerStateKM(psDeviceNode->sDevId.ui32DeviceIndex,
4705 -                                                                                                PVRSRV_POWER_STATE_D3,
4706 -                                                                                                ISR_ID, IMG_FALSE);
4707 -                       if (eError == PVRSRV_OK)
4708 -                       {
4709 -                               if ((*(volatile IMG_UINT32 *)(&psSGXHostCtl->ui32PowManFlags)
4710 -                                       & PVRSRV_USSE_EDM_POWMAN_POWEROFF_RESTART_IMMEDIATE) != 0)
4711 -                               {
4712 -
4713 -
4714 -
4715 -                                       psDeviceNode->bReProcessDeviceCommandComplete = IMG_TRUE;
4716 -                               }
4717 -                       }
4718 -                       else if (eError == PVRSRV_ERROR_RETRY)
4719 -                       {
4720 -
4721 -
4722 -                               eError = PVRSRV_OK;
4723 -                       }
4724 -
4725 -
4726 -                       PDUMPRESUME();
4727 -               }
4728 +       SGXTestActivePowerEvent(psDeviceNode, ISR_ID);
4729  #endif
4730 -       }
4731 -
4732 -#if defined(SUPPORT_SGX_EVENT_OBJECT)
4733 -       if (psDevInfo->psSGXEventObject)
4734 -       {
4735 -               PVRSRV_EVENTOBJECT *psEventObject = psDevInfo->psSGXEventObject;
4736 -               if(psEventObject->hOSEventKM)
4737 -               {
4738 -                       OSEventObjectSignal(psEventObject->hOSEventKM);
4739 -               }
4740 -       }
4741 -
4742 -#endif
4743 -
4744 -       if (eError != PVRSRV_OK)
4745 -       {
4746 -               PVR_DPF((PVR_DBG_ERROR, "SGX_MISRHandler error:%lu", eError));
4747 -       }
4748  }
4749  #endif
4750
4751 @@ -1494,7 +1086,6 @@
4752  {
4753         DEVICE_MEMORY_INFO *psDevMemoryInfo;
4754         DEVICE_MEMORY_HEAP_INFO *psDeviceMemoryHeap;
4755 -       IMG_BOOL bSharedPB = IMG_TRUE;
4756
4757
4758         psDeviceNode->sDevId.eDeviceType        = DEV_DEVICE_TYPE;
4759 @@ -1684,13 +1275,8 @@
4760                                                                                                                 | PVRSRV_HAP_MULTI_PROCESS;
4761         psDeviceMemoryHeap[SGX_SYNCINFO_HEAP_ID].pszName = "CacheCoherent";
4762         psDeviceMemoryHeap[SGX_SYNCINFO_HEAP_ID].pszBSName = "CacheCoherent BS";
4763 -#if defined(SGX535)
4764
4765         psDeviceMemoryHeap[SGX_SYNCINFO_HEAP_ID].DevMemHeapType = DEVICE_MEMORY_HEAP_SHARED_EXPORTED;
4766 -#else
4767 -
4768 -       psDeviceMemoryHeap[SGX_SYNCINFO_HEAP_ID].DevMemHeapType = DEVICE_MEMORY_HEAP_SHARED_EXPORTED;
4769 -#endif
4770
4771
4772         psDeviceMemoryHeap[SGX_3DPARAMETERS_HEAP_ID].ui32HeapID = HEAP_ID(PVRSRV_DEVICE_TYPE_SGX, SGX_3DPARAMETERS_HEAP_ID);
4773 @@ -1698,32 +1284,23 @@
4774         psDeviceMemoryHeap[SGX_3DPARAMETERS_HEAP_ID].ui32HeapSize = SGX_3DPARAMETERS_HEAP_SIZE;
4775         psDeviceMemoryHeap[SGX_3DPARAMETERS_HEAP_ID].pszName = "3DParameters";
4776         psDeviceMemoryHeap[SGX_3DPARAMETERS_HEAP_ID].pszBSName = "3DParameters BS";
4777 -
4778 -
4779 -       if(bSharedPB)
4780 -       {
4781 -               psDeviceMemoryHeap[SGX_3DPARAMETERS_HEAP_ID].ui32Attribs = PVRSRV_HAP_WRITECOMBINE
4782 -                                                                                                               | PVRSRV_MEM_RAM_BACKED_ALLOCATION
4783 -#if 0
4784 -                                                                                                               | PVRSRV_HAP_KERNEL_ONLY;
4785 +#if defined(SUPPORT_PERCONTEXT_PB)
4786 +       psDeviceMemoryHeap[SGX_3DPARAMETERS_HEAP_ID].ui32Attribs = PVRSRV_HAP_WRITECOMBINE
4787 +                                                                                                                       | PVRSRV_MEM_RAM_BACKED_ALLOCATION
4788 +                                                                                                                       | PVRSRV_HAP_SINGLE_PROCESS;
4789 +       psDeviceMemoryHeap[SGX_3DPARAMETERS_HEAP_ID].DevMemHeapType = DEVICE_MEMORY_HEAP_PERCONTEXT;
4790  #else
4791 -                                                                                                               | PVRSRV_HAP_MULTI_PROCESS;
4792 -#endif
4793 -               psDeviceMemoryHeap[SGX_3DPARAMETERS_HEAP_ID].DevMemHeapType = DEVICE_MEMORY_HEAP_SHARED_EXPORTED;
4794 -       }
4795 -       else
4796 -       {
4797 -               psDeviceMemoryHeap[SGX_3DPARAMETERS_HEAP_ID].ui32Attribs = PVRSRV_HAP_WRITECOMBINE
4798 -                                                                                                                               | PVRSRV_MEM_RAM_BACKED_ALLOCATION
4799 -                                                                                                                               | PVRSRV_HAP_SINGLE_PROCESS;
4800 -               psDeviceMemoryHeap[SGX_3DPARAMETERS_HEAP_ID].DevMemHeapType = DEVICE_MEMORY_HEAP_PERCONTEXT;
4801 -       }
4802 +       psDeviceMemoryHeap[SGX_3DPARAMETERS_HEAP_ID].ui32Attribs = PVRSRV_HAP_WRITECOMBINE
4803 +                                                                                                       | PVRSRV_MEM_RAM_BACKED_ALLOCATION
4804 +                                                                                                       | PVRSRV_HAP_MULTI_PROCESS;
4805 +       psDeviceMemoryHeap[SGX_3DPARAMETERS_HEAP_ID].DevMemHeapType = DEVICE_MEMORY_HEAP_SHARED_EXPORTED;
4806 +#endif
4807
4808
4809         psDeviceMemoryHeap[SGX_GENERAL_MAPPING_HEAP_ID].ui32HeapID = HEAP_ID( PVRSRV_DEVICE_TYPE_SGX , SGX_GENERAL_MAPPING_HEAP_ID);
4810         psDeviceMemoryHeap[SGX_GENERAL_MAPPING_HEAP_ID].sDevVAddrBase.uiAddr = SGX_GENERAL_MAPPING_HEAP_BASE;
4811         psDeviceMemoryHeap[SGX_GENERAL_MAPPING_HEAP_ID].ui32HeapSize = SGX_GENERAL_MAPPING_HEAP_SIZE;
4812 -       psDeviceMemoryHeap[SGX_GENERAL_MAPPING_HEAP_ID].ui32Attribs = PVRSRV_HAP_WRITECOMBINE | PVRSRV_HAP_SINGLE_PROCESS;
4813 +       psDeviceMemoryHeap[SGX_GENERAL_MAPPING_HEAP_ID].ui32Attribs = PVRSRV_HAP_WRITECOMBINE | PVRSRV_HAP_MULTI_PROCESS;
4814         psDeviceMemoryHeap[SGX_GENERAL_MAPPING_HEAP_ID].pszName = "GeneralMapping";
4815         psDeviceMemoryHeap[SGX_GENERAL_MAPPING_HEAP_ID].pszBSName = "GeneralMapping BS";
4816
4817 @@ -1767,23 +1344,7 @@
4818
4819
4820         psClientInfo->ui32ProcessID = OSGetCurrentProcessIDKM();
4821 -#if defined(SGX_FEATURE_2D_HARDWARE)
4822 -       psClientInfo->s2DSlavePort = psDevInfo->s2DSlavePortKM;
4823 -#endif
4824 -       psClientInfo->pvRegsBase = psDevInfo->pvRegsBaseKM;
4825
4826 -#if defined(SUPPORT_SGX_EVENT_OBJECT)
4827 -       if (psDevInfo->psSGXEventObject)
4828 -       {
4829 -               PVRSRV_EVENTOBJECT *psEventObject = psDevInfo->psSGXEventObject;
4830 -               psClientInfo->hOSEventKM = psEventObject->hOSEventKM;
4831 -       }
4832 -       else
4833 -       {
4834 -               psClientInfo->hOSEventKM = IMG_NULL;
4835 -       }
4836 -#endif
4837 -
4838
4839
4840         OSMemCopy(&psClientInfo->asDevData, &psDevInfo->asSGXDevData, sizeof(psClientInfo->asDevData));
4841 @@ -1792,13 +1353,48 @@
4842         return PVRSRV_OK;
4843  }
4844
4845 +
4846  IMG_EXPORT
4847 -PVRSRV_ERROR SGXGetMiscInfoKM(PVRSRV_SGXDEV_INFO *psDevInfo, SGX_MISC_INFO *psMiscInfo)
4848 +PVRSRV_ERROR SGXGetMiscInfoKM(PVRSRV_SGXDEV_INFO       *psDevInfo,
4849 +                                                         SGX_MISC_INFO                 *psMiscInfo)
4850  {
4851 -       PVR_UNREFERENCED_PARAMETER(psDevInfo);
4852 -
4853         switch(psMiscInfo->eRequest)
4854         {
4855 +               case SGX_MISC_INFO_REQUEST_CLOCKSPEED:
4856 +               {
4857 +                       psMiscInfo->uData.ui32SGXClockSpeed = psDevInfo->ui32CoreClockSpeed;
4858 +                       return PVRSRV_OK;
4859 +               }
4860 +#ifdef SUPPORT_SGX_HWPERF
4861 +               case SGX_MISC_INFO_REQUEST_HWPERF_CB_ON:
4862 +               {
4863 +                       psDevInfo->psSGXHostCtl->ui32HWPerfFlags |= PVRSRV_SGX_HWPERF_ON;
4864 +                       return PVRSRV_OK;
4865 +               }
4866 +               case SGX_MISC_INFO_REQUEST_HWPERF_CB_OFF:
4867 +               {
4868 +                       psDevInfo->psSGXHostCtl->ui32HWPerfFlags &= ~PVRSRV_SGX_HWPERF_ON;
4869 +                       return PVRSRV_OK;
4870 +               }
4871 +               case SGX_MISC_INFO_REQUEST_HWPERF_RETRIEVE_CB:
4872 +               {
4873 +                       SGX_MISC_INFO_HWPERF_RETRIEVE_CB* psRetrieve = &psMiscInfo->uData.sRetrieveCB;
4874 +                       PVRSRV_SGX_HWPERF_CB* psHWPerfCB = (PVRSRV_SGX_HWPERF_CB*)psDevInfo->psKernelHWPerfCBMemInfo->pvLinAddrKM;
4875 +                       IMG_UINT i = 0;
4876 +
4877 +                       for (; psHWPerfCB->ui32Woff != psHWPerfCB->ui32Roff && i < psRetrieve->ui32ArraySize; i++)
4878 +                       {
4879 +                               PVRSRV_SGX_HWPERF_CBDATA* psData = &psHWPerfCB->psHWPerfCBData[psHWPerfCB->ui32Roff];
4880 +                               OSMemCopy(&psRetrieve->psHWPerfData[i], psData, sizeof(PVRSRV_SGX_HWPERF_CBDATA));
4881 +                               psRetrieve->psHWPerfData[i].ui32ClockSpeed = psDevInfo->ui32CoreClockSpeed;
4882 +                               psRetrieve->psHWPerfData[i].ui32TimeMax = psDevInfo->ui32uKernelTimerClock;
4883 +                               psHWPerfCB->ui32Roff = (psHWPerfCB->ui32Roff + 1) & (PVRSRV_SGX_HWPERF_CBSIZE - 1);
4884 +                       }
4885 +                       psRetrieve->ui32DataCount = i;
4886 +                       psRetrieve->ui32Time = OSClockus();
4887 +                       return PVRSRV_OK;
4888 +               }
4889 +#endif
4890                 default:
4891                 {
4892
4893 @@ -1807,3 +1403,55 @@
4894         }
4895  }
4896
4897 +
4898 +#if defined(SUPPORT_SGX_HWPERF)
4899 +IMG_EXPORT
4900 +PVRSRV_ERROR SGXReadHWPerfCountersKM(PVRSRV_SGXDEV_INFO        *psDevInfo,
4901 +                                                                        IMG_UINT32                     ui32PerfReg,
4902 +                                                                        IMG_UINT32                     *pui32OldPerf,
4903 +                                                                        IMG_BOOL                       bNewPerf,
4904 +                                                                        IMG_UINT32                     ui32NewPerf,
4905 +                                                                        IMG_UINT32                     ui32NewPerfReset,
4906 +                                                                        IMG_UINT32                     ui32PerfCountersReg,
4907 +                                                                        IMG_UINT32                     *pui32Counters,
4908 +                                                                        IMG_UINT32                     *pui32KickTACounter,
4909 +                                                                        IMG_UINT32                     *pui32KickTARenderCounter,
4910 +                                                                        IMG_UINT32                     *pui32CPUTime,
4911 +                                                                        IMG_UINT32                     *pui32SGXTime)
4912 +{
4913 +       IMG_UINT32      i;
4914 +
4915 +
4916 +
4917 +       {
4918 +               *pui32OldPerf = OSReadHWReg(psDevInfo->pvRegsBaseKM, ui32PerfReg);
4919 +
4920 +               for (i = 0; i < 9; ++i)
4921 +               {
4922 +                       pui32Counters[i] = OSReadHWReg(psDevInfo->pvRegsBaseKM, ui32PerfCountersReg + (i * 4));
4923 +               }
4924 +
4925 +               *pui32KickTACounter = psDevInfo->ui32KickTACounter;
4926 +               *pui32KickTARenderCounter = psDevInfo->ui32KickTARenderCounter;
4927 +
4928 +               *pui32CPUTime = OSClockus();
4929 +               *pui32SGXTime = psDevInfo->psSGXHostCtl->ui32TimeWraps;
4930 +       }
4931 +
4932 +
4933 +
4934 +       if (bNewPerf)
4935 +       {
4936 +               if(ui32NewPerfReset != 0)
4937 +               {
4938 +                       OSWriteHWReg(psDevInfo->pvRegsBaseKM, ui32PerfReg, ui32NewPerf | ui32NewPerfReset);
4939 +               }
4940 +
4941 +               OSWriteHWReg(psDevInfo->pvRegsBaseKM, ui32PerfReg, ui32NewPerf);
4942 +       }
4943 +
4944 +       return PVRSRV_OK;
4945 +}
4946 +#endif
4947 +
4948 +
4949 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgxkick.c git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgxkick.c
4950 --- git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgxkick.c   2009-01-05 20:00:44.000000000 +0100
4951 +++ git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgxkick.c   2008-12-18 15:47:29.000000000 +0100
4952 @@ -24,11 +24,13 @@
4953   *
4954   ******************************************************************************/
4955
4956 +#include <stddef.h>
4957  #include "services_headers.h"
4958  #include "sgxinfo.h"
4959  #include "sgxinfokm.h"
4960  #if defined (PDUMP)
4961  #include "sgxapi_km.h"
4962 +#include "pdump_km.h"
4963  #endif
4964  #include "sgx_bridge_km.h"
4965  #include "osfunc.h"
4966 @@ -36,92 +38,241 @@
4967  #include "sgxutils.h"
4968
4969
4970 +#define CCB_OFFSET_IS_VALID(type, psCCBMemInfo, psCCBKick, offset) \
4971 +       ((psCCBKick)->offset + sizeof(type) < (psCCBMemInfo)->ui32AllocSize)
4972 +
4973  #define        CCB_DATA_FROM_OFFSET(type, psCCBMemInfo, psCCBKick, offset) \
4974         ((type *)(((char *)(psCCBMemInfo)->pvLinAddrKM) + \
4975                 (psCCBKick)->offset))
4976
4977 -#define        CCB_OFFSET_IS_VALID(psCCBMemInfo, psCCBKick, offset) \
4978 -               ((psCCBKick)->offset < (psCCBMemInfo)->ui32AllocSize)
4979 -
4980  IMG_EXPORT
4981  PVRSRV_ERROR SGXDoKickKM(IMG_HANDLE hDevHandle, PVR3DIF4_CCB_KICK *psCCBKick)
4982  {
4983         PVRSRV_ERROR eError;
4984         PVRSRV_KERNEL_SYNC_INFO *psSyncInfo;
4985         PVRSRV_KERNEL_MEM_INFO  *psCCBMemInfo = (PVRSRV_KERNEL_MEM_INFO *) psCCBKick->hCCBKernelMemInfo;
4986 -       IMG_UINT32 *pui32DstReadOpsPendingVal;
4987 -       IMG_UINT32 *pui32DstWriteOpsPendingVal;
4988 +       PVR3DIF4_CMDTA_SHARED *psTACmd;
4989         IMG_UINT32 i;
4990 +#if defined(SUPPORT_SGX_HWPERF)
4991 +       PVRSRV_DEVICE_NODE      *psDeviceNode;
4992 +       PVRSRV_SGXDEV_INFO      *psDevInfo;
4993
4994 +       psDeviceNode = (PVRSRV_DEVICE_NODE *)hDevHandle;
4995 +       psDevInfo = (PVRSRV_SGXDEV_INFO *)psDeviceNode->pvDevice;
4996 +#endif
4997
4998 -#if defined(NO_HARDWARE)
4999 -       pui32DstReadOpsPendingVal = IMG_NULL;
5000 -       pui32DstWriteOpsPendingVal = IMG_NULL;
5001 +#if defined(SUPPORT_SGX_HWPERF)
5002 +       if (psCCBKick->bKickRender)
5003 +       {
5004 +               ++psDevInfo->ui32KickTARenderCounter;
5005 +       }
5006 +       ++psDevInfo->ui32KickTACounter;
5007  #endif
5008
5009 -       if (psCCBKick->hDstKernelSyncInfo != IMG_NULL)
5010 +       if (!CCB_OFFSET_IS_VALID(PVR3DIF4_CMDTA_SHARED, psCCBMemInfo, psCCBKick, ui32CCBOffset))
5011         {
5012 -
5013 -               if (!CCB_OFFSET_IS_VALID(psCCBMemInfo, psCCBKick, ui32DstReadOpsPendingOffset) || !CCB_OFFSET_IS_VALID(psCCBMemInfo, psCCBKick, ui32DstWriteOpsPendingOffset))
5014 +               return PVRSRV_ERROR_INVALID_PARAMS;
5015 +       }
5016 +       psTACmd = CCB_DATA_FROM_OFFSET(PVR3DIF4_CMDTA_SHARED, psCCBMemInfo, psCCBKick, ui32CCBOffset);
5017 +
5018 +
5019 +       if (psCCBKick->hTA3DSyncInfo)
5020 +       {
5021 +               psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psCCBKick->hTA3DSyncInfo;
5022 +               psTACmd->sTA3DDependancy.sWriteOpsCompleteDevVAddr = psSyncInfo->sWriteOpsCompleteDevVAddr;
5023 +
5024 +               psTACmd->sTA3DDependancy.ui32WriteOpPendingVal   = psSyncInfo->psSyncData->ui32WriteOpsPending;
5025 +
5026 +               if (psCCBKick->bTADependency)
5027                 {
5028 -                       PVR_DPF((PVR_DBG_ERROR, "SGXDoKickKM: ui32DstReadOpsPendingOffset or ui32DstWriteOpsPendingOffset out of range"));
5029 +                       psSyncInfo->psSyncData->ui32WriteOpsPending++;
5030                 }
5031 -               else
5032 -               {
5033 -                               psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *) psCCBKick->hDstKernelSyncInfo;
5034 -                               pui32DstReadOpsPendingVal = CCB_DATA_FROM_OFFSET(IMG_UINT32, psCCBMemInfo, psCCBKick, ui32DstReadOpsPendingOffset);
5035 -                               pui32DstWriteOpsPendingVal = CCB_DATA_FROM_OFFSET(IMG_UINT32, psCCBMemInfo, psCCBKick, ui32DstWriteOpsPendingOffset);
5036 +       }
5037
5038 -                               *pui32DstReadOpsPendingVal = psSyncInfo->psSyncData->ui32ReadOpsPending;
5039 -                               *pui32DstWriteOpsPendingVal = psSyncInfo->psSyncData->ui32WriteOpsPending++;
5040 -               }
5041 +       if (psCCBKick->hTASyncInfo != IMG_NULL)
5042 +       {
5043 +               psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psCCBKick->hTASyncInfo;
5044
5045 +               psTACmd->sTQSyncReadOpsCompleteDevVAddr  = psSyncInfo->sReadOpsCompleteDevVAddr;
5046 +               psTACmd->sTQSyncWriteOpsCompleteDevVAddr = psSyncInfo->sWriteOpsCompleteDevVAddr;
5047 +
5048 +               psTACmd->ui32TQSyncReadOpsPendingVal = psSyncInfo->psSyncData->ui32ReadOpsPending++;
5049 +               psTACmd->ui32TQSyncWriteOpsPendingVal = psSyncInfo->psSyncData->ui32WriteOpsPending;
5050         }
5051
5052 +       if (psCCBKick->h3DSyncInfo != IMG_NULL)
5053 +       {
5054 +               psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psCCBKick->h3DSyncInfo;
5055 +
5056 +               psTACmd->s3DTQSyncReadOpsCompleteDevVAddr  = psSyncInfo->sReadOpsCompleteDevVAddr;
5057 +               psTACmd->s3DTQSyncWriteOpsCompleteDevVAddr = psSyncInfo->sWriteOpsCompleteDevVAddr;
5058 +
5059 +               psTACmd->ui323DTQSyncReadOpsPendingVal = psSyncInfo->psSyncData->ui32ReadOpsPending++;
5060 +               psTACmd->ui323DTQSyncWriteOpsPendingVal  = psSyncInfo->psSyncData->ui32WriteOpsPending;
5061 +       }
5062 +
5063 +       psTACmd->ui32NumTAStatusVals = psCCBKick->ui32NumTAStatusVals;
5064         if (psCCBKick->ui32NumTAStatusVals != 0)
5065         {
5066
5067                 for (i = 0; i < psCCBKick->ui32NumTAStatusVals; i++)
5068                 {
5069 -                       if (CCB_OFFSET_IS_VALID(psCCBMemInfo, psCCBKick, aui32TAStatusValueOffset[i]))
5070 -                       {
5071 -                               IMG_UINT32 *pui32TAStatusValue = CCB_DATA_FROM_OFFSET(IMG_UINT32, psCCBMemInfo, psCCBKick, aui32TAStatusValueOffset[i]);
5072 -                               psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psCCBKick->ahTAStatusSyncInfo[i];
5073 +                       psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psCCBKick->ahTAStatusSyncInfo[i];
5074
5075 -                               *pui32TAStatusValue = psSyncInfo->psSyncData->ui32ReadOpsPending;
5076 -                       }
5077 -                       else
5078 -                       {
5079 -                               PVR_DPF((PVR_DBG_ERROR, "SGXDoKickKM: aui32TAStatusValueOffset[%d] out of range", i));
5080 -                       }
5081 +                       psTACmd->sCtlTAStatusInfo[i].sStatusDevAddr = psSyncInfo->sReadOpsCompleteDevVAddr;
5082 +
5083 +                       psTACmd->sCtlTAStatusInfo[i].ui32StatusValue = psSyncInfo->psSyncData->ui32ReadOpsPending;
5084                 }
5085         }
5086
5087 +       psTACmd->ui32Num3DStatusVals = psCCBKick->ui32Num3DStatusVals;
5088         if (psCCBKick->ui32Num3DStatusVals != 0)
5089         {
5090
5091                 for (i = 0; i < psCCBKick->ui32Num3DStatusVals; i++)
5092                 {
5093 -                       if (CCB_OFFSET_IS_VALID(psCCBMemInfo, psCCBKick, aui323DStatusValueOffset[i]))
5094 -                       {
5095 -                               IMG_UINT32 *pui323DStatusValue = CCB_DATA_FROM_OFFSET(IMG_UINT32, psCCBMemInfo, psCCBKick, aui323DStatusValueOffset[i]);
5096 -                               psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psCCBKick->ah3DStatusSyncInfo[i];
5097 +                       psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psCCBKick->ah3DStatusSyncInfo[i];
5098
5099 -                               *pui323DStatusValue = psSyncInfo->psSyncData->ui32ReadOpsPending;
5100 -                       }
5101 -                       else
5102 +                       psTACmd->sCtl3DStatusInfo[i].sStatusDevAddr = psSyncInfo->sReadOpsCompleteDevVAddr;
5103 +
5104 +                       psTACmd->sCtl3DStatusInfo[i].ui32StatusValue = psSyncInfo->psSyncData->ui32ReadOpsPending;
5105 +               }
5106 +       }
5107 +
5108 +
5109 +       psTACmd->ui32NumSrcSyncs = psCCBKick->ui32NumSrcSyncs;
5110 +       for (i=0; i<psCCBKick->ui32NumSrcSyncs; i++)
5111 +       {
5112 +               psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *) psCCBKick->ahSrcKernelSyncInfo[i];
5113 +
5114 +               psTACmd->asSrcSyncs[i].sWriteOpsCompleteDevVAddr = psSyncInfo->sWriteOpsCompleteDevVAddr;
5115 +               psTACmd->asSrcSyncs[i].sReadOpsCompleteDevVAddr = psSyncInfo->sReadOpsCompleteDevVAddr;
5116 +
5117 +
5118 +               psTACmd->asSrcSyncs[i].ui32ReadOpPendingVal = psSyncInfo->psSyncData->ui32ReadOpsPending++;
5119 +
5120 +               psTACmd->asSrcSyncs[i].ui32WriteOpPendingVal = psSyncInfo->psSyncData->ui32WriteOpsPending;
5121 +
5122 +       }
5123 +
5124 +       if (psCCBKick->bFirstKickOrResume && psCCBKick->hRenderSurfSyncInfo != IMG_NULL)
5125 +       {
5126 +               psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *) psCCBKick->hRenderSurfSyncInfo;
5127 +               psTACmd->sWriteOpsCompleteDevVAddr = psSyncInfo->sWriteOpsCompleteDevVAddr;
5128 +               psTACmd->sReadOpsCompleteDevVAddr = psSyncInfo->sReadOpsCompleteDevVAddr;
5129 +
5130 +               psTACmd->ui32ReadOpsPendingVal = psSyncInfo->psSyncData->ui32ReadOpsPending;
5131 +               psTACmd->ui32WriteOpsPendingVal = psSyncInfo->psSyncData->ui32WriteOpsPending++;
5132 +
5133 +
5134 +#if defined(PDUMP)
5135 +               if (PDumpIsCaptureFrameKM())
5136 +               {
5137 +                       if (psSyncInfo->psSyncData->ui32LastOpDumpVal == 0)
5138                         {
5139 -                               PVR_DPF((PVR_DBG_ERROR, "SGXDoKickKM: aui323DStatusValueOffset[%d] out of range", i));
5140 +
5141 +                       PDUMPCOMMENT("Init render surface last op\r\n");
5142 +
5143 +                       PDUMPMEM(IMG_NULL,
5144 +                               psSyncInfo->psSyncDataMemInfoKM,
5145 +                               0,
5146 +                               sizeof(PVRSRV_SYNC_DATA),
5147 +                               0,
5148 +                               MAKEUNIQUETAG(psSyncInfo->psSyncDataMemInfoKM));
5149 +
5150 +                       PDUMPMEM(&psSyncInfo->psSyncData->ui32LastOpDumpVal,
5151 +                               psSyncInfo->psSyncDataMemInfoKM,
5152 +                               offsetof(PVRSRV_SYNC_DATA, ui32WriteOpsComplete),
5153 +                               sizeof(psSyncInfo->psSyncData->ui32WriteOpsComplete),
5154 +                               0,
5155 +                               MAKEUNIQUETAG(psSyncInfo->psSyncDataMemInfoKM));
5156                         }
5157 +
5158 +                       psSyncInfo->psSyncData->ui32LastOpDumpVal++;
5159                 }
5160 +#endif
5161         }
5162
5163 +#if defined(PDUMP)
5164 +       if (PDumpIsCaptureFrameKM())
5165 +       {
5166 +               PDUMPCOMMENT("Shared part of TA command\r\n");
5167 +
5168 +               PDUMPMEM(IMG_NULL, psCCBMemInfo, psCCBKick->ui32CCBOffset, sizeof(PVR3DIF4_CMDTA_SHARED), 0, MAKEUNIQUETAG(psCCBMemInfo));
5169 +
5170 +               if (psCCBKick->hRenderSurfSyncInfo != IMG_NULL)
5171 +               {
5172 +                       IMG_UINT32 ui32HackValue;
5173 +
5174 +                       psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psCCBKick->hRenderSurfSyncInfo;
5175 +                       ui32HackValue = psSyncInfo->psSyncData->ui32LastOpDumpVal - 1;
5176 +
5177 +                       PDUMPCOMMENT("Hack render surface last op in TA cmd\r\n");
5178 +
5179 +                       PDUMPMEM(&ui32HackValue,
5180 +                               psCCBMemInfo,
5181 +                               psCCBKick->ui32CCBOffset + offsetof(PVR3DIF4_CMDTA_SHARED, ui32WriteOpsPendingVal),
5182 +                               sizeof(IMG_UINT32),
5183 +                               0,
5184 +                               MAKEUNIQUETAG(psCCBMemInfo));
5185 +
5186 +                               ui32HackValue = 0;
5187 +                               PDUMPCOMMENT("Hack render surface read op in TA cmd\r\n");
5188 +
5189 +                       PDUMPMEM(&ui32HackValue,
5190 +                                psCCBMemInfo,
5191 +                                psCCBKick->ui32CCBOffset + offsetof(PVR3DIF4_CMDTA_SHARED, sReadOpsCompleteDevVAddr),
5192 +                                sizeof(IMG_UINT32),
5193 +                                0,
5194 +                               MAKEUNIQUETAG(psCCBMemInfo));
5195 +               }
5196 +
5197 +               for (i = 0; i < psCCBKick->ui32NumTAStatusVals; i++)
5198 +               {
5199 +                       psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psCCBKick->ahTAStatusSyncInfo[i];
5200 +
5201 +                       PDUMPCOMMENT("Hack TA status value in TA cmd\r\n");
5202 +
5203 +                       PDUMPMEM(&psSyncInfo->psSyncData->ui32LastOpDumpVal,
5204 +                                psCCBMemInfo,
5205 +                                psCCBKick->ui32CCBOffset + offsetof(PVR3DIF4_CMDTA_SHARED, sCtlTAStatusInfo[i].ui32StatusValue),
5206 +                                sizeof(IMG_UINT32),
5207 +                                0,
5208 +                               MAKEUNIQUETAG(psCCBMemInfo));
5209 +               }
5210 +
5211 +               for (i = 0; i < psCCBKick->ui32Num3DStatusVals; i++)
5212 +               {
5213 +                       psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psCCBKick->ah3DStatusSyncInfo[i];
5214 +
5215 +                       PDUMPCOMMENT("Hack 3D status value in TA cmd\r\n");
5216 +
5217 +                       PDUMPMEM(&psSyncInfo->psSyncData->ui32LastOpDumpVal,
5218 +                                psCCBMemInfo,
5219 +                                psCCBKick->ui32CCBOffset + offsetof(PVR3DIF4_CMDTA_SHARED, sCtl3DStatusInfo[i].ui32StatusValue),
5220 +                                sizeof(IMG_UINT32),
5221 +                                0,
5222 +                               MAKEUNIQUETAG(psCCBMemInfo));
5223 +               }
5224 +       }
5225 +#endif
5226 +
5227         eError = SGXScheduleCCBCommandKM(hDevHandle, psCCBKick->eCommand, &psCCBKick->sCommand, KERNEL_ID);
5228         if (eError == PVRSRV_ERROR_RETRY)
5229         {
5230 -
5231 -               psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *) psCCBKick->hDstKernelSyncInfo;
5232 -               psSyncInfo->psSyncData->ui32WriteOpsPending--;
5233 +               if (psCCBKick->bFirstKickOrResume && psCCBKick->hRenderSurfSyncInfo != IMG_NULL)
5234 +               {
5235 +
5236 +                       psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *) psCCBKick->hRenderSurfSyncInfo;
5237 +                       psSyncInfo->psSyncData->ui32WriteOpsPending--;
5238 +               }
5239 +
5240 +               for (i=0; i<psCCBKick->ui32NumSrcSyncs; i++)
5241 +               {
5242 +                       psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *) psCCBKick->ahSrcKernelSyncInfo[i];
5243 +                       psSyncInfo->psSyncData->ui32ReadOpsPending--;
5244 +               }
5245 +
5246                 return eError;
5247         }
5248         else if (PVRSRV_OK != eError)
5249 @@ -132,70 +283,66 @@
5250
5251
5252  #if defined(NO_HARDWARE)
5253 -       if (psCCBKick->ui32NumTAStatusVals != 0)
5254 -       {
5255 -
5256 -               for (i = 0; i < psCCBKick->ui32NumTAStatusVals; i++)
5257 -               {
5258 -                       if (CCB_OFFSET_IS_VALID(psCCBMemInfo, psCCBKick, aui32TAStatusValueOffset[i]))
5259 -                       {
5260 -                               IMG_UINT32 *pui32TAStatusValue = CCB_DATA_FROM_OFFSET(IMG_UINT32, psCCBMemInfo, psCCBKick, aui32TAStatusValueOffset[i]);
5261 -                               psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psCCBKick->ahTAStatusSyncInfo[i];
5262 -
5263 -                               psSyncInfo->psSyncData->ui32ReadOpsComplete = *pui32TAStatusValue;
5264 -                       }
5265 -               }
5266 -       }
5267
5268 -       if (psCCBKick->bTerminate)
5269 +       if (psCCBKick->hTA3DSyncInfo)
5270         {
5271 -               if (psCCBKick->hUpdateDstKernelSyncInfo != IMG_NULL)
5272 +               psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psCCBKick->hTA3DSyncInfo;
5273 +
5274 +               if (psCCBKick->bTADependency)
5275                 {
5276 -                       psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psCCBKick->hUpdateDstKernelSyncInfo;
5277 -                       psSyncInfo->psSyncData->ui32WriteOpsComplete = ((pui32DstWriteOpsPendingVal != IMG_NULL) ? *pui32DstWriteOpsPendingVal : psCCBKick->ui32WriteOpsPendingVal) + 1;
5278 +                       psSyncInfo->psSyncData->ui32WriteOpsComplete = psSyncInfo->psSyncData->ui32WriteOpsPending;
5279                 }
5280 +       }
5281
5282 -               if (psCCBKick->ui32Num3DStatusVals != 0)
5283 -               {
5284 -
5285 -                       for (i = 0; i < psCCBKick->ui32Num3DStatusVals; i++)
5286 -                       {
5287 -                               if (CCB_OFFSET_IS_VALID(psCCBMemInfo, psCCBKick, aui323DStatusValueOffset[i]))
5288 -                               {
5289 -                                       IMG_UINT32 *pui323DStatusValue = CCB_DATA_FROM_OFFSET(IMG_UINT32, psCCBMemInfo, psCCBKick, aui323DStatusValueOffset[i]);
5290 -                                       psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psCCBKick->ah3DStatusSyncInfo[i];
5291 +       if (psCCBKick->hTASyncInfo != IMG_NULL)
5292 +       {
5293 +               psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psCCBKick->hTASyncInfo;
5294
5295 -                                       psSyncInfo->psSyncData->ui32ReadOpsComplete = *pui323DStatusValue;
5296 -                               }
5297 -                       }
5298 -               }
5299 +               psSyncInfo->psSyncData->ui32ReadOpsComplete =  psSyncInfo->psSyncData->ui32ReadOpsPending;
5300         }
5301 -#endif
5302
5303 -       return eError;
5304 -}
5305 +       if (psCCBKick->h3DSyncInfo != IMG_NULL)
5306 +       {
5307 +               psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psCCBKick->h3DSyncInfo;
5308
5309 +               psSyncInfo->psSyncData->ui32ReadOpsComplete =  psSyncInfo->psSyncData->ui32ReadOpsPending;
5310 +       }
5311
5312 -IMG_VOID SGXScheduleProcessQueues(PVRSRV_DEVICE_NODE *psDeviceNode)
5313 -{
5314 -       PVRSRV_ERROR                    eError;
5315 -       PVRSRV_SGXDEV_INFO              *psDevInfo = psDeviceNode->pvDevice;
5316 -       PVRSRV_SGX_HOST_CTL             *psHostCtl = psDevInfo->psKernelSGXHostCtlMemInfo->pvLinAddrKM;
5317 -       IMG_UINT32                              ui32PowManFlags;
5318 -       PVRSRV_SGX_COMMAND              sCommand = {0};
5319 +
5320 +       for (i = 0; i < psCCBKick->ui32NumTAStatusVals; i++)
5321 +       {
5322 +               psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psCCBKick->ahTAStatusSyncInfo[i];
5323
5324 -       ui32PowManFlags = psHostCtl->ui32PowManFlags;
5325 -       if ((ui32PowManFlags & PVRSRV_USSE_EDM_POWMAN_NO_WORK) != 0)
5326 +               psSyncInfo->psSyncData->ui32ReadOpsComplete = psTACmd->sCtlTAStatusInfo[i].ui32StatusValue;
5327 +       }
5328 +
5329 +
5330 +       for (i=0; i<psCCBKick->ui32NumSrcSyncs; i++)
5331         {
5332 -
5333 -               return;
5334 +               psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *) psCCBKick->ahSrcKernelSyncInfo[i];
5335 +
5336 +               psSyncInfo->psSyncData->ui32ReadOpsComplete =  psSyncInfo->psSyncData->ui32ReadOpsPending;
5337 +
5338         }
5339
5340 -       sCommand.ui32Data[0] = PVRSRV_CCBFLAGS_PROCESS_QUEUESCMD;
5341 -       eError = SGXScheduleCCBCommandKM(psDeviceNode, PVRSRV_SGX_COMMAND_EDM_KICK, &sCommand, ISR_ID);
5342 -       if (eError != PVRSRV_OK)
5343 +       if (psCCBKick->bTerminateOrAbort)
5344         {
5345 -               PVR_DPF((PVR_DBG_ERROR,"SGXScheduleProcessQueues failed to schedule CCB command: %lu", eError));
5346 +               if (psCCBKick->hRenderSurfSyncInfo != IMG_NULL)
5347 +               {
5348 +                       psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psCCBKick->hRenderSurfSyncInfo;
5349 +                       psSyncInfo->psSyncData->ui32WriteOpsComplete = psCCBKick->bFirstKickOrResume ? psSyncInfo->psSyncData->ui32WriteOpsPending : (psCCBKick->ui32WriteOpsPendingVal + 1);
5350 +               }
5351 +
5352 +
5353 +               for (i = 0; i < psCCBKick->ui32Num3DStatusVals; i++)
5354 +               {
5355 +                       psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psCCBKick->ah3DStatusSyncInfo[i];
5356 +
5357 +                       psSyncInfo->psSyncData->ui32ReadOpsComplete = psTACmd->sCtl3DStatusInfo[i].ui32StatusValue;
5358 +               }
5359         }
5360 +#endif
5361 +
5362 +       return eError;
5363  }
5364
5365 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgxreset.c git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgxreset.c
5366 --- git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgxreset.c  1970-01-01 01:00:00.000000000 +0100
5367 +++ git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgxreset.c  2008-12-18 15:47:29.000000000 +0100
5368 @@ -0,0 +1,330 @@
5369 +/**********************************************************************
5370 + *
5371 + * Copyright(c) 2008 Imagination Technologies Ltd. All rights reserved.
5372 + *
5373 + * This program is free software; you can redistribute it and/or modify it
5374 + * under the terms and conditions of the GNU General Public License,
5375 + * version 2, as published by the Free Software Foundation.
5376 + *
5377 + * This program is distributed in the hope it will be useful but, except
5378 + * as otherwise stated in writing, without any warranty; without even the
5379 + * implied warranty of merchantability or fitness for a particular purpose.
5380 + * See the GNU General Public License for more details.
5381 + *
5382 + * You should have received a copy of the GNU General Public License along with
5383 + * this program; if not, write to the Free Software Foundation, Inc.,
5384 + * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
5385 + *
5386 + * The full GNU General Public License is included in this distribution in
5387 + * the file called "COPYING".
5388 + *
5389 + * Contact Information:
5390 + * Imagination Technologies Ltd. <gpl-support@imgtec.com>
5391 + * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
5392 + *
5393 + ******************************************************************************/
5394 +
5395 +#include "sgxdefs.h"
5396 +#include "sgxmmu.h"
5397 +#include "services_headers.h"
5398 +#include "sgxinfokm.h"
5399 +#include "sgxconfig.h"
5400 +
5401 +#include "pdump_km.h"
5402 +
5403 +
5404 +#if defined(SGX_FEATURE_MULTIPLE_MEM_CONTEXTS)
5405 +#define SGX_BIF_DIR_LIST_INDEX_EDM     15
5406 +#define SGX_BIF_DIR_LIST_REG_EDM       EUR_CR_BIF_DIR_LIST_BASE15
5407 +#else
5408 +#define SGX_BIF_DIR_LIST_REG_EDM       EUR_CR_BIF_DIR_LIST_BASE0
5409 +#endif
5410 +
5411 +
5412 +static IMG_VOID SGXResetSoftReset(PVRSRV_SGXDEV_INFO   *psDevInfo,
5413 +                                                                 IMG_BOOL                              bResetBIF,
5414 +                                                                 IMG_UINT32                    ui32PDUMPFlags,
5415 +                                                                 IMG_BOOL                              bPDump)
5416 +{
5417 +       IMG_UINT32 ui32SoftResetRegVal =
5418 +                                       #ifdef EUR_CR_SOFT_RESET_TWOD_RESET_MASK
5419 +                                       EUR_CR_SOFT_RESET_TWOD_RESET_MASK       |
5420 +                                       #endif
5421 +                                       EUR_CR_SOFT_RESET_DPM_RESET_MASK        |
5422 +                                       EUR_CR_SOFT_RESET_TA_RESET_MASK         |
5423 +                                       EUR_CR_SOFT_RESET_USE_RESET_MASK        |
5424 +                                       EUR_CR_SOFT_RESET_ISP_RESET_MASK        |
5425 +                                       EUR_CR_SOFT_RESET_TSP_RESET_MASK;
5426 +
5427 +#if !defined(PDUMP)
5428 +       PVR_UNREFERENCED_PARAMETER(ui32PDUMPFlags);
5429 +#endif
5430 +
5431 +       if (bResetBIF)
5432 +       {
5433 +               ui32SoftResetRegVal |= EUR_CR_SOFT_RESET_BIF_RESET_MASK;
5434 +       }
5435 +
5436 +       OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_SOFT_RESET, ui32SoftResetRegVal);
5437 +       if (bPDump)
5438 +       {
5439 +               PDUMPREGWITHFLAGS(EUR_CR_SOFT_RESET, ui32SoftResetRegVal, ui32PDUMPFlags);
5440 +       }
5441 +}
5442 +
5443 +
5444 +static IMG_VOID SGXResetSleep(PVRSRV_SGXDEV_INFO       *psDevInfo,
5445 +                                                         IMG_UINT32                    ui32PDUMPFlags,
5446 +                                                         IMG_BOOL                              bPDump)
5447 +{
5448 +#if !defined(PDUMP)
5449 +       PVR_UNREFERENCED_PARAMETER(ui32PDUMPFlags);
5450 +#endif
5451 +
5452 +
5453 +       OSWaitus(1000 * 1000000 / psDevInfo->ui32CoreClockSpeed);
5454 +       if (bPDump)
5455 +       {
5456 +               PDUMPIDLWITHFLAGS(30, ui32PDUMPFlags);
5457 +#if defined(PDUMP)
5458 +               PDumpRegRead(EUR_CR_SOFT_RESET, ui32PDUMPFlags);
5459 +#endif
5460 +       }
5461 +
5462 +
5463 +
5464 +}
5465 +
5466 +
5467 +static IMG_VOID SGXResetInvalDC(PVRSRV_SGXDEV_INFO     *psDevInfo,
5468 +                                                           IMG_UINT32                  ui32PDUMPFlags,
5469 +                                                               IMG_BOOL                        bPDump)
5470 +{
5471 +       IMG_UINT32 ui32RegVal;
5472 +
5473 +
5474 +       ui32RegVal = EUR_CR_BIF_CTRL_INVALDC_MASK;
5475 +       OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_CTRL, ui32RegVal);
5476 +       if (bPDump)
5477 +       {
5478 +               PDUMPREGWITHFLAGS(EUR_CR_BIF_CTRL, ui32RegVal, ui32PDUMPFlags);
5479 +       }
5480 +       SGXResetSleep(psDevInfo, ui32PDUMPFlags, bPDump);
5481 +
5482 +       ui32RegVal = 0;
5483 +       OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_CTRL, ui32RegVal);
5484 +       if (bPDump)
5485 +       {
5486 +               PDUMPREGWITHFLAGS(EUR_CR_BIF_CTRL, ui32RegVal, ui32PDUMPFlags);
5487 +       }
5488 +       SGXResetSleep(psDevInfo, ui32PDUMPFlags, bPDump);
5489 +
5490 +#if !defined(SGX_FEATURE_MULTIPLE_MEM_CONTEXTS)
5491 +       {
5492 +
5493 +
5494 +
5495 +               if (PollForValueKM((IMG_UINT32 *)((IMG_UINT8*)psDevInfo->pvRegsBaseKM + EUR_CR_BIF_MEM_REQ_STAT),
5496 +                                                       0,
5497 +                                                       EUR_CR_BIF_MEM_REQ_STAT_READS_MASK,
5498 +                                                       MAX_HW_TIME_US/WAIT_TRY_COUNT,
5499 +                                                       WAIT_TRY_COUNT) != PVRSRV_OK)
5500 +               {
5501 +                       PVR_DPF((PVR_DBG_ERROR,"Wait for DC invalidate failed."));
5502 +               }
5503 +
5504 +               if (bPDump)
5505 +               {
5506 +                       PDUMPREGPOLWITHFLAGS(EUR_CR_BIF_MEM_REQ_STAT, 0, EUR_CR_BIF_MEM_REQ_STAT_READS_MASK, ui32PDUMPFlags);
5507 +               }
5508 +       }
5509 +#endif
5510 +}
5511 +
5512 +
5513 +IMG_VOID SGXReset(PVRSRV_SGXDEV_INFO   *psDevInfo,
5514 +                                 IMG_UINT32                     ui32PDUMPFlags)
5515 +{
5516 +       IMG_UINT32 ui32RegVal;
5517 +
5518 +       const IMG_UINT32 ui32BifFaultMask =
5519 +                                               EUR_CR_BIF_INT_STAT_FAULT_MASK;
5520 +
5521 +#if defined(SGX_FEATURE_MULTIPLE_MEM_CONTEXTS)
5522 +       IMG_UINT32                      ui32BIFCtrl;
5523 +#if defined(EUR_CR_BIF_MEM_ARB_CONFIG)
5524 +       IMG_UINT32                      ui32BIFMemArb;
5525 +#endif
5526 +#endif
5527 +
5528 +#ifndef PDUMP
5529 +       PVR_UNREFERENCED_PARAMETER(ui32PDUMPFlags);
5530 +#endif
5531 +
5532 +       psDevInfo->ui32NumResets++;
5533 +
5534 +       PDUMPCOMMENTWITHFLAGS(ui32PDUMPFlags, "Start of SGX reset sequence\r\n");
5535 +
5536 +#if defined(FIX_HW_BRN_23944)
5537 +
5538 +       ui32RegVal = EUR_CR_BIF_CTRL_PAUSE_MASK;
5539 +       OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_CTRL, ui32RegVal);
5540 +       PDUMPREGWITHFLAGS(EUR_CR_BIF_CTRL, ui32RegVal, ui32PDUMPFlags);
5541 +
5542 +       SGXResetSleep(psDevInfo, ui32PDUMPFlags, IMG_TRUE);
5543 +
5544 +       ui32RegVal = OSReadHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_INT_STAT);
5545 +       if (ui32RegVal & ui32BifFaultMask)
5546 +       {
5547 +
5548 +               ui32RegVal = EUR_CR_BIF_CTRL_PAUSE_MASK | EUR_CR_BIF_CTRL_CLEAR_FAULT_MASK;
5549 +               OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_CTRL, ui32RegVal);
5550 +               PDUMPREGWITHFLAGS(EUR_CR_BIF_CTRL, ui32RegVal, ui32PDUMPFlags);
5551 +
5552 +               SGXResetSleep(psDevInfo, ui32PDUMPFlags, IMG_TRUE);
5553 +
5554 +               ui32RegVal = EUR_CR_BIF_CTRL_PAUSE_MASK;
5555 +               OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_CTRL, ui32RegVal);
5556 +               PDUMPREGWITHFLAGS(EUR_CR_BIF_CTRL, ui32RegVal, ui32PDUMPFlags);
5557 +
5558 +               SGXResetSleep(psDevInfo, ui32PDUMPFlags, IMG_TRUE);
5559 +       }
5560 +#endif
5561 +
5562 +
5563 +       SGXResetSoftReset(psDevInfo, IMG_TRUE, ui32PDUMPFlags, IMG_TRUE);
5564 +
5565 +       SGXResetSleep(psDevInfo, ui32PDUMPFlags, IMG_TRUE);
5566 +
5567 +
5568 +
5569 +#if defined(SGX_FEATURE_MULTIPLE_MEM_CONTEXTS)
5570 +       ui32RegVal = 0;
5571 +       OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_BANK_SET, ui32RegVal);
5572 +       PDUMPREGWITHFLAGS(EUR_CR_BIF_BANK_SET, ui32RegVal, ui32PDUMPFlags);
5573 +       OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_BANK0, ui32RegVal);
5574 +       PDUMPREGWITHFLAGS(EUR_CR_BIF_BANK0, ui32RegVal, ui32PDUMPFlags);
5575 +
5576 +#if defined(EUR_CR_BIF_MEM_ARB_CONFIG)
5577 +
5578 +
5579 +       ui32BIFMemArb   = (12UL << EUR_CR_BIF_MEM_ARB_CONFIG_PAGE_SIZE_SHIFT) |
5580 +                                         (7UL << EUR_CR_BIF_MEM_ARB_CONFIG_BEST_CNT_SHIFT) |
5581 +                                         (12UL << EUR_CR_BIF_MEM_ARB_CONFIG_TTE_THRESH_SHIFT);
5582 +       OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_MEM_ARB_CONFIG, ui32BIFMemArb);
5583 +       PDUMPREGWITHFLAGS(EUR_CR_BIF_MEM_ARB_CONFIG, ui32BIFMemArb, ui32PDUMPFlags);
5584 +#endif
5585 +#endif
5586 +
5587 +
5588 +
5589 +
5590 +
5591 +
5592 +
5593 +       ui32RegVal = psDevInfo->sBIFResetPDDevPAddr.uiAddr;
5594 +       OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_DIR_LIST_BASE0, ui32RegVal);
5595 +
5596 +       SGXResetSleep(psDevInfo, ui32PDUMPFlags, IMG_FALSE);
5597 +
5598 +
5599 +       SGXResetSoftReset(psDevInfo, IMG_FALSE, ui32PDUMPFlags, IMG_TRUE);
5600 +       SGXResetSleep(psDevInfo, ui32PDUMPFlags, IMG_FALSE);
5601 +
5602 +       SGXResetInvalDC(psDevInfo, ui32PDUMPFlags, IMG_FALSE);
5603 +
5604 +
5605 +
5606 +       for (;;)
5607 +       {
5608 +               IMG_UINT32 ui32BifIntStat = OSReadHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_INT_STAT);
5609 +               IMG_DEV_VIRTADDR sBifFault;
5610 +               IMG_UINT32 ui32PDIndex, ui32PTIndex;
5611 +
5612 +               if ((ui32BifIntStat & ui32BifFaultMask) == 0)
5613 +               {
5614 +                       break;
5615 +               }
5616 +
5617 +
5618 +
5619 +
5620 +               sBifFault.uiAddr = OSReadHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_FAULT);
5621 +               PVR_DPF((PVR_DBG_WARNING, "SGXReset: Page fault 0x%x/0x%x", ui32BifIntStat, sBifFault.uiAddr));
5622 +               ui32PDIndex = sBifFault.uiAddr >> (SGX_MMU_PAGE_SHIFT + SGX_MMU_PT_SHIFT);
5623 +               ui32PTIndex = (sBifFault.uiAddr & SGX_MMU_PT_MASK) >> SGX_MMU_PAGE_SHIFT;
5624 +
5625 +
5626 +               SGXResetSoftReset(psDevInfo, IMG_TRUE, ui32PDUMPFlags, IMG_FALSE);
5627 +
5628 +
5629 +               psDevInfo->pui32BIFResetPD[ui32PDIndex] = psDevInfo->sBIFResetPTDevPAddr.uiAddr | SGX_MMU_PDE_VALID;
5630 +               psDevInfo->pui32BIFResetPT[ui32PTIndex] = psDevInfo->sBIFResetPageDevPAddr.uiAddr | SGX_MMU_PTE_VALID;
5631 +
5632 +
5633 +               ui32RegVal = OSReadHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_EVENT_STATUS);
5634 +               OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_EVENT_HOST_CLEAR, ui32RegVal);
5635 +               ui32RegVal = OSReadHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_EVENT_STATUS2);
5636 +               OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_EVENT_HOST_CLEAR2, ui32RegVal);
5637 +
5638 +               SGXResetSleep(psDevInfo, ui32PDUMPFlags, IMG_FALSE);
5639 +
5640 +
5641 +               SGXResetSoftReset(psDevInfo, IMG_FALSE, ui32PDUMPFlags, IMG_FALSE);
5642 +               SGXResetSleep(psDevInfo, ui32PDUMPFlags, IMG_FALSE);
5643 +
5644 +
5645 +               SGXResetInvalDC(psDevInfo, ui32PDUMPFlags, IMG_FALSE);
5646 +
5647 +
5648 +               psDevInfo->pui32BIFResetPD[ui32PDIndex] = 0;
5649 +               psDevInfo->pui32BIFResetPT[ui32PTIndex] = 0;
5650 +       }
5651 +
5652 +
5653 +
5654 +
5655 +#if defined(SGX_FEATURE_MULTIPLE_MEM_CONTEXTS)
5656 +
5657 +       ui32BIFCtrl = (SGX_BIF_DIR_LIST_INDEX_EDM << EUR_CR_BIF_BANK0_INDEX_EDM_SHIFT);
5658 +#ifdef SGX_FEATURE_2D_HARDWARE
5659 +
5660 +       ui32BIFCtrl |= (SGX_BIF_DIR_LIST_INDEX_EDM << EUR_CR_BIF_BANK0_INDEX_2D_SHIFT);
5661 +#endif
5662 +#if defined(FIX_HW_BRN_23410)
5663 +
5664 +       ui32BIFCtrl |= (SGX_BIF_DIR_LIST_INDEX_EDM << EUR_CR_BIF_BANK0_INDEX_TA_SHIFT);
5665 +#endif
5666 +
5667 +       OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_BANK0, ui32BIFCtrl);
5668 +       PDUMPREGWITHFLAGS(EUR_CR_BIF_BANK0, ui32BIFCtrl, ui32PDUMPFlags);
5669 +#endif
5670 +
5671 +
5672 +       OSWriteHWReg(psDevInfo->pvRegsBaseKM, SGX_BIF_DIR_LIST_REG_EDM, psDevInfo->sKernelPDDevPAddr.uiAddr);
5673 +       PDUMPPDREGWITHFLAGS(SGX_BIF_DIR_LIST_REG_EDM, psDevInfo->sKernelPDDevPAddr.uiAddr, ui32PDUMPFlags, PDUMP_PD_UNIQUETAG);
5674 +
5675 +#ifdef SGX_FEATURE_2D_HARDWARE
5676 +
5677 +       OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_BIF_TWOD_REQ_BASE, SGX_2D_HEAP_BASE);
5678 +       PDUMPREGWITHFLAGS(EUR_CR_BIF_TWOD_REQ_BASE, SGX_2D_HEAP_BASE, ui32PDUMPFlags);
5679 +#endif
5680 +
5681 +
5682 +       SGXResetInvalDC(psDevInfo, ui32PDUMPFlags, IMG_TRUE);
5683 +
5684 +       PVR_DPF((PVR_DBG_WARNING,"Soft Reset of SGX"));
5685 +       SGXResetSleep(psDevInfo, ui32PDUMPFlags, IMG_TRUE);
5686 +
5687 +
5688 +       ui32RegVal = 0;
5689 +       OSWriteHWReg(psDevInfo->pvRegsBaseKM, EUR_CR_SOFT_RESET, ui32RegVal);
5690 +       PDUMPREGWITHFLAGS(EUR_CR_SOFT_RESET, ui32RegVal, ui32PDUMPFlags);
5691 +
5692 +
5693 +       SGXResetSleep(psDevInfo, ui32PDUMPFlags, IMG_TRUE);
5694 +
5695 +       PDUMPCOMMENTWITHFLAGS(ui32PDUMPFlags, "End of SGX reset sequence\r\n");
5696 +}
5697 +
5698 +
5699 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgxtransfer.c git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgxtransfer.c
5700 --- git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgxtransfer.c       2009-01-05 20:00:44.000000000 +0100
5701 +++ git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgxtransfer.c       2008-12-18 15:47:29.000000000 +0100
5702 @@ -43,16 +43,314 @@
5703  #include "pvr_debug.h"
5704  #include "sgxutils.h"
5705
5706 -IMG_EXPORT PVRSRV_ERROR SGXSubmitTransferKM(IMG_HANDLE hDevHandle,
5707 -                                                                                       IMG_DEV_VIRTADDR sHWRenderContextDevVAddr)
5708 -
5709 +#define CCB_OFFSET_IS_VALID(type, psCCBMemInfo, psKick, offset) \
5710 +       ((psKick)->offset + sizeof(type) < (psCCBMemInfo)->ui32AllocSize)
5711 +
5712 +#define CCB_DATA_FROM_OFFSET(type, psCCBMemInfo, psKick, offset) \
5713 +       ((type *)(((char *)(psCCBMemInfo)->pvLinAddrKM) + \
5714 +       (psKick)->offset))
5715 +
5716 +IMG_EXPORT PVRSRV_ERROR SGXSubmitTransferKM(IMG_HANDLE hDevHandle, PVRSRV_TRANSFER_SGX_KICK *psKick)
5717  {
5718 +       PVRSRV_KERNEL_MEM_INFO  *psCCBMemInfo = (PVRSRV_KERNEL_MEM_INFO *)psKick->hCCBMemInfo;
5719         PVRSRV_SGX_COMMAND sCommand = {0};
5720 +       PVR3DIF4_TRANSFERCMD_SHARED *psTransferCmd;
5721 +       PVRSRV_KERNEL_SYNC_INFO *psSyncInfo;
5722 +       IMG_UINT32 i;
5723 +       PVRSRV_ERROR eError;
5724 +
5725 +       if (!CCB_OFFSET_IS_VALID(PVR3DIF4_TRANSFERCMD_SHARED, psCCBMemInfo, psKick, ui32SharedCmdCCBOffset))
5726 +       {
5727 +               return PVRSRV_ERROR_INVALID_PARAMS;
5728 +       }
5729 +       psTransferCmd =  CCB_DATA_FROM_OFFSET(PVR3DIF4_TRANSFERCMD_SHARED, psCCBMemInfo, psKick, ui32SharedCmdCCBOffset);
5730 +
5731 +       if (psTransferCmd->ui32NumStatusVals > SGXTQ_MAX_STATUS)
5732 +       {
5733 +               return PVRSRV_ERROR_INVALID_PARAMS;
5734 +       }
5735 +
5736 +       if (psKick->ui32StatusFirstSync +
5737 +               (psKick->ui32NumSrcSync ? (psKick->ui32NumSrcSync - 1) : 0) +
5738 +               (psKick->ui32NumDstSync ? (psKick->ui32NumDstSync - 1) : 0) >
5739 +                       psTransferCmd->ui32NumStatusVals)
5740 +       {
5741 +               return PVRSRV_ERROR_INVALID_PARAMS;
5742 +       }
5743 +
5744 +       if (psKick->hTASyncInfo != IMG_NULL)
5745 +       {
5746 +               psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psKick->hTASyncInfo;
5747 +
5748 +               psTransferCmd->ui32TASyncWriteOpsPendingVal = psSyncInfo->psSyncData->ui32WriteOpsPending++;
5749 +               psTransferCmd->ui32TASyncReadOpsPendingVal  = psSyncInfo->psSyncData->ui32ReadOpsPending;
5750 +
5751 +               psTransferCmd->sTASyncWriteOpsCompleteDevVAddr = psSyncInfo->sWriteOpsCompleteDevVAddr;
5752 +               psTransferCmd->sTASyncReadOpsCompleteDevVAddr = psSyncInfo->sReadOpsCompleteDevVAddr;
5753 +       }
5754 +       else
5755 +       {
5756 +               psTransferCmd->sTASyncWriteOpsCompleteDevVAddr.uiAddr = 0;
5757 +               psTransferCmd->sTASyncReadOpsCompleteDevVAddr.uiAddr = 0;
5758 +       }
5759 +
5760 +       if (psKick->h3DSyncInfo != IMG_NULL)
5761 +       {
5762 +               psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psKick->h3DSyncInfo;
5763 +
5764 +               psTransferCmd->ui323DSyncWriteOpsPendingVal = psSyncInfo->psSyncData->ui32WriteOpsPending++;
5765 +               psTransferCmd->ui323DSyncReadOpsPendingVal = psSyncInfo->psSyncData->ui32ReadOpsPending;
5766 +
5767 +               psTransferCmd->s3DSyncWriteOpsCompleteDevVAddr = psSyncInfo->sWriteOpsCompleteDevVAddr;
5768 +               psTransferCmd->s3DSyncReadOpsCompleteDevVAddr = psSyncInfo->sReadOpsCompleteDevVAddr;
5769 +       }
5770 +       else
5771 +       {
5772 +               psTransferCmd->s3DSyncWriteOpsCompleteDevVAddr.uiAddr = 0;
5773 +               psTransferCmd->s3DSyncReadOpsCompleteDevVAddr.uiAddr = 0;
5774 +       }
5775
5776 -    sCommand.ui32Data[0] = PVRSRV_CCBFLAGS_TRANSFERCMD;
5777 -    sCommand.ui32Data[1] = sHWRenderContextDevVAddr.uiAddr;
5778
5779 -       return SGXScheduleCCBCommandKM(hDevHandle, PVRSRV_SGX_COMMAND_EDM_KICK, &sCommand, KERNEL_ID);
5780 +       psTransferCmd->ui32NumSrcSync = psKick->ui32NumSrcSync;
5781 +       psTransferCmd->ui32NumDstSync = psKick->ui32NumDstSync;
5782 +
5783 +
5784 +       if(psKick->ui32NumSrcSync > 0)
5785 +       {
5786 +               psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psKick->ahSrcSyncInfo[0];
5787 +
5788 +               psTransferCmd->ui32SrcWriteOpPendingVal = psSyncInfo->psSyncData->ui32WriteOpsPending;
5789 +               psTransferCmd->ui32SrcReadOpPendingVal = psSyncInfo->psSyncData->ui32ReadOpsPending;
5790 +
5791 +               psTransferCmd->sSrcWriteOpsCompleteDevAddr = psSyncInfo->sWriteOpsCompleteDevVAddr;
5792 +               psTransferCmd->sSrcReadOpsCompleteDevAddr = psSyncInfo->sReadOpsCompleteDevVAddr;
5793 +       }
5794 +       if(psKick->ui32NumDstSync > 0)
5795 +       {
5796 +               psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psKick->ahDstSyncInfo[0];
5797 +
5798 +               psTransferCmd->ui32DstWriteOpPendingVal = psSyncInfo->psSyncData->ui32WriteOpsPending;
5799 +               psTransferCmd->ui32DstReadOpPendingVal = psSyncInfo->psSyncData->ui32ReadOpsPending;
5800 +
5801 +               psTransferCmd->sDstWriteOpsCompleteDevAddr = psSyncInfo->sWriteOpsCompleteDevVAddr;
5802 +               psTransferCmd->sDstReadOpsCompleteDevAddr = psSyncInfo->sReadOpsCompleteDevVAddr;
5803 +       }
5804 +
5805 +
5806 +       if (psKick->ui32NumSrcSync > 0)
5807 +       {
5808 +               psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psKick->ahSrcSyncInfo[0];
5809 +               psSyncInfo->psSyncData->ui32ReadOpsPending++;
5810 +
5811 +       }
5812 +       if (psKick->ui32NumDstSync > 0)
5813 +       {
5814 +               psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psKick->ahDstSyncInfo[0];
5815 +               psSyncInfo->psSyncData->ui32WriteOpsPending++;
5816 +       }
5817 +
5818 +
5819 +       if (psKick->ui32NumSrcSync > 1)
5820 +       {
5821 +               for(i = 1; i < psKick->ui32NumSrcSync; i++)
5822 +               {
5823 +                       psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psKick->ahSrcSyncInfo[i];
5824 +
5825 +                       psTransferCmd->sCtlStatusInfo[psKick->ui32StatusFirstSync].ui32StatusValue = psSyncInfo->psSyncData->ui32ReadOpsPending++;
5826 +
5827 +                       psTransferCmd->sCtlStatusInfo[psKick->ui32StatusFirstSync].sStatusDevAddr = psSyncInfo->sReadOpsCompleteDevVAddr;
5828 +
5829 +                       psKick->ui32StatusFirstSync++;
5830 +               }
5831 +       }
5832 +
5833 +       if (psKick->ui32NumDstSync > 1)
5834 +       {
5835 +               for(i = 1; i < psKick->ui32NumDstSync; i++)
5836 +               {
5837 +                       psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psKick->ahDstSyncInfo[i];
5838 +
5839 +                       psTransferCmd->sCtlStatusInfo[psKick->ui32StatusFirstSync].ui32StatusValue = psSyncInfo->psSyncData->ui32WriteOpsPending++;
5840 +
5841 +                       psTransferCmd->sCtlStatusInfo[psKick->ui32StatusFirstSync].sStatusDevAddr = psSyncInfo->sWriteOpsCompleteDevVAddr;
5842 +
5843 +                       psKick->ui32StatusFirstSync++;
5844 +               }
5845 +       }
5846 +
5847 +#if defined(PDUMP)
5848 +       PDUMPCOMMENT("Shared part of transfer command\r\n");
5849 +       PDUMPMEM(IMG_NULL,
5850 +                       psCCBMemInfo,
5851 +                       psKick->ui32SharedCmdCCBOffset,
5852 +                       sizeof(PVR3DIF4_TRANSFERCMD_SHARED),
5853 +                       0,
5854 +                       MAKEUNIQUETAG(psCCBMemInfo));
5855 +#endif
5856 +
5857 +       sCommand.ui32Data[0] = PVRSRV_CCBFLAGS_TRANSFERCMD;
5858 +       sCommand.ui32Data[1] = psKick->sHWTransferContextDevVAddr.uiAddr;
5859 +
5860 +       eError = SGXScheduleCCBCommandKM(hDevHandle, PVRSRV_SGX_COMMAND_EDM_KICK, &sCommand, KERNEL_ID);
5861 +
5862 +#if defined(NO_HARDWARE)
5863 +
5864 +       for(i = 0; i < psKick->ui32NumSrcSync; i++)
5865 +       {
5866 +               psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psKick->ahSrcSyncInfo[i];
5867 +               psSyncInfo->psSyncData->ui32ReadOpsComplete = psSyncInfo->psSyncData->ui32ReadOpsPending;
5868 +       }
5869 +
5870 +       for(i = 0; i < psKick->ui32NumDstSync; i++)
5871 +       {
5872 +               psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psKick->ahDstSyncInfo[i];
5873 +               psSyncInfo->psSyncData->ui32WriteOpsComplete = psSyncInfo->psSyncData->ui32WriteOpsPending;
5874 +
5875 +       }
5876 +
5877 +       if (psKick->hTASyncInfo != IMG_NULL)
5878 +       {
5879 +               psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psKick->hTASyncInfo;
5880 +
5881 +               psSyncInfo->psSyncData->ui32WriteOpsComplete = psSyncInfo->psSyncData->ui32WriteOpsPending;
5882 +       }
5883 +
5884 +       if (psKick->h3DSyncInfo != IMG_NULL)
5885 +       {
5886 +               psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psKick->h3DSyncInfo;
5887 +
5888 +               psSyncInfo->psSyncData->ui32WriteOpsComplete = psSyncInfo->psSyncData->ui32WriteOpsPending;
5889 +       }
5890 +#endif
5891 +
5892 +       return eError;
5893  }
5894
5895 -#endif
5896 +#if defined(SGX_FEATURE_2D_HARDWARE)
5897 +IMG_EXPORT PVRSRV_ERROR SGXSubmit2DKM(IMG_HANDLE hDevHandle, PVRSRV_2D_SGX_KICK *psKick)
5898 +
5899 +{
5900 +       PVRSRV_KERNEL_MEM_INFO  *psCCBMemInfo = (PVRSRV_KERNEL_MEM_INFO *)psKick->hCCBMemInfo;
5901 +       PVRSRV_SGX_COMMAND sCommand = {0};
5902 +       PVR3DIF4_2DCMD_SHARED *ps2DCmd;
5903 +       PVRSRV_KERNEL_SYNC_INFO *psSyncInfo;
5904 +       IMG_BOOL bDstSyncDone = IMG_FALSE;
5905 +       PVRSRV_ERROR eError;
5906 +       IMG_UINT32 i;
5907 +
5908 +       if (!CCB_OFFSET_IS_VALID(PVR3DIF4_2DCMD_SHARED, psCCBMemInfo, psKick, ui32SharedCmdCCBOffset))
5909 +       {
5910 +               return PVRSRV_ERROR_INVALID_PARAMS;
5911 +       }
5912 +       ps2DCmd =  CCB_DATA_FROM_OFFSET(PVR3DIF4_2DCMD_SHARED, psCCBMemInfo, psKick, ui32SharedCmdCCBOffset);
5913 +
5914 +       OSMemSet(ps2DCmd, 0, sizeof(*ps2DCmd));
5915 +
5916 +
5917 +       if (psKick->hTASyncInfo != IMG_NULL)
5918 +       {
5919 +               psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psKick->hTASyncInfo;
5920 +
5921 +               ps2DCmd->sTASyncData.ui32WriteOpPendingVal = psSyncInfo->psSyncData->ui32WriteOpsPending++;
5922 +               ps2DCmd->sTASyncData.ui32ReadOpPendingVal = psSyncInfo->psSyncData->ui32ReadOpsPending;
5923 +
5924 +               ps2DCmd->sTASyncData.sWriteOpsCompleteDevVAddr  = psSyncInfo->sWriteOpsCompleteDevVAddr;
5925 +               ps2DCmd->sTASyncData.sReadOpsCompleteDevVAddr   = psSyncInfo->sReadOpsCompleteDevVAddr;
5926 +       }
5927 +
5928 +
5929 +       if (psKick->h3DSyncInfo != IMG_NULL)
5930 +       {
5931 +               psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psKick->h3DSyncInfo;
5932 +
5933 +               ps2DCmd->s3DSyncData.ui32WriteOpPendingVal = psSyncInfo->psSyncData->ui32WriteOpsPending++;
5934 +               ps2DCmd->s3DSyncData.ui32ReadOpPendingVal = psSyncInfo->psSyncData->ui32ReadOpsPending;
5935 +
5936 +               ps2DCmd->s3DSyncData.sWriteOpsCompleteDevVAddr = psSyncInfo->sWriteOpsCompleteDevVAddr;
5937 +               ps2DCmd->s3DSyncData.sReadOpsCompleteDevVAddr = psSyncInfo->sReadOpsCompleteDevVAddr;
5938 +       }
5939 +
5940 +       ps2DCmd->ui32NumSrcSync = psKick->ui32NumSrcSync;
5941 +       for (i = 0; i < psKick->ui32NumSrcSync; i++)
5942 +       {
5943 +               psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psKick->ahSrcSyncInfo[i];
5944 +               if (psSyncInfo == (PVRSRV_KERNEL_SYNC_INFO *)psKick->hDstSyncInfo)
5945 +               {
5946 +                       ps2DCmd->sSrcSyncData[i].ui32WriteOpPendingVal = psSyncInfo->psSyncData->ui32WriteOpsPending;
5947 +                       ps2DCmd->sSrcSyncData[i].ui32ReadOpPendingVal = psSyncInfo->psSyncData->ui32ReadOpsPending;
5948 +
5949 +                       ps2DCmd->sDstSyncData.ui32WriteOpPendingVal = psSyncInfo->psSyncData->ui32WriteOpsPending++;
5950 +                       ps2DCmd->sDstSyncData.ui32ReadOpPendingVal = psSyncInfo->psSyncData->ui32ReadOpsPending++;
5951 +
5952 +                       bDstSyncDone = IMG_TRUE;
5953 +               }
5954 +               else
5955 +               {
5956 +                       ps2DCmd->sSrcSyncData[i].ui32WriteOpPendingVal = psSyncInfo->psSyncData->ui32WriteOpsPending;
5957 +                       ps2DCmd->sSrcSyncData[i].ui32ReadOpPendingVal = psSyncInfo->psSyncData->ui32ReadOpsPending++;
5958 +               }
5959 +
5960 +               ps2DCmd->sSrcSyncData[i].sWriteOpsCompleteDevVAddr = psSyncInfo->sWriteOpsCompleteDevVAddr;
5961 +               ps2DCmd->sSrcSyncData[i].sReadOpsCompleteDevVAddr = psSyncInfo->sReadOpsCompleteDevVAddr;
5962 +       }
5963 +
5964 +       if (psKick->hDstSyncInfo != IMG_NULL)
5965 +       {
5966 +               psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psKick->hDstSyncInfo;
5967 +
5968 +               if (!bDstSyncDone)
5969 +               {
5970 +                       ps2DCmd->sDstSyncData.ui32WriteOpPendingVal = psSyncInfo->psSyncData->ui32WriteOpsPending++;
5971 +                       ps2DCmd->sDstSyncData.ui32ReadOpPendingVal = psSyncInfo->psSyncData->ui32ReadOpsPending;
5972 +               }
5973 +
5974 +               ps2DCmd->sDstSyncData.sWriteOpsCompleteDevVAddr = psSyncInfo->sWriteOpsCompleteDevVAddr;
5975 +               ps2DCmd->sDstSyncData.sReadOpsCompleteDevVAddr = psSyncInfo->sReadOpsCompleteDevVAddr;
5976 +       }
5977 +
5978 +#if defined(PDUMP)
5979 +
5980 +       PDUMPCOMMENT("Shared part of 2D command\r\n");
5981 +       PDUMPMEM(IMG_NULL,
5982 +                       psCCBMemInfo,
5983 +                       psKick->ui32SharedCmdCCBOffset,
5984 +                       sizeof(PVR3DIF4_2DCMD_SHARED),
5985 +                       0,
5986 +                       MAKEUNIQUETAG(psCCBMemInfo));
5987 +#endif
5988 +
5989 +       sCommand.ui32Data[0] = PVRSRV_CCBFLAGS_2DCMD;
5990 +       sCommand.ui32Data[1] = psKick->sHW2DContextDevVAddr.uiAddr;
5991 +
5992 +       eError = SGXScheduleCCBCommandKM(hDevHandle, PVRSRV_SGX_COMMAND_EDM_KICK, &sCommand, KERNEL_ID);
5993 +
5994 +#if defined(NO_HARDWARE)
5995 +
5996 +       for(i = 0; i < psKick->ui32NumSrcSync; i++)
5997 +       {
5998 +               psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psKick->ahSrcSyncInfo[i];
5999 +               psSyncInfo->psSyncData->ui32ReadOpsComplete = psSyncInfo->psSyncData->ui32ReadOpsPending;
6000 +       }
6001 +
6002 +       psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psKick->hDstSyncInfo;
6003 +       psSyncInfo->psSyncData->ui32WriteOpsComplete = psSyncInfo->psSyncData->ui32WriteOpsPending;
6004 +
6005 +       if (psKick->hTASyncInfo != IMG_NULL)
6006 +       {
6007 +               psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psKick->hTASyncInfo;
6008 +
6009 +               psSyncInfo->psSyncData->ui32WriteOpsComplete = psSyncInfo->psSyncData->ui32WriteOpsPending;
6010 +       }
6011 +
6012 +       if (psKick->h3DSyncInfo != IMG_NULL)
6013 +       {
6014 +               psSyncInfo = (PVRSRV_KERNEL_SYNC_INFO *)psKick->h3DSyncInfo;
6015 +
6016 +               psSyncInfo->psSyncData->ui32WriteOpsComplete = psSyncInfo->psSyncData->ui32WriteOpsPending;
6017 +       }
6018 +#endif
6019 +
6020 +       return eError;
6021 +}
6022 +#endif
6023 +#endif
6024 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgxutils.c git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgxutils.c
6025 --- git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgxutils.c  2009-01-05 20:00:44.000000000 +0100
6026 +++ git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgxutils.c  2008-12-18 15:47:29.000000000 +0100
6027 @@ -46,6 +46,79 @@
6028  #include <stdio.h>
6029  #endif
6030
6031 +#if defined(SYS_CUSTOM_POWERDOWN)
6032 +PVRSRV_ERROR SysPowerDownMISR(IMG_UINT32 ui32DeviceIndex, IMG_UINT32 ui32CallerID);
6033 +#endif
6034 +
6035 +
6036 +#if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT)
6037 +IMG_VOID SGXTestActivePowerEvent (PVRSRV_DEVICE_NODE   *psDeviceNode,
6038 +                                                                 IMG_UINT32                    ui32CallerID)
6039 +{
6040 +       PVRSRV_ERROR            eError = PVRSRV_OK;
6041 +       PVRSRV_SGXDEV_INFO      *psDevInfo = psDeviceNode->pvDevice;
6042 +       PVRSRV_SGX_HOST_CTL     *psSGXHostCtl = psDevInfo->psSGXHostCtl;
6043 +
6044 +       if ((psSGXHostCtl->ui32InterruptFlags & PVRSRV_USSE_EDM_INTERRUPT_ACTIVE_POWER) &&
6045 +               !(psSGXHostCtl->ui32PowManFlags & PVRSRV_USSE_EDM_POWMAN_POWEROFF_REQUEST))
6046 +       {
6047 +
6048 +
6049 +               {
6050 +
6051 +                       PDUMPSUSPEND();
6052 +
6053 +#if defined(SYS_CUSTOM_POWERDOWN)
6054 +
6055 +
6056 +
6057 +                       eError = SysPowerDownMISR(psDeviceNode->sDevId.ui32DeviceIndex, ui32CallerID);
6058 +#else
6059 +                       eError = PVRSRVSetDevicePowerStateKM(psDeviceNode->sDevId.ui32DeviceIndex,
6060 +                                                                                                PVRSRV_POWER_STATE_D3,
6061 +                                                                                                ui32CallerID, IMG_FALSE);
6062 +                       if (eError == PVRSRV_OK)
6063 +                       {
6064 +
6065 +                               psSGXHostCtl->ui32NumActivePowerEvents++;
6066 +
6067 +                               if ((*(volatile IMG_UINT32 *)(&psSGXHostCtl->ui32PowManFlags)
6068 +                                       & PVRSRV_USSE_EDM_POWMAN_POWEROFF_RESTART_IMMEDIATE) != 0)
6069 +                               {
6070 +
6071 +
6072 +
6073 +                                       if (ui32CallerID == ISR_ID)
6074 +                                       {
6075 +                                               psDeviceNode->bReProcessDeviceCommandComplete = IMG_TRUE;
6076 +                                       }
6077 +                                       else
6078 +                                       {
6079 +                                               SGXScheduleProcessQueues(psDeviceNode);
6080 +                                       }
6081 +                               }
6082 +                       }
6083 +#endif
6084 +                       if (eError == PVRSRV_ERROR_RETRY)
6085 +                       {
6086 +
6087 +
6088 +                               eError = PVRSRV_OK;
6089 +                       }
6090 +
6091 +
6092 +                       PDUMPRESUME();
6093 +               }
6094 +       }
6095 +
6096 +       if (eError != PVRSRV_OK)
6097 +       {
6098 +               PVR_DPF((PVR_DBG_ERROR, "SGXTestActivePowerEvent error:%lu", eError));
6099 +       }
6100 +}
6101 +#endif
6102 +
6103 +
6104  #ifdef INLINE_IS_PRAGMA
6105  #pragma inline(SGXAcquireKernelCCBSlot)
6106  #endif
6107 @@ -255,147 +328,43 @@
6108  Exit:
6109         PVRSRVPowerUnlock(ui32CallerID);
6110
6111 -       return eError;
6112 -}
6113 -
6114 -
6115 -#if 0
6116 -PVRSRV_ERROR CreateCCB(PVRSRV_SGXDEV_INFO      *psSGXDevInfo,
6117 -                                          IMG_UINT32                   ui32CCBSize,
6118 -                                          IMG_UINT32                   ui32AllocGran,
6119 -                                          IMG_UINT32                   ui32OverrunSize,
6120 -                                          IMG_HANDLE                   hDevMemHeap,
6121 -                                          PVRSRV_SGX_CCB               **ppsCCB)
6122 -{
6123 -       PVRSRV_SGX_CCB  *psCCB;
6124 -
6125 -       PVR_UNREFERENCED_PARAMETER(psSGXDevInfo);
6126 -
6127 -       psCCB = IMG_NULL;
6128 -
6129 -       if (OSAllocMem(PVRSRV_OS_PAGEABLE_HEAP,
6130 -                                  sizeof(PVRSRV_SGX_CCB),
6131 -                                  (IMG_VOID **)&psCCB,
6132 -                                  IMG_NULL) != PVRSRV_OK)
6133 -       {
6134 -               PVR_DPF((PVR_DBG_ERROR,"CreateCCB: psCCB alloc failed"));
6135 -
6136 -               return PVRSRV_ERROR_OUT_OF_MEMORY;
6137 -       }
6138 -
6139 -
6140 -       psCCB->psCCBMemInfo = IMG_NULL;
6141 -       psCCB->psCCBCtlMemInfo = IMG_NULL;
6142 -       psCCB->pui32CCBLinAddr = IMG_NULL;
6143 -       psCCB->pui32WriteOffset = IMG_NULL;
6144 -       psCCB->pui32ReadOffset = IMG_NULL;
6145 -
6146 -       #ifdef PDUMP
6147 -       psCCB->ui32CCBDumpWOff = 0;
6148 -       #endif
6149 -
6150 -
6151 -       if ( ui32CCBSize < 0x1000 )
6152 +#if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT)
6153 +       if (ui32CallerID != ISR_ID)
6154         {
6155 -               IMG_UINT32      i, ui32PowOfTwo;
6156 +
6157
6158 -               ui32PowOfTwo = 0x1000;
6159
6160 -               for (i = 12; i > 0; i--)
6161 -               {
6162 -                       if (ui32CCBSize & ui32PowOfTwo)
6163 -                       {
6164 -                               break;
6165 -                       }
6166 -
6167 -                       ui32PowOfTwo >>= 1;
6168 -               }
6169 -
6170 -               if (ui32CCBSize & (ui32PowOfTwo - 1))
6171 -               {
6172 -                       ui32PowOfTwo <<= 1;
6173 -               }
6174 -
6175 -               ui32AllocGran = ui32PowOfTwo;
6176 -       }
6177 -       else
6178 -       {
6179 -               ui32AllocGran = 0x1000;
6180 +               SGXTestActivePowerEvent(psDeviceNode, ui32CallerID);
6181         }
6182 +#endif
6183
6184 -
6185 -       if (PVRSRVAllocDeviceMemKM(IMG_NULL,
6186 -                                                          hDevMemHeap,
6187 -                                                          PVRSRV_MEM_READ | PVRSRV_MEM_WRITE | PVRSRV_MEM_EDM_PROTECT | PVRSRV_MEM_NO_SYNCOBJ,
6188 -                                                          ui32CCBSize + ui32OverrunSize,
6189 -                                                          ui32AllocGran,
6190 -                                                          &psCCB->psCCBMemInfo) != PVRSRV_OK)
6191 -       {
6192 -               PVR_DPF((PVR_DBG_ERROR,"CreateCCB: CCBMemInfo alloc failed"));
6193 -
6194 -               goto ErrorExit;
6195 -       }
6196 +       return eError;
6197 +}
6198
6199 -       psCCB->pui32CCBLinAddr = psCCB->psCCBMemInfo->pvLinAddrKM;
6200 -       psCCB->sCCBDevAddr = psCCB->psCCBMemInfo->sDevVAddr;
6201 -       psCCB->ui32Size = ui32CCBSize;
6202 -       psCCB->ui32AllocGran = ui32AllocGran;
6203 +IMG_VOID SGXScheduleProcessQueues(PVRSRV_DEVICE_NODE *psDeviceNode)
6204 +{
6205 +       PVRSRV_ERROR                    eError;
6206 +       PVRSRV_SGXDEV_INFO              *psDevInfo = psDeviceNode->pvDevice;
6207 +       PVRSRV_SGX_HOST_CTL             *psHostCtl = psDevInfo->psKernelSGXHostCtlMemInfo->pvLinAddrKM;
6208 +       IMG_UINT32                              ui32PowManFlags;
6209 +       PVRSRV_SGX_COMMAND              sCommand = {0};
6210
6211 -
6212 -       if (PVRSRVAllocDeviceMemKM(IMG_NULL,
6213 -                                                          hDevMemHeap,
6214 -                                                          PVRSRV_MEM_READ | PVRSRV_MEM_WRITE | PVRSRV_MEM_EDM_PROTECT | PVRSRV_MEM_NO_SYNCOBJ,
6215 -                                                          sizeof(PVRSRV_SGX_CCB_CTL),
6216 -                                                          32,
6217 -                                                          &psCCB->psCCBCtlMemInfo) != PVRSRV_OK)
6218 +       ui32PowManFlags = psHostCtl->ui32PowManFlags;
6219 +       if ((ui32PowManFlags & PVRSRV_USSE_EDM_POWMAN_NO_WORK) != 0)
6220         {
6221 -               PVR_DPF((PVR_DBG_ERROR,"CreateCCB: CCBCtlMemInfo alloc failed"));
6222 -
6223 -               goto ErrorExit;
6224 +
6225 +               return;
6226         }
6227
6228 -
6229 -       psCCB->pui32WriteOffset = &((PVRSRV_SGX_CCB_CTL *)psCCB->psCCBCtlMemInfo->pvLinAddrKM)->ui32WriteOffset;
6230 -       psCCB->pui32ReadOffset = &((PVRSRV_SGX_CCB_CTL *)psCCB->psCCBCtlMemInfo->pvLinAddrKM)->ui32ReadOffset;
6231 -
6232 -
6233 -       *psCCB->pui32WriteOffset = 0;
6234 -       *psCCB->pui32ReadOffset = 0;
6235 -
6236 -
6237 -       *ppsCCB = psCCB;
6238 -
6239 -       return PVRSRV_OK;
6240 -
6241 -ErrorExit:
6242 -
6243 -
6244 -       if (psCCB->psCCBMemInfo)
6245 +       sCommand.ui32Data[0] = PVRSRV_CCBFLAGS_PROCESS_QUEUESCMD;
6246 +       eError = SGXScheduleCCBCommandKM(psDeviceNode, PVRSRV_SGX_COMMAND_EDM_KICK, &sCommand, ISR_ID);
6247 +       if (eError != PVRSRV_OK)
6248         {
6249 -               PVRSRVFreeDeviceMemKM(IMG_NULL, psCCB->psCCBMemInfo, IMG_FALSE);
6250 +               PVR_DPF((PVR_DBG_ERROR,"SGXScheduleProcessQueues failed to schedule CCB command: %lu", eError));
6251         }
6252 -
6253 -       OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP, 0, psCCB, IMG_NULL);
6254 -
6255 -       return PVRSRV_ERROR_OUT_OF_MEMORY;
6256 -;
6257  }
6258
6259 -IMG_VOID DestroyCCB(PVRSRV_SGX_CCB *psCCB, IMG_UINT32 ui32PFlags)
6260 -{
6261 -       PVRSRVFreeDeviceMemKM(IMG_NULL, psCCB->psCCBMemInfo, IMG_FALSE);
6262 -
6263 -       PVRSRVFreeDeviceMemKM(IMG_NULL, psCCB->psCCBCtlMemInfo, IMG_FALSE);
6264
6265 -       if (!(ui32PFlags & PFLAGS_POWERDOWN))
6266 -       {
6267 -               if (psCCB)
6268 -               {
6269 -                       OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP, 0, psCCB, IMG_NULL);
6270 -               }
6271 -       }
6272 -}
6273 -#endif
6274  #if defined (PDUMP)
6275  IMG_VOID DumpBufferArray(PPVR3DIF4_KICKTA_DUMP_BUFFER  psBufferArray,
6276                                                  IMG_UINT32                                             ui32BufferArrayLength,
6277 @@ -513,18 +482,6 @@
6278         psSGXInternalDevInfo->bForcePTOff = (IMG_BOOL)psDevInfo->bForcePTOff;
6279         psSGXInternalDevInfo->ui32RegFlags = (IMG_BOOL)psDevInfo->ui32RegFlags;
6280
6281 -#if defined(SUPPORT_SGX_EVENT_OBJECT)
6282 -       if (psDevInfo->psSGXEventObject)
6283 -       {
6284 -               PVRSRV_EVENTOBJECT *psEventObject = psDevInfo->psSGXEventObject;
6285 -               psSGXInternalDevInfo->hOSEvent = psEventObject->hOSEventKM;
6286 -       }
6287 -       else
6288 -       {
6289 -               psSGXInternalDevInfo->hOSEvent = IMG_NULL;
6290 -       }
6291 -#endif
6292 -
6293
6294         psSGXInternalDevInfo->hCtlKernelMemInfoHandle =
6295                 (IMG_HANDLE)psDevInfo->psKernelSGXHostCtlMemInfo;
6296 @@ -532,11 +489,11 @@
6297         return PVRSRV_OK;
6298  }
6299
6300 -static IMG_VOID SGXCleanupRequest(PVRSRV_SGXDEV_INFO   *psSGXDevInfo,
6301 +static IMG_VOID SGXCleanupRequest(PVRSRV_DEVICE_NODE   *psDeviceNode,
6302                                                                   IMG_DEV_VIRTADDR              *psHWDataDevVAddr,
6303 -                                                                 IMG_BOOL                              bContextCleanup)
6304 +                                                                 IMG_UINT32                    ui32ResManRequestFlag)
6305  {
6306 -       IMG_UINT32                              ui32ResManRequestFlag = 0;
6307 +       PVRSRV_SGXDEV_INFO              *psSGXDevInfo = (PVRSRV_SGXDEV_INFO *)psDeviceNode->pvDevice;
6308         PVRSRV_KERNEL_MEM_INFO  *psSGXHostCtlMemInfo = psSGXDevInfo->psKernelSGXHostCtlMemInfo;
6309         PVRSRV_SGX_HOST_CTL             *psSGXHostCtl = (PVRSRV_SGX_HOST_CTL *)psSGXHostCtlMemInfo->pvLinAddrKM;
6310         IMG_UINT32                              ui32PowManFlags;
6311 @@ -554,25 +511,18 @@
6312
6313                 if (psSGXDevInfo->ui32CacheControl & SGX_BIF_INVALIDATE_PDCACHE)
6314                 {
6315 -                       ui32ResManRequestFlag |= PVRSRV_USSE_EDM_RESMAN_CLEANUP_INVALPD;
6316 +                       psSGXHostCtl->ui32ResManFlags |= PVRSRV_USSE_EDM_RESMAN_CLEANUP_INVALPD;
6317                         psSGXDevInfo->ui32CacheControl ^= SGX_BIF_INVALIDATE_PDCACHE;
6318                 }
6319                 if (psSGXDevInfo->ui32CacheControl & SGX_BIF_INVALIDATE_PTCACHE)
6320                 {
6321 -                       ui32ResManRequestFlag |= PVRSRV_USSE_EDM_RESMAN_CLEANUP_INVALPT;
6322 +                       psSGXHostCtl->ui32ResManFlags |= PVRSRV_USSE_EDM_RESMAN_CLEANUP_INVALPT;
6323                         psSGXDevInfo->ui32CacheControl ^= SGX_BIF_INVALIDATE_PTCACHE;
6324                 }
6325 -               if (bContextCleanup)
6326 -               {
6327 -                       ui32ResManRequestFlag |= PVRSRV_USSE_EDM_RESMAN_CLEANUP_RC_REQUEST;
6328 -               }
6329 -               else
6330 -               {
6331 -                       ui32ResManRequestFlag |= PVRSRV_USSE_EDM_RESMAN_CLEANUP_RT_REQUEST;
6332 -               }
6333 -
6334 +
6335
6336                 psSGXHostCtl->sResManCleanupData.uiAddr = psHWDataDevVAddr->uiAddr;
6337 +
6338                 psSGXHostCtl->ui32ResManFlags |= ui32ResManRequestFlag;
6339
6340
6341 @@ -581,6 +531,9 @@
6342                 PDUMPMEM(IMG_NULL, psSGXHostCtlMemInfo, offsetof(PVRSRV_SGX_HOST_CTL, ui32ResManFlags), sizeof(IMG_UINT32), PDUMP_FLAGS_CONTINUOUS, hUniqueTag);
6343
6344
6345 +               SGXScheduleProcessQueues(psDeviceNode);
6346 +
6347 +
6348                 #if !defined(NO_HARDWARE)
6349                 if(PollForValueKM ((volatile IMG_UINT32 *)(&psSGXHostCtl->ui32ResManFlags),
6350                                         PVRSRV_USSE_EDM_RESMAN_CLEANUP_COMPLETE,
6351 @@ -612,8 +565,8 @@
6352
6353  typedef struct _SGX_HW_RENDER_CONTEXT_CLEANUP_
6354  {
6355 -       PVRSRV_SGXDEV_INFO *psDevInfo;
6356 -       IMG_DEV_VIRTADDR sHWDataDevVAddr;
6357 +       PVRSRV_DEVICE_NODE *psDeviceNode;
6358 +       IMG_DEV_VIRTADDR sHWRenderContextDevVAddr;
6359         IMG_HANDLE hBlockAlloc;
6360         PRESMAN_ITEM psResItem;
6361  } SGX_HW_RENDER_CONTEXT_CLEANUP;
6362 @@ -625,8 +578,8 @@
6363         PVR_UNREFERENCED_PARAMETER(ui32ProcessID);
6364         PVR_UNREFERENCED_PARAMETER(ui32Param);
6365
6366 -       SGXCleanupRequest(psCleanup->psDevInfo,
6367 -                                                       &psCleanup->sHWDataDevVAddr, IMG_TRUE);
6368 +       SGXCleanupRequest(psCleanup->psDeviceNode,
6369 +                                                       &psCleanup->sHWRenderContextDevVAddr, PVRSRV_USSE_EDM_RESMAN_CLEANUP_RC_REQUEST);
6370
6371         OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP,
6372                           sizeof(SGX_HW_RENDER_CONTEXT_CLEANUP),
6373 @@ -636,8 +589,34 @@
6374         return PVRSRV_OK;
6375  }
6376
6377 +typedef struct _SGX_HW_TRANSFER_CONTEXT_CLEANUP_
6378 +{
6379 +       PVRSRV_DEVICE_NODE *psDeviceNode;
6380 +       IMG_DEV_VIRTADDR sHWTransferContextDevVAddr;
6381 +       IMG_HANDLE hBlockAlloc;
6382 +       PRESMAN_ITEM psResItem;
6383 +} SGX_HW_TRANSFER_CONTEXT_CLEANUP;
6384 +
6385 +static PVRSRV_ERROR SGXCleanupHWTransferContextCallback(IMG_UINT32 ui32ProcessID, IMG_PVOID pvParam, IMG_UINT32 ui32Param)
6386 +{
6387 +       SGX_HW_TRANSFER_CONTEXT_CLEANUP *psCleanup = (SGX_HW_TRANSFER_CONTEXT_CLEANUP *)pvParam;
6388 +
6389 +       PVR_UNREFERENCED_PARAMETER(ui32ProcessID);
6390 +       PVR_UNREFERENCED_PARAMETER(ui32Param);
6391 +
6392 +       SGXCleanupRequest(psCleanup->psDeviceNode,
6393 +                                                       &psCleanup->sHWTransferContextDevVAddr, PVRSRV_USSE_EDM_RESMAN_CLEANUP_TC_REQUEST);
6394 +
6395 +       OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP,
6396 +                         sizeof(SGX_HW_TRANSFER_CONTEXT_CLEANUP),
6397 +                         psCleanup,
6398 +                         psCleanup->hBlockAlloc);
6399 +
6400 +       return PVRSRV_OK;
6401 +}
6402 +
6403  IMG_EXPORT
6404 -IMG_HANDLE SGXRegisterHWRenderContextKM(PVRSRV_SGXDEV_INFO *psSGXDevInfo, IMG_DEV_VIRTADDR *psHWRenderContextDevVAddr)
6405 +IMG_HANDLE SGXRegisterHWRenderContextKM(IMG_HANDLE psDeviceNode, IMG_DEV_VIRTADDR *psHWRenderContextDevVAddr)
6406  {
6407         PVRSRV_ERROR eError;
6408         IMG_HANDLE hBlockAlloc;
6409 @@ -656,8 +635,8 @@
6410         }
6411
6412         psCleanup->hBlockAlloc = hBlockAlloc;
6413 -       psCleanup->psDevInfo = psSGXDevInfo;
6414 -       psCleanup->sHWDataDevVAddr = *psHWRenderContextDevVAddr;
6415 +       psCleanup->psDeviceNode = (PVRSRV_DEVICE_NODE *)psDeviceNode;
6416 +       psCleanup->sHWRenderContextDevVAddr = *psHWRenderContextDevVAddr;
6417
6418         psResItem = ResManRegisterRes(RESMAN_TYPE_HW_RENDER_CONTEXT,
6419                                                                   (IMG_VOID *)psCleanup,
6420 @@ -682,25 +661,173 @@
6421  }
6422
6423  IMG_EXPORT
6424 -IMG_VOID SGXFlushHWRenderTargetKM(PVRSRV_SGXDEV_INFO *psDevInfo, IMG_DEV_VIRTADDR sHWRTDataSetDevVAddr)
6425 +PVRSRV_ERROR SGXUnregisterHWRenderContextKM(IMG_HANDLE hHWRenderContext)
6426  {
6427 -       PVR_ASSERT(sHWRTDataSetDevVAddr.uiAddr != IMG_NULL);
6428 +       PVRSRV_ERROR eError;
6429 +       SGX_HW_RENDER_CONTEXT_CLEANUP *psCleanup;
6430
6431 -       SGXCleanupRequest(psDevInfo, &sHWRTDataSetDevVAddr, IMG_FALSE);
6432 +       PVR_ASSERT(hHWRenderContext != IMG_NULL);
6433 +
6434 +       psCleanup = (SGX_HW_RENDER_CONTEXT_CLEANUP *)hHWRenderContext;
6435 +
6436 +       eError = ResManFreeResByPtr(psCleanup->psResItem, IMG_TRUE);
6437 +
6438 +       return eError;
6439  }
6440
6441  IMG_EXPORT
6442 -PVRSRV_ERROR SGXUnregisterHWRenderContextKM(IMG_HANDLE hHWRenderContext)
6443 +IMG_HANDLE SGXRegisterHWTransferContextKM(IMG_HANDLE psDeviceNode, IMG_DEV_VIRTADDR *psHWTransferContextDevVAddr)
6444  {
6445         PVRSRV_ERROR eError;
6446 -       SGX_HW_RENDER_CONTEXT_CLEANUP *psCleanup;
6447 +       IMG_HANDLE hBlockAlloc;
6448 +       SGX_HW_TRANSFER_CONTEXT_CLEANUP *psCleanup;
6449 +       PRESMAN_ITEM psResItem;
6450
6451 -       PVR_ASSERT(hHWRenderContext != IMG_NULL);
6452 +       eError = OSAllocMem(PVRSRV_OS_PAGEABLE_HEAP,
6453 +                                               sizeof(SGX_HW_TRANSFER_CONTEXT_CLEANUP),
6454 +                                               (IMG_VOID **)&psCleanup,
6455 +                                               &hBlockAlloc);
6456
6457 -       psCleanup = (SGX_HW_RENDER_CONTEXT_CLEANUP *)hHWRenderContext;
6458 +       if (eError != PVRSRV_OK)
6459 +       {
6460 +               PVR_DPF((PVR_DBG_ERROR, "SGXRegisterHWTransferContextKM: Couldn't allocate memory for SGX_HW_TRANSFER_CONTEXT_CLEANUP structure"));
6461 +               return IMG_NULL;
6462 +       }
6463 +
6464 +       psCleanup->hBlockAlloc = hBlockAlloc;
6465 +       psCleanup->psDeviceNode = (PVRSRV_DEVICE_NODE *)psDeviceNode;
6466 +       psCleanup->sHWTransferContextDevVAddr = *psHWTransferContextDevVAddr;
6467 +
6468 +       psResItem = ResManRegisterRes(RESMAN_TYPE_HW_TRANSFER_CONTEXT,
6469 +                                                                 (IMG_VOID *)psCleanup,
6470 +                                                                 0,
6471 +                                                                 &SGXCleanupHWTransferContextCallback,
6472 +                                                                 0);
6473 +
6474 +       if (psResItem == IMG_NULL)
6475 +       {
6476 +               PVR_DPF((PVR_DBG_ERROR, "SGXRegisterHWTransferContextKM: ResManRegisterRes failed"));
6477 +               OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP,
6478 +                                 sizeof(SGX_HW_TRANSFER_CONTEXT_CLEANUP),
6479 +                                 psCleanup,
6480 +                                 psCleanup->hBlockAlloc);
6481 +
6482 +               return IMG_NULL;
6483 +       }
6484 +
6485 +       psCleanup->psResItem = psResItem;
6486 +
6487 +       return (IMG_HANDLE)psCleanup;
6488 +}
6489 +
6490 +IMG_EXPORT
6491 +PVRSRV_ERROR SGXUnregisterHWTransferContextKM(IMG_HANDLE hHWTransferContext)
6492 +{
6493 +       PVRSRV_ERROR eError;
6494 +       SGX_HW_TRANSFER_CONTEXT_CLEANUP *psCleanup;
6495 +
6496 +       PVR_ASSERT(hHWTransferContext != IMG_NULL);
6497 +
6498 +       psCleanup = (SGX_HW_TRANSFER_CONTEXT_CLEANUP *)hHWTransferContext;
6499 +
6500 +       eError = ResManFreeResByPtr(psCleanup->psResItem, IMG_TRUE);
6501 +
6502 +       return eError;
6503 +}
6504 +
6505 +#if defined(SGX_FEATURE_2D_HARDWARE)
6506 +typedef struct _SGX_HW_2D_CONTEXT_CLEANUP_
6507 +{
6508 +       PVRSRV_DEVICE_NODE *psDeviceNode;
6509 +       IMG_DEV_VIRTADDR sHW2DContextDevVAddr;
6510 +       IMG_HANDLE hBlockAlloc;
6511 +       PRESMAN_ITEM psResItem;
6512 +} SGX_HW_2D_CONTEXT_CLEANUP;
6513 +
6514 +static PVRSRV_ERROR SGXCleanupHW2DContextCallback(IMG_UINT32 ui32ProcessID, IMG_PVOID pvParam, IMG_UINT32 ui32Param)
6515 +{
6516 +       SGX_HW_2D_CONTEXT_CLEANUP *psCleanup = (SGX_HW_2D_CONTEXT_CLEANUP *)pvParam;
6517 +
6518 +       PVR_UNREFERENCED_PARAMETER(ui32ProcessID);
6519 +       PVR_UNREFERENCED_PARAMETER(ui32Param);
6520 +
6521 +       SGXCleanupRequest(psCleanup->psDeviceNode,
6522 +                                                       &psCleanup->sHW2DContextDevVAddr, PVRSRV_USSE_EDM_RESMAN_CLEANUP_2DC_REQUEST);
6523 +
6524 +       OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP,
6525 +                         sizeof(SGX_HW_2D_CONTEXT_CLEANUP),
6526 +                         psCleanup,
6527 +                         psCleanup->hBlockAlloc);
6528 +
6529 +       return PVRSRV_OK;
6530 +}
6531 +
6532 +IMG_EXPORT
6533 +IMG_HANDLE SGXRegisterHW2DContextKM(IMG_HANDLE psDeviceNode, IMG_DEV_VIRTADDR *psHW2DContextDevVAddr)
6534 +{
6535 +       PVRSRV_ERROR eError;
6536 +       IMG_HANDLE hBlockAlloc;
6537 +       SGX_HW_2D_CONTEXT_CLEANUP *psCleanup;
6538 +       PRESMAN_ITEM psResItem;
6539 +
6540 +       eError = OSAllocMem(PVRSRV_OS_PAGEABLE_HEAP,
6541 +                                               sizeof(SGX_HW_2D_CONTEXT_CLEANUP),
6542 +                                               (IMG_VOID **)&psCleanup,
6543 +                                               &hBlockAlloc);
6544 +
6545 +       if (eError != PVRSRV_OK)
6546 +       {
6547 +               PVR_DPF((PVR_DBG_ERROR, "SGXRegisterHW2DContextKM: Couldn't allocate memory for SGX_HW_2D_CONTEXT_CLEANUP structure"));
6548 +               return IMG_NULL;
6549 +       }
6550 +
6551 +       psCleanup->hBlockAlloc = hBlockAlloc;
6552 +       psCleanup->psDeviceNode = (PVRSRV_DEVICE_NODE *)psDeviceNode;
6553 +       psCleanup->sHW2DContextDevVAddr = *psHW2DContextDevVAddr;
6554 +
6555 +       psResItem = ResManRegisterRes(RESMAN_TYPE_HW_2D_CONTEXT,
6556 +                                                                 (IMG_VOID *)psCleanup,
6557 +                                                                 0,
6558 +                                                                 &SGXCleanupHW2DContextCallback,
6559 +                                                                 0);
6560 +
6561 +       if (psResItem == IMG_NULL)
6562 +       {
6563 +               PVR_DPF((PVR_DBG_ERROR, "SGXRegisterHW2DContextKM: ResManRegisterRes failed"));
6564 +               OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP,
6565 +                                 sizeof(SGX_HW_2D_CONTEXT_CLEANUP),
6566 +                                 psCleanup,
6567 +                                 psCleanup->hBlockAlloc);
6568 +
6569 +               return IMG_NULL;
6570 +       }
6571 +
6572 +       psCleanup->psResItem = psResItem;
6573 +
6574 +       return (IMG_HANDLE)psCleanup;
6575 +}
6576 +
6577 +IMG_EXPORT
6578 +PVRSRV_ERROR SGXUnregisterHW2DContextKM(IMG_HANDLE hHW2DContext)
6579 +{
6580 +       PVRSRV_ERROR eError;
6581 +       SGX_HW_2D_CONTEXT_CLEANUP *psCleanup;
6582 +
6583 +       PVR_ASSERT(hHW2DContext != IMG_NULL);
6584 +
6585 +       psCleanup = (SGX_HW_2D_CONTEXT_CLEANUP *)hHW2DContext;
6586
6587         eError = ResManFreeResByPtr(psCleanup->psResItem, IMG_TRUE);
6588
6589         return eError;
6590  }
6591 +#endif
6592 +
6593 +IMG_EXPORT
6594 +IMG_VOID SGXFlushHWRenderTargetKM(IMG_HANDLE psDeviceNode, IMG_DEV_VIRTADDR sHWRTDataSetDevVAddr)
6595 +{
6596 +       PVR_ASSERT(sHWRTDataSetDevVAddr.uiAddr != IMG_NULL);
6597 +
6598 +       SGXCleanupRequest((PVRSRV_DEVICE_NODE *)psDeviceNode, &sHWRTDataSetDevVAddr, PVRSRV_USSE_EDM_RESMAN_CLEANUP_RT_REQUEST);
6599 +}
6600
6601 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgxutils.h git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgxutils.h
6602 --- git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgxutils.h  2009-01-05 20:00:44.000000000 +0100
6603 +++ git/drivers/gpu/pvr/services4/srvkm/devices/sgx/sgxutils.h  2008-12-18 15:47:29.000000000 +0100
6604 @@ -73,6 +73,13 @@
6605                                                  IMG_BOOL                                               bDumpPolls);
6606  #endif
6607
6608 +
6609 +#if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT)
6610 +IMG_IMPORT
6611 +IMG_VOID SGXTestActivePowerEvent(PVRSRV_DEVICE_NODE    *psDeviceNode,
6612 +                                                                IMG_UINT32                     ui32CallerID);
6613 +#endif
6614 +
6615  IMG_IMPORT
6616  PVRSRV_ERROR SGXScheduleCCBCommandKM(PVRSRV_DEVICE_NODE                        *psDeviceNode,
6617                                                                          PVRSRV_SGX_COMMAND_TYPE        eCommandType,
6618 @@ -80,14 +87,31 @@
6619                                                                          IMG_UINT32                                     ui32CallerID);
6620
6621  IMG_IMPORT
6622 +IMG_VOID SGXScheduleProcessQueues(PVRSRV_DEVICE_NODE *psDeviceNode);
6623 +
6624 +IMG_IMPORT
6625  IMG_BOOL SGXIsDevicePowered(PVRSRV_DEVICE_NODE *psDeviceNode);
6626
6627  IMG_IMPORT
6628 -IMG_HANDLE SGXRegisterHWRenderContextKM(PVRSRV_SGXDEV_INFO *psSGXDevInfo, IMG_DEV_VIRTADDR *psHWRenderContextDevVAddr);
6629 +IMG_HANDLE SGXRegisterHWRenderContextKM(IMG_HANDLE psSGXDevInfo, IMG_DEV_VIRTADDR *psHWRenderContextDevVAddr);
6630
6631  IMG_IMPORT
6632 -IMG_VOID SGXFlushHWRenderTargetKM(PVRSRV_SGXDEV_INFO *psSGXDevInfo, IMG_DEV_VIRTADDR psHWRTDataSetDevVAddr);
6633 +IMG_HANDLE SGXRegisterHWTransferContextKM(IMG_HANDLE psSGXDevInfo, IMG_DEV_VIRTADDR *psHWTransferContextDevVAddr);
6634 +
6635 +IMG_IMPORT
6636 +IMG_VOID SGXFlushHWRenderTargetKM(IMG_HANDLE psSGXDevInfo, IMG_DEV_VIRTADDR psHWRTDataSetDevVAddr);
6637
6638  IMG_IMPORT
6639  PVRSRV_ERROR SGXUnregisterHWRenderContextKM(IMG_HANDLE hHWRenderContext);
6640
6641 +IMG_IMPORT
6642 +PVRSRV_ERROR SGXUnregisterHWTransferContextKM(IMG_HANDLE hHWTransferContext);
6643 +
6644 +#if defined(SGX_FEATURE_2D_HARDWARE)
6645 +IMG_IMPORT
6646 +IMG_HANDLE SGXRegisterHW2DContextKM(IMG_HANDLE psSGXDevInfo, IMG_DEV_VIRTADDR *psHW2DContextDevVAddr);
6647 +
6648 +IMG_IMPORT
6649 +PVRSRV_ERROR SGXUnregisterHW2DContextKM(IMG_HANDLE hHW2DContext);
6650 +#endif
6651 +
6652 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/env/linux/env_data.h git/drivers/gpu/pvr/services4/srvkm/env/linux/env_data.h
6653 --- git/drivers/gpu/pvr/services4/srvkm/env/linux/env_data.h    2009-01-05 20:00:44.000000000 +0100
6654 +++ git/drivers/gpu/pvr/services4/srvkm/env/linux/env_data.h    2008-12-18 15:47:29.000000000 +0100
6655 @@ -33,6 +33,12 @@
6656  #define PVRSRV_MAX_BRIDGE_IN_SIZE      0x1000
6657  #define PVRSRV_MAX_BRIDGE_OUT_SIZE     0x1000
6658
6659 +typedef        struct _PVR_PCI_DEV_TAG
6660 +{
6661 +       struct pci_dev          *psPCIDev;
6662 +       HOST_PCI_INIT_FLAGS     ePCIFlags;
6663 +       IMG_BOOL abPCIResourceInUse[DEVICE_COUNT_RESOURCE];
6664 +} PVR_PCI_DEV;
6665
6666  typedef struct _ENV_DATA_TAG
6667  {
6668 @@ -43,8 +49,6 @@
6669         IMG_UINT32              ui32IRQ;
6670         IMG_VOID                *pvISRCookie;
6671         struct tasklet_struct   sMISRTasklet;
6672 -       struct pci_dev          *psPCIDev;
6673 -       IMG_BOOL abPCIResourceInUse[DEVICE_COUNT_RESOURCE];
6674  } ENV_DATA;
6675
6676  #endif
6677 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/env/linux/event.c git/drivers/gpu/pvr/services4/srvkm/env/linux/event.c
6678 --- git/drivers/gpu/pvr/services4/srvkm/env/linux/event.c       1970-01-01 01:00:00.000000000 +0100
6679 +++ git/drivers/gpu/pvr/services4/srvkm/env/linux/event.c       2008-12-18 15:47:29.000000000 +0100
6680 @@ -0,0 +1,221 @@
6681 +/**********************************************************************
6682 + *
6683 + * Copyright(c) 2008 Imagination Technologies Ltd. All rights reserved.
6684 + *
6685 + * This program is free software; you can redistribute it and/or modify it
6686 + * under the terms and conditions of the GNU General Public License,
6687 + * version 2, as published by the Free Software Foundation.
6688 + *
6689 + * This program is distributed in the hope it will be useful but, except
6690 + * as otherwise stated in writing, without any warranty; without even the
6691 + * implied warranty of merchantability or fitness for a particular purpose.
6692 + * See the GNU General Public License for more details.
6693 + *
6694 + * You should have received a copy of the GNU General Public License along with
6695 + * this program; if not, write to the Free Software Foundation, Inc.,
6696 + * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
6697 + *
6698 + * The full GNU General Public License is included in this distribution in
6699 + * the file called "COPYING".
6700 + *
6701 + * Contact Information:
6702 + * Imagination Technologies Ltd. <gpl-support@imgtec.com>
6703 + * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
6704 + *
6705 + ******************************************************************************/
6706 +
6707 +#ifndef AUTOCONF_INCLUDED
6708 + #include <linux/config.h>
6709 +#endif
6710 +
6711 +#include <linux/version.h>
6712 +#include <asm/io.h>
6713 +#include <asm/page.h>
6714 +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,22))
6715 +#include <asm/system.h>
6716 +#endif
6717 +#include <linux/mm.h>
6718 +#include <linux/slab.h>
6719 +#include <linux/vmalloc.h>
6720 +#include <linux/delay.h>
6721 +#include <linux/pci.h>
6722 +
6723 +#include <linux/string.h>
6724 +#include <linux/sched.h>
6725 +#include <linux/interrupt.h>
6726 +#include <asm/hardirq.h>
6727 +#include <linux/timer.h>
6728 +#include <linux/capability.h>
6729 +#include <asm/uaccess.h>
6730 +
6731 +#include "img_types.h"
6732 +#include "services_headers.h"
6733 +#include "mm.h"
6734 +#include "pvrmmap.h"
6735 +#include "mmap.h"
6736 +#include "env_data.h"
6737 +#include "proc.h"
6738 +#include "mutex.h"
6739 +
6740 +typedef struct PVRSRV_LINUX_EVENT_OBJECT_LIST_TAG
6741 +{
6742 +   rwlock_t                       sLock;
6743 +   struct list_head        sList;
6744 +
6745 +} PVRSRV_LINUX_EVENT_OBJECT_LIST;
6746 +
6747 +
6748 +typedef struct PVRSRV_LINUX_EVENT_OBJECT_TAG
6749 +{
6750 +       struct completion sCompletion;
6751 +       struct list_head        sList;
6752 +       IMG_HANDLE                      hResItem;
6753 +       PVRSRV_LINUX_EVENT_OBJECT_LIST *psLinuxEventObjectList;
6754 +} PVRSRV_LINUX_EVENT_OBJECT;
6755 +
6756 +PVRSRV_ERROR LinuxEventObjectListCreate(IMG_HANDLE *phEventObjectList)
6757 +{
6758 +       PVRSRV_LINUX_EVENT_OBJECT_LIST *psEvenObjectList;
6759 +
6760 +       if(OSAllocMem(PVRSRV_OS_NON_PAGEABLE_HEAP, sizeof(PVRSRV_LINUX_EVENT_OBJECT_LIST),
6761 +               (IMG_VOID **)&psEvenObjectList, IMG_NULL) != PVRSRV_OK)
6762 +       {
6763 +               PVR_DPF((PVR_DBG_ERROR, "LinuxEventObjectCreate: failed to allocate memory for event list"));
6764 +               return PVRSRV_ERROR_OUT_OF_MEMORY;
6765 +       }
6766 +
6767 +    INIT_LIST_HEAD(&psEvenObjectList->sList);
6768 +
6769 +       rwlock_init(&psEvenObjectList->sLock);
6770 +
6771 +       *phEventObjectList = (IMG_HANDLE *) psEvenObjectList;
6772 +
6773 +       return PVRSRV_OK;
6774 +}
6775 +
6776 +PVRSRV_ERROR LinuxEventObjectListDestroy(IMG_HANDLE hEventObjectList)
6777 +{
6778 +
6779 +       PVRSRV_LINUX_EVENT_OBJECT_LIST *psEvenObjectList = (PVRSRV_LINUX_EVENT_OBJECT_LIST *) hEventObjectList ;
6780 +
6781 +       if(psEvenObjectList)
6782 +       {
6783 +               if (!list_empty(&psEvenObjectList->sList))
6784 +               {
6785 +                        PVR_DPF((PVR_DBG_ERROR, "LinuxEventObjectListDestroy: Event List is not empty"));
6786 +                        return PVRSRV_ERROR_GENERIC;
6787 +               }
6788 +               OSFreeMem(PVRSRV_OS_NON_PAGEABLE_HEAP, sizeof(PVRSRV_LINUX_EVENT_OBJECT_LIST), psEvenObjectList, IMG_NULL);
6789 +       }
6790 +       return PVRSRV_OK;
6791 +}
6792 +
6793 +
6794 +PVRSRV_ERROR LinuxEventObjectDelete(IMG_HANDLE hOSEventObjectList, IMG_HANDLE hOSEventObject, IMG_BOOL bResManCallback)
6795 +{
6796 +       if(hOSEventObjectList)
6797 +       {
6798 +               PVRSRV_LINUX_EVENT_OBJECT_LIST *psLinuxEventObjectList = (PVRSRV_LINUX_EVENT_OBJECT_LIST*)hOSEventObjectList;
6799 +               if(hOSEventObject)
6800 +               {
6801 +                       PVRSRV_LINUX_EVENT_OBJECT *psLinuxEventObject = (PVRSRV_LINUX_EVENT_OBJECT *)hOSEventObject;
6802 +                       write_lock_bh(&psLinuxEventObjectList->sLock);
6803 +                       list_del(&psLinuxEventObject->sList);
6804 +                       write_unlock_bh(&psLinuxEventObjectList->sLock);
6805 +
6806 +
6807 +                       if(!bResManCallback && psLinuxEventObject->hResItem)
6808 +                       {
6809 +                               if(ResManFreeResByPtr(psLinuxEventObject->hResItem, IMG_FALSE) != PVRSRV_OK)
6810 +                               {
6811 +                                       return PVRSRV_ERROR_GENERIC;
6812 +                               }
6813 +                       }
6814 +
6815 +                       OSFreeMem(PVRSRV_OS_NON_PAGEABLE_HEAP, sizeof(PVRSRV_LINUX_EVENT_OBJECT), psLinuxEventObject, IMG_NULL);
6816 +
6817 +                       return PVRSRV_OK;
6818 +               }
6819 +       }
6820 +       return PVRSRV_ERROR_GENERIC;
6821 +
6822 +}
6823 +
6824 +static PVRSRV_ERROR LinuxEventObjectDeleteCallback(IMG_UINT32 ui32ProcessID, IMG_PVOID pvParam, IMG_UINT32 ui32Param)
6825 +{
6826 +       if(pvParam)
6827 +       {
6828 +               PVRSRV_LINUX_EVENT_OBJECT *psLinuxEventObject = (PVRSRV_LINUX_EVENT_OBJECT *)pvParam;
6829 +               if(psLinuxEventObject->psLinuxEventObjectList)
6830 +               {
6831 +                       IMG_HANDLE hOSEventObjectList = (IMG_HANDLE)psLinuxEventObject->psLinuxEventObjectList;
6832 +                       return LinuxEventObjectDelete(hOSEventObjectList,(IMG_HANDLE) psLinuxEventObject, IMG_TRUE);
6833 +               }
6834 +       }
6835 +       return PVRSRV_ERROR_GENERIC;
6836 +}
6837 +PVRSRV_ERROR LinuxEventObjectAdd(IMG_HANDLE hOSEventObjectList, IMG_HANDLE *phOSEventObject)
6838 + {
6839 +       PVRSRV_LINUX_EVENT_OBJECT *psLinuxEventObject;
6840 +       PVRSRV_LINUX_EVENT_OBJECT_LIST *psLinuxEventObjectList = (PVRSRV_LINUX_EVENT_OBJECT_LIST*)hOSEventObjectList;
6841 +
6842 +
6843 +       if(OSAllocMem(PVRSRV_OS_NON_PAGEABLE_HEAP, sizeof(PVRSRV_LINUX_EVENT_OBJECT),
6844 +               (IMG_VOID **)&psLinuxEventObject, IMG_NULL) != PVRSRV_OK)
6845 +       {
6846 +               PVR_DPF((PVR_DBG_ERROR, "LinuxEventObjectAdd: failed to allocate memory "));
6847 +               return PVRSRV_ERROR_OUT_OF_MEMORY;
6848 +       }
6849 +
6850 +       INIT_LIST_HEAD(&psLinuxEventObject->sList);
6851 +
6852 +       init_completion(&psLinuxEventObject->sCompletion);
6853 +
6854 +
6855 +       psLinuxEventObject->psLinuxEventObjectList = psLinuxEventObjectList;
6856 +
6857 +       psLinuxEventObject->hResItem = (IMG_HANDLE)ResManRegisterRes(RESMAN_TYPE_EVENT_OBJECT,
6858 +                                                                                                                               psLinuxEventObject,
6859 +                                                                                                                               0,
6860 +                                                                                                                               &LinuxEventObjectDeleteCallback,
6861 +                                                                                                                               0);
6862 +
6863 +       write_lock_bh(&psLinuxEventObjectList->sLock);
6864 +       list_add(&psLinuxEventObject->sList, &psLinuxEventObjectList->sList);
6865 +    write_unlock_bh(&psLinuxEventObjectList->sLock);
6866 +
6867 +       *phOSEventObject = psLinuxEventObject;
6868 +
6869 +       return PVRSRV_OK;
6870 +}
6871 +
6872 +PVRSRV_ERROR LinuxEventObjectSignal(IMG_HANDLE hOSEventObjectList)
6873 +{
6874 +       PVRSRV_LINUX_EVENT_OBJECT *psLinuxEventObject;
6875 +       PVRSRV_LINUX_EVENT_OBJECT_LIST *psLinuxEventObjectList = (PVRSRV_LINUX_EVENT_OBJECT_LIST*)hOSEventObjectList;
6876 +       struct list_head *psListEntry, *psListEntryTemp, *psList;
6877 +       psList = &psLinuxEventObjectList->sList;
6878 +
6879 +       list_for_each_safe(psListEntry, psListEntryTemp, psList)
6880 +       {
6881 +                               psLinuxEventObject = list_entry(psListEntry, PVRSRV_LINUX_EVENT_OBJECT, sList);
6882 +                               complete(&psLinuxEventObject->sCompletion);
6883 +       }
6884 +       return  PVRSRV_OK;
6885 +
6886 +}
6887 +
6888 +PVRSRV_ERROR LinuxEventObjectWait(IMG_HANDLE hOSEventObject, IMG_UINT32 ui32MSTimeout)
6889 +{
6890 +       PVRSRV_LINUX_EVENT_OBJECT *psLinuxEventObject = (PVRSRV_LINUX_EVENT_OBJECT *) hOSEventObject;
6891 +
6892 +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,10))
6893 +       if(wait_for_completion_timeout(&psLinuxEventObject->sCompletion, msecs_to_jiffies(ui32MSTimeout)) == 0)
6894 +       {
6895 +               return PVRSRV_ERROR_TIMEOUT;
6896 +       }
6897 +#else
6898 +       wait_for_completion(&psLinuxEventObject->sCompletion);
6899 +#endif
6900 +       return  PVRSRV_OK;
6901 +}
6902 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/env/linux/event.h git/drivers/gpu/pvr/services4/srvkm/env/linux/event.h
6903 --- git/drivers/gpu/pvr/services4/srvkm/env/linux/event.h       1970-01-01 01:00:00.000000000 +0100
6904 +++ git/drivers/gpu/pvr/services4/srvkm/env/linux/event.h       2008-12-18 15:47:29.000000000 +0100
6905 @@ -0,0 +1,32 @@
6906 +/**********************************************************************
6907 + *
6908 + * Copyright(c) 2008 Imagination Technologies Ltd. All rights reserved.
6909 + *
6910 + * This program is free software; you can redistribute it and/or modify it
6911 + * under the terms and conditions of the GNU General Public License,
6912 + * version 2, as published by the Free Software Foundation.
6913 + *
6914 + * This program is distributed in the hope it will be useful but, except
6915 + * as otherwise stated in writing, without any warranty; without even the
6916 + * implied warranty of merchantability or fitness for a particular purpose.
6917 + * See the GNU General Public License for more details.
6918 + *
6919 + * You should have received a copy of the GNU General Public License along with
6920 + * this program; if not, write to the Free Software Foundation, Inc.,
6921 + * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
6922 + *
6923 + * The full GNU General Public License is included in this distribution in
6924 + * the file called "COPYING".
6925 + *
6926 + * Contact Information:
6927 + * Imagination Technologies Ltd. <gpl-support@imgtec.com>
6928 + * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
6929 + *
6930 + ******************************************************************************/
6931 +
6932 +PVRSRV_ERROR LinuxEventObjectListCreate(IMG_HANDLE *phEventObjectList);
6933 +PVRSRV_ERROR LinuxEventObjectListDestroy(IMG_HANDLE hEventObjectList);
6934 +PVRSRV_ERROR LinuxEventObjectAdd(IMG_HANDLE hOSEventObjectList, IMG_HANDLE *phOSEventObject);
6935 +PVRSRV_ERROR LinuxEventObjectDelete(IMG_HANDLE hOSEventObjectList, IMG_HANDLE hOSEventObject, IMG_BOOL bResManCallback);
6936 +PVRSRV_ERROR LinuxEventObjectSignal(IMG_HANDLE hOSEventObjectList);
6937 +PVRSRV_ERROR LinuxEventObjectWait(IMG_HANDLE hOSEventObject, IMG_UINT32 ui32MSTimeout);
6938 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/env/linux/kbuild/Makefile git/drivers/gpu/pvr/services4/srvkm/env/linux/kbuild/Makefile
6939 --- git/drivers/gpu/pvr/services4/srvkm/env/linux/kbuild/Makefile       1970-01-01 01:00:00.000000000 +0100
6940 +++ git/drivers/gpu/pvr/services4/srvkm/env/linux/kbuild/Makefile       2008-12-18 15:47:29.000000000 +0100
6941 @@ -0,0 +1,81 @@
6942 +#
6943 +# Copyright(c) 2008 Imagination Technologies Ltd. All rights reserved.
6944 +#
6945 +# This program is free software; you can redistribute it and/or modify it
6946 +# under the terms and conditions of the GNU General Public License,
6947 +# version 2, as published by the Free Software Foundation.
6948 +#
6949 +# This program is distributed in the hope it will be useful but, except
6950 +# as otherwise stated in writing, without any warranty; without even the
6951 +# implied warranty of merchantability or fitness for a particular purpose.
6952 +# See the GNU General Public License for more details.
6953 +#
6954 +# You should have received a copy of the GNU General Public License along with
6955 +# this program; if not, write to the Free Software Foundation, Inc.,
6956 +# 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
6957 +#
6958 +# The full GNU General Public License is included in this distribution in
6959 +# the file called "COPYING".
6960 +#
6961 +# Contact Information:
6962 +# Imagination Technologies Ltd. <gpl-support@imgtec.com>
6963 +# Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
6964 +#
6965 +#
6966 +
6967 +#
6968 +MODULE         = pvrsrvkm
6969 +
6970 +KBUILDROOT     = ../../../..
6971 +
6972 +INCLUDES =     -I$(EURASIAROOT)/include4 \
6973 +                       -I$(EURASIAROOT)/services4/include \
6974 +                       -I$(EURASIAROOT)/services4/srvkm/env/linux \
6975 +                       -I$(EURASIAROOT)/services4/srvkm/include \
6976 +                       -I$(EURASIAROOT)/services4/srvkm/bridged \
6977 +                       -I$(EURASIAROOT)/services4/srvkm/devices/sgx \
6978 +                       -I$(EURASIAROOT)/services4/system/$(PVR_SYSTEM) \
6979 +                       -I$(EURASIAROOT)/services4/system/include
6980 +
6981 +
6982 +SOURCES              = $(KBUILDROOT)/srvkm/env/linux/osfunc.c \
6983 +                               $(KBUILDROOT)/srvkm/env/linux/mmap.c \
6984 +                               $(KBUILDROOT)/srvkm/env/linux/module.c \
6985 +                               $(KBUILDROOT)/srvkm/env/linux/pdump.c \
6986 +                               $(KBUILDROOT)/srvkm/env/linux/proc.c \
6987 +                               $(KBUILDROOT)/srvkm/env/linux/pvr_bridge_k.c \
6988 +                               $(KBUILDROOT)/srvkm/env/linux/pvr_debug.c \
6989 +                               $(KBUILDROOT)/srvkm/env/linux/mm.c \
6990 +                               $(KBUILDROOT)/srvkm/env/linux/mutex.c \
6991 +                               $(KBUILDROOT)/srvkm/env/linux/event.c
6992 +
6993 +SOURCES             += $(KBUILDROOT)/srvkm/common/buffer_manager.c \
6994 +                               $(KBUILDROOT)/srvkm/common/devicemem.c \
6995 +                               $(KBUILDROOT)/srvkm/common/deviceclass.c \
6996 +                               $(KBUILDROOT)/srvkm/common/handle.c \
6997 +                               $(KBUILDROOT)/srvkm/common/hash.c \
6998 +                               $(KBUILDROOT)/srvkm/common/metrics.c \
6999 +                               $(KBUILDROOT)/srvkm/common/pvrsrv.c \
7000 +                               $(KBUILDROOT)/srvkm/common/queue.c \
7001 +                               $(KBUILDROOT)/srvkm/common/ra.c \
7002 +                               $(KBUILDROOT)/srvkm/common/resman.c \
7003 +                               $(KBUILDROOT)/srvkm/common/power.c \
7004 +                               $(KBUILDROOT)/srvkm/common/mem.c \
7005 +                               $(KBUILDROOT)/srvkm/bridged/bridged_pvr_bridge.c \
7006 +                               $(KBUILDROOT)/srvkm/devices/sgx/sgxinit.c \
7007 +                               $(KBUILDROOT)/srvkm/devices/sgx/sgxreset.c \
7008 +                               $(KBUILDROOT)/srvkm/devices/sgx/sgxutils.c \
7009 +                               $(KBUILDROOT)/srvkm/devices/sgx/sgxkick.c \
7010 +                               $(KBUILDROOT)/srvkm/devices/sgx/sgxtransfer.c \
7011 +                               $(KBUILDROOT)/srvkm/devices/sgx/mmu.c \
7012 +                               $(KBUILDROOT)/srvkm/devices/sgx/pb.c \
7013 +                               $(KBUILDROOT)/srvkm/common/perproc.c \
7014 +                               $(KBUILDROOT)/../services4/system/$(PVR_SYSTEM)/sysconfig.c \
7015 +                               $(KBUILDROOT)/../services4/system/$(PVR_SYSTEM)/sysutils.c \
7016 +                               $(KBUILDROOT)/srvkm/devices/sgx/sgx2dcore.c
7017 +
7018 +
7019 +INCLUDES += -I$(EURASIAROOT)/services4/srvkm/hwdefs
7020 +
7021 +
7022 +
7023 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/env/linux/mm.c git/drivers/gpu/pvr/services4/srvkm/env/linux/mm.c
7024 --- git/drivers/gpu/pvr/services4/srvkm/env/linux/mm.c  2009-01-05 20:00:44.000000000 +0100
7025 +++ git/drivers/gpu/pvr/services4/srvkm/env/linux/mm.c  2008-12-18 15:47:29.000000000 +0100
7026 @@ -37,6 +37,7 @@
7027  #endif
7028  #include <linux/slab.h>
7029  #include <linux/highmem.h>
7030 +#include <linux/sched.h>
7031
7032  #include "img_defs.h"
7033  #include "services.h"
7034 @@ -1078,7 +1079,11 @@
7035  #if defined(DEBUG_LINUX_SLAB_ALLOCATIONS)
7036      ui32Flags |= SLAB_POISON|SLAB_RED_ZONE;
7037  #endif
7038 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24)
7039      return kmem_cache_create(pszName, Size, Align, ui32Flags, NULL);
7040 +#else
7041 +    return kmem_cache_create(pszName, Size, Align, ui32Flags, NULL, NULL);
7042 +#endif
7043  }
7044
7045
7046 @@ -1445,9 +1450,6 @@
7047  const IMG_CHAR *
7048  LinuxMemAreaTypeToString(LINUX_MEM_AREA_TYPE eMemAreaType)
7049  {
7050 -    PVR_ASSERT(LINUX_MEM_AREA_TYPE_COUNT == 5);
7051 -    PVR_ASSERT(eMemAreaType < LINUX_MEM_AREA_TYPE_COUNT);
7052 -
7053
7054      switch(eMemAreaType)
7055      {
7056 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/env/linux/module.c git/drivers/gpu/pvr/services4/srvkm/env/linux/module.c
7057 --- git/drivers/gpu/pvr/services4/srvkm/env/linux/module.c      2009-01-05 20:00:44.000000000 +0100
7058 +++ git/drivers/gpu/pvr/services4/srvkm/env/linux/module.c      2008-12-18 15:47:29.000000000 +0100
7059 @@ -25,7 +25,7 @@
7060   ******************************************************************************/
7061
7062  #ifndef AUTOCONF_INCLUDED
7063 -// #include <linux/config.h>
7064 + #include <linux/config.h>
7065  #endif
7066
7067  #include <linux/init.h>
7068 @@ -34,9 +34,19 @@
7069  #include <linux/version.h>
7070  #include <linux/fs.h>
7071  #include <linux/proc_fs.h>
7072 +
7073  #if defined(LDM_PLATFORM)
7074  #include <linux/platform_device.h>
7075  #endif
7076 +
7077 +#if defined(LDM_PCI)
7078 +#include <linux/pci.h>
7079 +#endif
7080 +
7081 +#if defined(DEBUG) && defined(PVR_MANUAL_POWER_CONTROL)
7082 +#include <asm/uaccess.h>
7083 +#endif
7084 +
7085  #include "img_defs.h"
7086  #include "services.h"
7087  #include "kerneldisplay.h"
7088 @@ -51,15 +61,13 @@
7089  #include "handle.h"
7090  #include "pvr_bridge_km.h"
7091  #include "proc.h"
7092 -
7093 +#include "pvrmodule.h"
7094
7095  #define CLASSNAME      "powervr"
7096  #define DRVNAME                "pvrsrvkm"
7097  #define DEVNAME                "pvrsrvkm"
7098
7099
7100 -MODULE_AUTHOR("Imagination Technologies Ltd. <gpl-support@imgtec.com>");
7101 -MODULE_LICENSE("GPL");
7102  MODULE_SUPPORTED_DEVICE(DEVNAME);
7103  #ifdef DEBUG
7104  static int debug = DBGPRIV_WARNING;
7105 @@ -99,24 +107,75 @@
7106  };
7107
7108
7109 +#if defined(LDM_PLATFORM) || defined(LDM_PCI)
7110 +
7111  #if defined(LDM_PLATFORM)
7112 -static int PVRSRVDriverRemove(struct platform_device *device);
7113 -static int PVRSRVDriverProbe(struct platform_device *device);
7114 -static int PVRSRVDriverSuspend(struct platform_device *device, pm_message_t state);
7115 -static void PVRSRVDriverShutdown(struct platform_device *device);
7116 -static int PVRSRVDriverResume(struct platform_device *device);
7117 +#define        LDM_DEV struct platform_device
7118 +#define        LDM_DRV struct platform_driver
7119 +#if defined(LDM_PCI)
7120 +#undef LDM_PCI
7121 +#endif
7122 +#endif
7123
7124 -static struct platform_driver powervr_driver = {
7125 +#if defined(LDM_PCI)
7126 +#define        LDM_DEV struct pci_dev
7127 +#define        LDM_DRV struct pci_driver
7128 +#endif
7129 +
7130 +//static void PVRSRVClassDeviceRelease(struct class_device *class_device);
7131 +
7132 +/*static struct class powervr_class = {
7133 +       .name                   = CLASSNAME,
7134 +       .release                = PVRSRVClassDeviceRelease
7135 +};*/
7136 +
7137 +#if defined(LDM_PLATFORM)
7138 +static int PVRSRVDriverRemove(LDM_DEV *device);
7139 +static int PVRSRVDriverProbe(LDM_DEV *device);
7140 +#endif
7141 +#if defined(LDM_PCI)
7142 +static void PVRSRVDriverRemove(LDM_DEV *device);
7143 +static int PVRSRVDriverProbe(LDM_DEV *device, const struct pci_device_id *id);
7144 +#endif
7145 +static int PVRSRVDriverSuspend(LDM_DEV *device, pm_message_t state);
7146 +static void PVRSRVDriverShutdown(LDM_DEV *device);
7147 +static int PVRSRVDriverResume(LDM_DEV *device);
7148 +
7149 +#if defined(LDM_PCI)
7150 +struct pci_device_id powervr_id_table[] __devinitdata = {
7151 +       { PCI_DEVICE(SYS_SGX_DEV_VENDOR_ID, SYS_SGX_DEV_DEVICE_ID2) },
7152 +       { 0 }
7153 +};
7154 +
7155 +MODULE_DEVICE_TABLE(pci, powervr_id_table);
7156 +#endif
7157 +
7158 +static LDM_DRV powervr_driver = {
7159 +#if defined(LDM_PLATFORM)
7160         .driver = {
7161 -               .name           = DEVNAME,
7162 +               .name           = DRVNAME,
7163         },
7164 +#endif
7165 +#if defined(LDM_PCI)
7166 +       .name           = DRVNAME,
7167 +       .id_table = powervr_id_table,
7168 +#endif
7169         .probe          = PVRSRVDriverProbe,
7170 +#if defined(LDM_PLATFORM)
7171         .remove         = PVRSRVDriverRemove,
7172 +#endif
7173 +#if defined(LDM_PCI)
7174 +       .remove         = __devexit_p(PVRSRVDriverRemove),
7175 +#endif
7176         .suspend        = PVRSRVDriverSuspend,
7177         .resume         = PVRSRVDriverResume,
7178         .shutdown       = PVRSRVDriverShutdown,
7179  };
7180
7181 +LDM_DEV *gpsPVRLDMDev;
7182 +
7183 +
7184 +#if defined(LDM_PLATFORM)
7185  static void PVRSRVDeviceRelease(struct device *device);
7186
7187  static struct platform_device powervr_device = {
7188 @@ -126,18 +185,79 @@
7189                 .release                = PVRSRVDeviceRelease
7190         }
7191  };
7192 +#endif
7193
7194
7195 +static ssize_t PVRSRVShowDev(struct class_device *pClassDevice, char *buf)
7196 +{
7197 +       PVR_TRACE(("PVRSRVShowDev(pClassDevice=%p)", pClassDevice));
7198
7199 -static int PVRSRVDriverProbe(struct platform_device *pDevice)
7200 +       return snprintf(buf, PAGE_SIZE, "%d:0\n", AssignedMajorNumber);
7201 +}
7202 +
7203 +//static CLASS_DEVICE_ATTR(dev,  S_IRUGO, PVRSRVShowDev, NULL);
7204 +
7205 +/*static void PVRSRVClassDeviceRelease(struct class_device *pClassDevice)
7206 +{
7207 +       PVR_TRACE(("PVRSRVClassDeviceRelease(pClassDevice=%p)", pClassDevice));
7208 +
7209 +       kfree(pClassDevice);
7210 +}*/
7211 +
7212 +#if defined(LDM_PLATFORM)
7213 +static int PVRSRVDriverProbe(LDM_DEV *pDevice)
7214 +#endif
7215 +#if defined(LDM_PCI)
7216 +static int __devinit PVRSRVDriverProbe(LDM_DEV *pDevice, const struct pci_device_id *id)
7217 +#endif
7218  {
7219         SYS_DATA *psSysData;
7220         PVRSRV_ERROR eError;
7221 +       //struct class_device *pClassDevice;
7222         int error;
7223
7224 -       PVR_DPF((PVR_DBG_WARNING, "PVRSRVDriverProbe(pDevice=%p)", pDevice));
7225 +       PVR_TRACE(("PVRSRVDriverProbe(pDevice=%p)", pDevice));
7226
7227 -       pDevice->dev.driver_data = NULL;
7228 +       pDevice->dev.driver_data = NULL;
7229 +       /*pClassDevice = kmalloc(sizeof(*pClassDevice), GFP_KERNEL);
7230 +
7231 +       if (pClassDevice == IMG_NULL)
7232 +       {
7233 +               PVR_DPF((PVR_DBG_ERROR,
7234 +                               "PVRSRVDriverProbe(pDevice=%p): no memory for class device instance.",
7235 +                               pDevice));
7236 +
7237 +               return -ENOMEM;
7238 +       }
7239 +
7240 +       memset(pClassDevice, 0, sizeof(*pClassDevice));
7241 +
7242 +       pDevice->dev.driver_data = (void *)pClassDevice;
7243 +
7244 +
7245 +       strncpy(pClassDevice->class_id, DEVNAME, BUS_ID_SIZE);
7246 +
7247 +       pClassDevice->class = &powervr_class;
7248 +       pClassDevice->dev = &pDevice->dev;
7249 +
7250 +
7251 +       if ((error = class_device_register(pClassDevice)) != 0)
7252 +       {
7253 +               kfree(pClassDevice);
7254 +
7255 +               PVR_DPF((PVR_DBG_ERROR,
7256 +                               "PVRSRVDriverProbe(pDevice=%p): class_device_register failed (%d)",
7257 +                               pDevice, error));
7258 +               return error;
7259 +       }
7260 +
7261 +       if ((error = class_device_create_file(pClassDevice, &class_device_attr_dev)) != 0)
7262 +       {
7263 +               PVR_DPF((PVR_DBG_ERROR,
7264 +                               "PVRSRVDriverProbe(pDevice=%p): class_device_create_file failed (%d)",
7265 +                               pDevice, error));
7266 +               return error;
7267 +       }*/
7268
7269  #if 0
7270
7271 @@ -149,37 +269,34 @@
7272
7273         if (SysAcquireData(&psSysData) != PVRSRV_OK)
7274         {
7275 +               gpsPVRLDMDev = pDevice;
7276 +
7277                 if (SysInitialise() != PVRSRV_OK)
7278                 {
7279                         return -ENODEV;
7280                 }
7281 -
7282 -               eError = PVRSRVResManConnect(RESMAN_KERNEL_PROCESSID, IMG_TRUE);
7283 -               if(eError != PVRSRV_OK)
7284 -               {
7285 -                       PVR_DPF((PVR_DBG_ERROR,"PVRSRVDriverProbe: Failed to connect to resource manager"));
7286 -                       error = -ENODEV;
7287 -               }
7288         }
7289
7290         return 0;
7291  }
7292
7293
7294 -static int PVRSRVDriverRemove(struct platform_device *pDevice)
7295 +#if defined (LDM_PLATFORM)
7296 +static int PVRSRVDriverRemove(LDM_DEV *pDevice)
7297 +#endif
7298 +#if defined(LDM_PCI)
7299 +static void __devexit PVRSRVDriverRemove(LDM_DEV *pDevice)
7300 +#endif
7301  {
7302         SYS_DATA *psSysData;
7303
7304 -       PVR_DPF((PVR_DBG_WARNING, "PVRSRVDriverRemove(pDevice=%p)", pDevice));
7305 +       PVR_TRACE(("PVRSRVDriverRemove(pDevice=%p)", pDevice));
7306
7307 -       if(PVRSRVResManConnect(RESMAN_KERNEL_PROCESSID, IMG_FALSE) != PVRSRV_OK)
7308 -       {
7309 -               return -EINVAL;
7310 -       }
7311 -
7312         if (SysAcquireData(&psSysData) == PVRSRV_OK)
7313         {
7314                 SysDeinitialise(psSysData);
7315 +
7316 +               gpsPVRLDMDev = IMG_NULL;
7317         }
7318
7319  #if 0
7320 @@ -189,68 +306,131 @@
7321         }
7322  #endif
7323
7324 +       //class_device_unregister((struct class_device *)pDevice->dev.driver_data);
7325 +
7326 +
7327 +       pDevice->dev.driver_data = 0;
7328
7329 +
7330 +#if defined (LDM_PLATFORM)
7331         return 0;
7332 +#endif
7333 +#if defined (LDM_PCI)
7334 +       return;
7335 +#endif
7336  }
7337
7338
7339 -static void PVRSRVDriverShutdown(struct platform_device *pDevice)
7340 +static void PVRSRVDriverShutdown(LDM_DEV *pDevice)
7341  {
7342 -       PVR_DPF((PVR_DBG_WARNING, "PVRSRVDriverShutdown(pDevice=%p)", pDevice));
7343 +       PVR_TRACE(("PVRSRVDriverShutdown(pDevice=%p)", pDevice));
7344
7345         (void) PVRSRVSetPowerStateKM(PVRSRV_POWER_STATE_D3);
7346  }
7347
7348
7349 -static int PVRSRVDriverSuspend(struct platform_device *pDevice, pm_message_t state)
7350 +static int PVRSRVDriverSuspend(LDM_DEV *pDevice, pm_message_t state)
7351  {
7352 -
7353 -       PVR_DPF((PVR_DBG_WARNING,
7354 -                       "PVRSRVDriverSuspend(pDevice=%p)",
7355 -                       pDevice));
7356 +#if !(defined(DEBUG) && defined(PVR_MANUAL_POWER_CONTROL))
7357 +       PVR_TRACE(( "PVRSRVDriverSuspend(pDevice=%p)", pDevice));
7358
7359         if (PVRSRVSetPowerStateKM(PVRSRV_POWER_STATE_D3) != PVRSRV_OK)
7360         {
7361                 return -EINVAL;
7362         }
7363 -
7364 +#endif
7365         return 0;
7366  }
7367
7368
7369 -static int PVRSRVDriverResume(struct platform_device *pDevice)
7370 +static int PVRSRVDriverResume(LDM_DEV *pDevice)
7371  {
7372 -       PVR_DPF((PVR_DBG_WARNING, "PVRSRVDriverResume(pDevice=%p)", pDevice));
7373 +#if !(defined(DEBUG) && defined(PVR_MANUAL_POWER_CONTROL))
7374 +       PVR_TRACE(("PVRSRVDriverResume(pDevice=%p)", pDevice));
7375
7376         if (PVRSRVSetPowerStateKM(PVRSRV_POWER_STATE_D0) != PVRSRV_OK)
7377         {
7378                 return -EINVAL;
7379         }
7380 -
7381 +#endif
7382         return 0;
7383  }
7384
7385
7386 +#if defined(LDM_PLATFORM)
7387  static void PVRSRVDeviceRelease(struct device *pDevice)
7388  {
7389         PVR_DPF((PVR_DBG_WARNING, "PVRSRVDeviceRelease(pDevice=%p)", pDevice));
7390  }
7391  #endif
7392 +#endif
7393 +
7394 +
7395 +#if defined(DEBUG) && defined(PVR_MANUAL_POWER_CONTROL)
7396 +static IMG_UINT32 gPVRPowerLevel;
7397 +
7398 +int PVRProcSetPowerLevel(struct file *file, const char *buffer, unsigned long count, void *data)
7399 +{
7400 +       char data_buffer[2];
7401 +       IMG_UINT32 PVRPowerLevel;
7402 +
7403 +       if (count != sizeof(data_buffer))
7404 +       {
7405 +               return -EINVAL;
7406 +       }
7407 +       else
7408 +       {
7409 +               if (copy_from_user(data_buffer, buffer, count))
7410 +                       return -EINVAL;
7411 +               if (data_buffer[count - 1] != '\n')
7412 +                       return -EINVAL;
7413 +               PVRPowerLevel = data_buffer[0] - '0';
7414 +               if (PVRPowerLevel != gPVRPowerLevel)
7415 +               {
7416 +                       if (PVRPowerLevel != 0)
7417 +                       {
7418 +                               if (PVRSRVSetPowerStateKM(PVRSRV_POWER_STATE_D3) != PVRSRV_OK)
7419 +                               {
7420 +                                       return -EINVAL;
7421 +                               }
7422 +                       }
7423 +                       else
7424 +                       {
7425 +                               if (PVRSRVSetPowerStateKM(PVRSRV_POWER_STATE_D0) != PVRSRV_OK)
7426 +                               {
7427 +                                       return -EINVAL;
7428 +                               }
7429 +                       }
7430 +
7431 +                       gPVRPowerLevel = PVRPowerLevel;
7432 +               }
7433 +       }
7434 +       return (count);
7435 +}
7436 +
7437 +int PVRProcGetPowerLevel(char *page, char **start, off_t off, int count, int *eof, void *data)
7438 +{
7439 +       if (off == 0) {
7440 +               *start = (char *)1;
7441 +               return printAppend(page, count, 0, "%lu\n", gPVRPowerLevel);
7442 +       }
7443 +       *eof = 1;
7444 +       return 0;
7445 +}
7446 +#endif
7447
7448  static int PVRSRVOpen(struct inode unref__ * pInode, struct file unref__ * pFile)
7449  {
7450         int Ret = 0;
7451
7452 -       PVR_DPF((PVR_DBG_MESSAGE, "PVRSRVOpen"));
7453 -
7454 -    LinuxLockMutex(&gPVRSRVLock);
7455 +       LinuxLockMutex(&gPVRSRVLock);
7456
7457         if (PVRSRVResManConnect(PVRSRVRESMAN_PROCESSID_FIND, IMG_TRUE) != PVRSRV_OK)
7458         {
7459                 Ret = -ENOMEM;
7460         }
7461
7462 -    LinuxUnLockMutex(&gPVRSRVLock);
7463 +       LinuxUnLockMutex(&gPVRSRVLock);
7464
7465         return Ret;
7466  }
7467 @@ -260,8 +440,6 @@
7468  {
7469         int Ret = 0;
7470
7471 -       PVR_DPF((PVR_DBG_MESSAGE, "PVRSRVRelease"));
7472 -
7473         if (PVRSRVResManConnect(PVRSRVRESMAN_PROCESSID_FIND, IMG_FALSE) != PVRSRV_OK)
7474         {
7475                 Ret = -ENOMEM;
7476 @@ -274,9 +452,12 @@
7477  static int __init PVRCore_Init(void)
7478  {
7479         int error;
7480 -#if !defined(LDM_PLATFORM)
7481 +#if !(defined(LDM_PLATFORM) || defined(LDM_PCI))
7482         PVRSRV_ERROR eError;
7483 -#endif
7484 +#endif
7485 +
7486 +       PVR_TRACE(("PVRCore_Init"));
7487 +
7488
7489         AssignedMajorNumber = register_chrdev(0, DEVNAME, &pvrsrv_fops);
7490
7491 @@ -287,7 +468,7 @@
7492                 return -EBUSY;
7493         }
7494
7495 -       PVR_DPF((PVR_DBG_WARNING, "PVRCore_Init: major device %d", AssignedMajorNumber));
7496 +       PVR_TRACE(("PVRCore_Init: major device %d", AssignedMajorNumber));
7497
7498
7499         if (CreateProcEntries ())
7500 @@ -313,9 +494,19 @@
7501
7502         PVRMMapInit();
7503
7504 +#if defined(LDM_PLATFORM) || defined(LDM_PCI)
7505 +       /*if ((error = class_register(&powervr_class)) != 0)
7506 +       {
7507 +               PVR_DPF((PVR_DBG_ERROR, "PVRCore_Init: unable to register class (%d)", error));
7508 +
7509 +               goto init_failed;
7510 +       }*/
7511 +
7512  #if defined(LDM_PLATFORM)
7513         if ((error = platform_driver_register(&powervr_driver)) != 0)
7514         {
7515 +               //class_unregister(&powervr_class);
7516 +
7517                 PVR_DPF((PVR_DBG_ERROR, "PVRCore_Init: unable to register platform driver (%d)", error));
7518
7519                 goto init_failed;
7520 @@ -324,11 +515,25 @@
7521         if ((error = platform_device_register(&powervr_device)) != 0)
7522         {
7523                 platform_driver_unregister(&powervr_driver);
7524 +               //class_unregister(&powervr_class);
7525
7526                 PVR_DPF((PVR_DBG_ERROR, "PVRCore_Init: unable to register platform device (%d)", error));
7527
7528                 goto init_failed;
7529         }
7530 +#endif
7531 +
7532 +#if defined(LDM_PCI)
7533 +       if ((error = pci_register_driver(&powervr_driver)) != 0)
7534 +       {
7535 +               //class_unregister(&powervr_class);
7536 +
7537 +               PVR_DPF((PVR_DBG_ERROR, "PVRCore_Init: unable to register PCI driver (%d)", error));
7538 +
7539 +               goto init_failed;
7540 +       }
7541 +#endif
7542 +
7543  #else
7544
7545         if ((eError = SysInitialise()) != PVRSRV_OK)
7546 @@ -343,20 +548,12 @@
7547  #endif
7548                 goto init_failed;
7549         }
7550 -
7551 -       eError = PVRSRVResManConnect(RESMAN_KERNEL_PROCESSID, IMG_TRUE);
7552 -       if(eError != PVRSRV_OK)
7553 -       {
7554 -               PVR_DPF((PVR_DBG_ERROR,"PVRCore_Init: Failed to connect to resource manager"));
7555 -               error = -ENODEV;
7556 -               goto init_failed;
7557 -       }
7558  #endif
7559 +
7560         return 0;
7561
7562  init_failed:
7563
7564 -       (void) PVRSRVResManConnect(RESMAN_KERNEL_PROCESSID, IMG_FALSE);
7565         PVRMMapCleanup();
7566         LinuxMMCleanup();
7567         RemoveProcEntries();
7568 @@ -370,23 +567,34 @@
7569  static void __exit PVRCore_Cleanup(void)
7570  {
7571         SYS_DATA *psSysData;
7572 -#if !defined(LDM_PLATFORM)
7573 +#if !(defined(LDM_PLATFORM) || defined (LDM_PCI))
7574         PVRSRV_ERROR eError;
7575 -#endif
7576 +#endif
7577 +
7578 +       PVR_TRACE(("PVRCore_Cleanup"));
7579
7580         SysAcquireData(&psSysData);
7581 -       unregister_chrdev(AssignedMajorNumber, DRVNAME);
7582
7583 +       /*if (unregister_chrdev(AssignedMajorNumber, DRVNAME))
7584 +       {
7585 +               PVR_DPF((PVR_DBG_ERROR," can't unregister device major %d", AssignedMajorNumber));
7586 +       }*/
7587 +       unregister_chrdev(AssignedMajorNumber, DRVNAME);
7588 +
7589 +#if defined(LDM_PLATFORM) || defined(LDM_PCI)
7590 +
7591 +#if defined(LDM_PCI)
7592 +       pci_unregister_driver(&powervr_driver);
7593 +#endif
7594 +
7595  #if defined (LDM_PLATFORM)
7596         platform_device_unregister(&powervr_device);
7597         platform_driver_unregister(&powervr_driver);
7598 -#else
7599 -       eError = PVRSRVResManConnect(RESMAN_KERNEL_PROCESSID, IMG_FALSE);
7600 -       if (eError != PVRSRV_OK)
7601 -       {
7602 -               PVR_DPF((PVR_DBG_ERROR,"KernelResManDisconnect: Failed to disconnect"));
7603 -       }
7604 +#endif
7605
7606 +       //class_unregister(&powervr_class);
7607 +
7608 +#else
7609
7610         SysDeinitialise(psSysData);
7611  #endif
7612 @@ -399,7 +607,7 @@
7613
7614         RemoveProcEntries();
7615
7616 -       PVR_DPF((PVR_DBG_WARNING,"unloading"));
7617 +       PVR_TRACE(("PVRCore_Cleanup: unloading"));
7618  }
7619
7620  module_init(PVRCore_Init);
7621 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/env/linux/osfunc.c git/drivers/gpu/pvr/services4/srvkm/env/linux/osfunc.c
7622 --- git/drivers/gpu/pvr/services4/srvkm/env/linux/osfunc.c      2009-01-05 20:00:44.000000000 +0100
7623 +++ git/drivers/gpu/pvr/services4/srvkm/env/linux/osfunc.c      2008-12-18 15:47:29.000000000 +0100
7624 @@ -56,6 +56,9 @@
7625  #include "env_data.h"
7626  #include "proc.h"
7627  #include "mutex.h"
7628 +#include "event.h"
7629 +
7630 +#define EVENT_OBJECT_TIMEOUT_MS                (100)
7631
7632  extern PVRSRV_LINUX_MUTEX gPVRSRVLock;
7633
7634 @@ -411,9 +414,6 @@
7635         psEnvData->bLISRInstalled = IMG_FALSE;
7636
7637
7638 -       psEnvData->psPCIDev = NULL;
7639 -
7640 -
7641         *ppvEnvSpecificData = psEnvData;
7642
7643         return PVRSRV_OK;
7644 @@ -426,7 +426,6 @@
7645
7646         PVR_ASSERT(!psEnvData->bMISRInstalled);
7647         PVR_ASSERT(!psEnvData->bLISRInstalled);
7648 -       PVR_ASSERT(psEnvData->psPCIDev == NULL);
7649
7650         OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP, 0x1000, psEnvData->pvBridgeData, IMG_NULL);
7651
7652 @@ -1189,57 +1188,62 @@
7653  }
7654
7655  #if defined(CONFIG_PCI) && (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0))
7656 -PVRSRV_ERROR OSPCIAcquireDev(IMG_VOID *pvSysData, IMG_UINT16 ui16VendorID, IMG_UINT16 ui16DeviceID, HOST_PCI_INIT_FLAGS eFlags)
7657 +
7658 +IMG_HANDLE OSPCISetDev(IMG_VOID *pvPCICookie, HOST_PCI_INIT_FLAGS eFlags)
7659  {
7660 -       SYS_DATA *psSysData = (SYS_DATA *)pvSysData;
7661 -       ENV_DATA *psEnvData = (ENV_DATA *)psSysData->pvEnvSpecificData;
7662         int err;
7663         IMG_UINT32 i;
7664 +       PVR_PCI_DEV *psPVRPCI;
7665
7666 -       if (psEnvData->psPCIDev != NULL)
7667 -       {
7668 -               PVR_DPF((PVR_DBG_ERROR, "OSPCIAcquireDev: A device has already been acquired"));
7669 -               return PVRSRV_ERROR_GENERIC;
7670 -       }
7671 +       PVR_TRACE(("OSPCISetDev"));
7672
7673 -       psEnvData->psPCIDev = pci_get_device(ui16VendorID, ui16DeviceID, psEnvData->psPCIDev);
7674 -       if (psEnvData->psPCIDev == NULL)
7675 +       if(OSAllocMem(PVRSRV_OS_PAGEABLE_HEAP, sizeof(*psPVRPCI), (IMG_VOID *)&psPVRPCI, IMG_NULL) != PVRSRV_OK)
7676         {
7677 -               PVR_DPF((PVR_DBG_ERROR, "OSPCIAcquireDev: Couldn't acquire device"));
7678 -               return PVRSRV_ERROR_GENERIC;
7679 +               PVR_DPF((PVR_DBG_ERROR, "OSPCISetDev: Couldn't allocate PVR PCI structure"));
7680 +               return IMG_NULL;
7681         }
7682
7683 -       err = pci_enable_device(psEnvData->psPCIDev);
7684 +       psPVRPCI->psPCIDev = (struct pci_dev *)pvPCICookie;
7685 +       psPVRPCI->ePCIFlags = eFlags;
7686 +
7687 +       err = pci_enable_device(psPVRPCI->psPCIDev);
7688         if (err != 0)
7689         {
7690 -               PVR_DPF((PVR_DBG_ERROR, "OSPCIAcquireDev: Couldn't enable device (%d)", err));
7691 -               return PVRSRV_ERROR_GENERIC;
7692 +               PVR_DPF((PVR_DBG_ERROR, "OSPCISetDev: Couldn't enable device (%d)", err));
7693 +               return IMG_NULL;
7694         }
7695
7696 -       if (eFlags & HOST_PCI_INIT_FLAG_BUS_MASTER)
7697 -               pci_set_master(psEnvData->psPCIDev);
7698 +       if (psPVRPCI->ePCIFlags & HOST_PCI_INIT_FLAG_BUS_MASTER)
7699 +               pci_set_master(psPVRPCI->psPCIDev);
7700
7701
7702         for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
7703         {
7704 -               psEnvData->abPCIResourceInUse[i] = IMG_FALSE;
7705 +               psPVRPCI->abPCIResourceInUse[i] = IMG_FALSE;
7706         }
7707
7708 -       return PVRSRV_OK;
7709 +       return (IMG_HANDLE)psPVRPCI;
7710  }
7711
7712 -PVRSRV_ERROR OSPCIIRQ(IMG_VOID *pvSysData, IMG_UINT32 *pui32IRQ)
7713 +IMG_HANDLE OSPCIAcquireDev(IMG_UINT16 ui16VendorID, IMG_UINT16 ui16DeviceID, HOST_PCI_INIT_FLAGS eFlags)
7714  {
7715 -       SYS_DATA *psSysData = (SYS_DATA *)pvSysData;
7716 -       ENV_DATA *psEnvData = (ENV_DATA *)psSysData->pvEnvSpecificData;
7717 +       struct pci_dev *psPCIDev;
7718
7719 -       if (psEnvData->psPCIDev == NULL)
7720 +       psPCIDev = pci_get_device(ui16VendorID, ui16DeviceID, NULL);
7721 +       if (psPCIDev == NULL)
7722         {
7723 -               PVR_DPF((PVR_DBG_ERROR, "OSPCIIRQ: Device hasn't been acquired"));
7724 -               return PVRSRV_ERROR_GENERIC;
7725 +               PVR_DPF((PVR_DBG_ERROR, "OSPCIAcquireDev: Couldn't acquire device"));
7726 +               return IMG_NULL;
7727         }
7728
7729 -       *pui32IRQ = psEnvData->psPCIDev->irq;
7730 +       return OSPCISetDev((IMG_VOID *)psPCIDev, eFlags);
7731 +}
7732 +
7733 +PVRSRV_ERROR OSPCIIRQ(IMG_HANDLE hPVRPCI, IMG_UINT32 *pui32IRQ)
7734 +{
7735 +       PVR_PCI_DEV *psPVRPCI = (PVR_PCI_DEV *)hPVRPCI;
7736 +
7737 +       *pui32IRQ = psPVRPCI->psPCIDev->irq;
7738
7739         return PVRSRV_OK;
7740  }
7741 @@ -1254,19 +1258,12 @@
7742  };
7743
7744  static IMG_UINT32 OSPCIAddrRangeFunc(enum HOST_PCI_ADDR_RANGE_FUNC eFunc,
7745 -                                                                        IMG_VOID *pvSysData,
7746 +                                                                        IMG_HANDLE hPVRPCI,
7747                                                                          IMG_UINT32 ui32Index
7748
7749  )
7750  {
7751 -       SYS_DATA *psSysData = (SYS_DATA *)pvSysData;
7752 -       ENV_DATA *psEnvData = (ENV_DATA *)psSysData->pvEnvSpecificData;
7753 -
7754 -       if (psEnvData->psPCIDev == NULL)
7755 -       {
7756 -               PVR_DPF((PVR_DBG_ERROR, "OSPCIAddrRangeFunc: Device hasn't been acquired"));
7757 -               return 0;
7758 -       }
7759 +       PVR_PCI_DEV *psPVRPCI = (PVR_PCI_DEV *)hPVRPCI;
7760
7761         if (ui32Index >= DEVICE_COUNT_RESOURCE)
7762         {
7763 @@ -1278,32 +1275,32 @@
7764         switch (eFunc)
7765         {
7766                 case HOST_PCI_ADDR_RANGE_FUNC_LEN:
7767 -                       return pci_resource_len(psEnvData->psPCIDev, ui32Index);
7768 +                       return pci_resource_len(psPVRPCI->psPCIDev, ui32Index);
7769                 case HOST_PCI_ADDR_RANGE_FUNC_START:
7770 -                       return pci_resource_start(psEnvData->psPCIDev, ui32Index);
7771 +                       return pci_resource_start(psPVRPCI->psPCIDev, ui32Index);
7772                 case HOST_PCI_ADDR_RANGE_FUNC_END:
7773 -                       return pci_resource_end(psEnvData->psPCIDev, ui32Index);
7774 +                       return pci_resource_end(psPVRPCI->psPCIDev, ui32Index);
7775                 case HOST_PCI_ADDR_RANGE_FUNC_REQUEST:
7776                 {
7777
7778
7779  #ifdef FIXME
7780                         int err;
7781 -                       err = pci_request_region(psEnvData->psPCIDev, ui32Index, "PowerVR");
7782 +                       err = pci_request_region(psPVRPCI->psPCIDev, ui32Index, "PowerVR");
7783                         if (err != 0)
7784                         {
7785                                 PVR_DPF((PVR_DBG_ERROR, "OSPCIAddrRangeFunc: pci_request_region_failed (%d)", err));
7786                                 return 0;
7787                         }
7788  #endif
7789 -                       psEnvData->abPCIResourceInUse[ui32Index] = IMG_TRUE;
7790 +                       psPVRPCI->abPCIResourceInUse[ui32Index] = IMG_TRUE;
7791                         return 1;
7792                 }
7793                 case HOST_PCI_ADDR_RANGE_FUNC_RELEASE:
7794 -                       if (psEnvData->abPCIResourceInUse[ui32Index])
7795 +                       if (psPVRPCI->abPCIResourceInUse[ui32Index])
7796                         {
7797 -                               pci_release_region(psEnvData->psPCIDev, ui32Index);
7798 -                               psEnvData->abPCIResourceInUse[ui32Index] = IMG_FALSE;
7799 +                               pci_release_region(psPVRPCI->psPCIDev, ui32Index);
7800 +                               psPVRPCI->abPCIResourceInUse[ui32Index] = IMG_FALSE;
7801                         }
7802                         return 1;
7803                 default:
7804 @@ -1314,62 +1311,160 @@
7805         return 0;
7806  }
7807
7808 -IMG_UINT32 OSPCIAddrRangeLen(IMG_VOID *pvSysData, IMG_UINT32 ui32Index)
7809 +IMG_UINT32 OSPCIAddrRangeLen(IMG_HANDLE hPVRPCI, IMG_UINT32 ui32Index)
7810  {
7811 -       return OSPCIAddrRangeFunc(HOST_PCI_ADDR_RANGE_FUNC_LEN, pvSysData, ui32Index);
7812 +       return OSPCIAddrRangeFunc(HOST_PCI_ADDR_RANGE_FUNC_LEN, hPVRPCI, ui32Index);
7813  }
7814
7815 -IMG_UINT32 OSPCIAddrRangeStart(IMG_VOID *pvSysData, IMG_UINT32 ui32Index)
7816 +IMG_UINT32 OSPCIAddrRangeStart(IMG_HANDLE hPVRPCI, IMG_UINT32 ui32Index)
7817  {
7818 -       return OSPCIAddrRangeFunc(HOST_PCI_ADDR_RANGE_FUNC_START, pvSysData, ui32Index);
7819 +       return OSPCIAddrRangeFunc(HOST_PCI_ADDR_RANGE_FUNC_START, hPVRPCI, ui32Index);
7820  }
7821
7822 -IMG_UINT32 OSPCIAddrRangeEnd(IMG_VOID *pvSysData, IMG_UINT32 ui32Index)
7823 +IMG_UINT32 OSPCIAddrRangeEnd(IMG_HANDLE hPVRPCI, IMG_UINT32 ui32Index)
7824  {
7825 -       return OSPCIAddrRangeFunc(HOST_PCI_ADDR_RANGE_FUNC_END, pvSysData, ui32Index);
7826 +       return OSPCIAddrRangeFunc(HOST_PCI_ADDR_RANGE_FUNC_END, hPVRPCI, ui32Index);
7827  }
7828
7829 -PVRSRV_ERROR OSPCIRequestAddrRange(IMG_VOID *pvSysData,
7830 -                                                                  IMG_UINT32 ui32Index
7831 -
7832 -)
7833 +PVRSRV_ERROR OSPCIRequestAddrRange(IMG_HANDLE hPVRPCI,
7834 +                                                                  IMG_UINT32 ui32Index)
7835  {
7836 -       return OSPCIAddrRangeFunc(HOST_PCI_ADDR_RANGE_FUNC_REQUEST, pvSysData, ui32Index) == 0 ? PVRSRV_ERROR_GENERIC : PVRSRV_OK;
7837 +       return OSPCIAddrRangeFunc(HOST_PCI_ADDR_RANGE_FUNC_REQUEST, hPVRPCI, ui32Index) == 0 ? PVRSRV_ERROR_GENERIC : PVRSRV_OK;
7838  }
7839
7840 -PVRSRV_ERROR OSPCIReleaseAddrRange(IMG_VOID *pvSysData, IMG_UINT32 ui32Index)
7841 +PVRSRV_ERROR OSPCIReleaseAddrRange(IMG_HANDLE hPVRPCI, IMG_UINT32 ui32Index)
7842  {
7843 -       return OSPCIAddrRangeFunc(HOST_PCI_ADDR_RANGE_FUNC_RELEASE, pvSysData, ui32Index) == 0 ? PVRSRV_ERROR_GENERIC : PVRSRV_OK;
7844 +       return OSPCIAddrRangeFunc(HOST_PCI_ADDR_RANGE_FUNC_RELEASE, hPVRPCI, ui32Index) == 0 ? PVRSRV_ERROR_GENERIC : PVRSRV_OK;
7845  }
7846
7847 -PVRSRV_ERROR OSPCIReleaseDev(IMG_VOID *pvSysData)
7848 +PVRSRV_ERROR OSPCIReleaseDev(IMG_HANDLE hPVRPCI)
7849  {
7850 -       SYS_DATA *psSysData = (SYS_DATA *)pvSysData;
7851 -       ENV_DATA *psEnvData = (ENV_DATA *)psSysData->pvEnvSpecificData;
7852 +       PVR_PCI_DEV *psPVRPCI = (PVR_PCI_DEV *)hPVRPCI;
7853         int i;
7854
7855 -       if (psEnvData->psPCIDev == NULL)
7856 +       PVR_TRACE(("OSPCIReleaseDev"));
7857 +
7858 +
7859 +       for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
7860         {
7861 -               return PVRSRV_OK;
7862 +               if (psPVRPCI->abPCIResourceInUse[i])
7863 +               {
7864 +                       PVR_TRACE(("OSPCIReleaseDev: Releasing Address range %d", i));
7865 +                       pci_release_region(psPVRPCI->psPCIDev, i);
7866 +                       psPVRPCI->abPCIResourceInUse[i] = IMG_FALSE;
7867 +               }
7868         }
7869
7870 +       pci_disable_device(psPVRPCI->psPCIDev);
7871 +
7872 +       OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP, sizeof(*psPVRPCI), (IMG_VOID *)psPVRPCI, IMG_NULL);
7873 +
7874 +       return PVRSRV_OK;
7875 +}
7876 +
7877 +PVRSRV_ERROR OSPCISuspendDev(IMG_HANDLE hPVRPCI)
7878 +{
7879 +       PVR_PCI_DEV *psPVRPCI = (PVR_PCI_DEV *)hPVRPCI;
7880 +       int i;
7881 +       int err;
7882 +
7883 +       PVR_TRACE(("OSPCISuspendDev"));
7884 +
7885
7886         for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
7887         {
7888 -               if (psEnvData->abPCIResourceInUse[i])
7889 +               if (psPVRPCI->abPCIResourceInUse[i])
7890                 {
7891 -                       PVR_TRACE(("OSPCIReleaseDev: Releasing Address range %d", i));
7892 -                       pci_release_region(psEnvData->psPCIDev, i);
7893 -                       psEnvData->abPCIResourceInUse[i] = IMG_FALSE;
7894 +                       pci_release_region(psPVRPCI->psPCIDev, i);
7895                 }
7896         }
7897
7898 -       pci_disable_device(psEnvData->psPCIDev);
7899 +       err = pci_save_state(psPVRPCI->psPCIDev);
7900 +       if (err != 0)
7901 +       {
7902 +               PVR_DPF((PVR_DBG_ERROR, "OSPCISuspendDev: pci_save_state_failed (%d)", err));
7903 +               return PVRSRV_ERROR_GENERIC;
7904 +       }
7905
7906 -       psEnvData->psPCIDev = NULL;
7907 +       pci_disable_device(psPVRPCI->psPCIDev);
7908 +
7909 +       err = pci_set_power_state(psPVRPCI->psPCIDev, PCI_D3cold);
7910 +       switch(err)
7911 +       {
7912 +               case 0:
7913 +                       break;
7914 +               case -EIO:
7915 +                       PVR_DPF((PVR_DBG_WARNING, "OSPCISuspendDev: device doesn't support PCI PM"));
7916 +                       break;
7917 +               case -EINVAL:
7918 +                       PVR_DPF((PVR_DBG_ERROR, "OSPCISuspendDev: can't enter requested power state"));
7919 +                       break;
7920 +               default:
7921 +                       PVR_DPF((PVR_DBG_ERROR, "OSPCISuspendDev: pci_set_power_state failed (%d)", err));
7922 +                       break;
7923 +       }
7924
7925         return PVRSRV_OK;
7926  }
7927 +
7928 +PVRSRV_ERROR OSPCIResumeDev(IMG_HANDLE hPVRPCI)
7929 +{
7930 +       PVR_PCI_DEV *psPVRPCI = (PVR_PCI_DEV *)hPVRPCI;
7931 +       int err;
7932 +       int i;
7933 +
7934 +       PVR_TRACE(("OSPCIResumeDev"));
7935 +
7936 +       err = pci_set_power_state(psPVRPCI->psPCIDev, PCI_D0);
7937 +       switch(err)
7938 +       {
7939 +               case 0:
7940 +                       break;
7941 +               case -EIO:
7942 +                       PVR_DPF((PVR_DBG_WARNING, "OSPCIResumeDev: device doesn't support PCI PM"));
7943 +                       break;
7944 +               case -EINVAL:
7945 +                       PVR_DPF((PVR_DBG_ERROR, "OSPCIResumeDev: can't enter requested power state"));
7946 +                       return PVRSRV_ERROR_GENERIC;
7947 +               default:
7948 +                       PVR_DPF((PVR_DBG_ERROR, "OSPCIResumeDev: pci_set_power_state failed (%d)", err));
7949 +                       return PVRSRV_ERROR_GENERIC;
7950 +       }
7951 +
7952 +       err = pci_restore_state(psPVRPCI->psPCIDev);
7953 +       if (err != 0)
7954 +       {
7955 +               PVR_DPF((PVR_DBG_ERROR, "OSPCIResumeDev: pci_restore_state failed (%d)", err));
7956 +               return PVRSRV_ERROR_GENERIC;
7957 +       }
7958 +
7959 +       err = pci_enable_device(psPVRPCI->psPCIDev);
7960 +       if (err != 0)
7961 +       {
7962 +               PVR_DPF((PVR_DBG_ERROR, "OSPCIResumeDev: Couldn't enable device (%d)", err));
7963 +               return PVRSRV_ERROR_GENERIC;
7964 +       }
7965 +
7966 +       if (psPVRPCI->ePCIFlags & HOST_PCI_INIT_FLAG_BUS_MASTER)
7967 +               pci_set_master(psPVRPCI->psPCIDev);
7968 +
7969 +
7970 +       for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
7971 +       {
7972 +               if (psPVRPCI->abPCIResourceInUse[i])
7973 +               {
7974 +                       err = pci_request_region(psPVRPCI->psPCIDev, i, "PowerVR");
7975 +                       if (err != 0)
7976 +                       {
7977 +                               PVR_DPF((PVR_DBG_ERROR, "OSPCIResumeDev: pci_request_region_failed (region %d, error %d)", i, err));
7978 +                       }
7979 +               }
7980 +
7981 +       }
7982 +
7983 +       return PVRSRV_OK;
7984 +}
7985 +
7986  #endif
7987
7988  typedef struct TIMER_CALLBACK_DATA_TAG
7989 @@ -1418,7 +1513,7 @@
7990
7991         psTimerCBData->pfnTimerFunc = pfnTimerFunc;
7992         psTimerCBData->pvData = pvData;
7993 -       psTimerCBData->bActive = IMG_TRUE;
7994 +       psTimerCBData->bActive = IMG_FALSE;
7995
7996
7997
7998 @@ -1434,14 +1529,36 @@
7999         psTimerCBData->sTimer.data = (IMG_UINT32)psTimerCBData;
8000         psTimerCBData->sTimer.expires = psTimerCBData->ui32Delay + jiffies;
8001
8002 +       return (IMG_HANDLE)psTimerCBData;
8003 +}
8004 +
8005 +
8006 +PVRSRV_ERROR OSRemoveTimer (IMG_HANDLE hTimer)
8007 +{
8008 +       TIMER_CALLBACK_DATA     *psTimerCBData = (TIMER_CALLBACK_DATA*)hTimer;
8009 +
8010 +
8011 +       OSFreeMem(PVRSRV_OS_NON_PAGEABLE_HEAP, sizeof(TIMER_CALLBACK_DATA), psTimerCBData, IMG_NULL);
8012 +
8013 +       return PVRSRV_OK;
8014 +}
8015 +
8016 +
8017 +PVRSRV_ERROR OSEnableTimer (IMG_HANDLE hTimer)
8018 +{
8019 +       TIMER_CALLBACK_DATA     *psTimerCBData = (TIMER_CALLBACK_DATA*)hTimer;
8020 +
8021 +
8022 +       psTimerCBData->bActive = IMG_TRUE;
8023 +
8024
8025         add_timer(&psTimerCBData->sTimer);
8026
8027 -       return (IMG_HANDLE)psTimerCBData;
8028 +       return PVRSRV_OK;
8029  }
8030
8031
8032 -PVRSRV_ERROR OSRemoveTimer (IMG_HANDLE hTimer)
8033 +PVRSRV_ERROR OSDisableTimer (IMG_HANDLE hTimer)
8034  {
8035         TIMER_CALLBACK_DATA     *psTimerCBData = (TIMER_CALLBACK_DATA*)hTimer;
8036
8037 @@ -1451,21 +1568,17 @@
8038
8039         del_timer_sync(&psTimerCBData->sTimer);
8040
8041 -
8042 -       OSFreeMem(PVRSRV_OS_NON_PAGEABLE_HEAP, sizeof(TIMER_CALLBACK_DATA), psTimerCBData, IMG_NULL);
8043 -
8044         return PVRSRV_OK;
8045  }
8046
8047
8048  PVRSRV_ERROR OSEventObjectCreate(const IMG_CHAR *pszName, PVRSRV_EVENTOBJECT *psEventObject)
8049  {
8050 +
8051         PVRSRV_ERROR eError = PVRSRV_OK;
8052
8053         if(psEventObject)
8054         {
8055 -               struct completion *psCompletion;
8056 -
8057                 if(pszName)
8058                 {
8059
8060 @@ -1478,26 +1591,20 @@
8061                         snprintf(psEventObject->szName, EVENTOBJNAME_MAXLENGTH, "PVRSRV_EVENTOBJECT_%d", ui16NameIndex++);
8062                 }
8063
8064 -
8065 -               if(OSAllocMem(PVRSRV_OS_NON_PAGEABLE_HEAP,
8066 -                                       sizeof(struct completion),
8067 -                                       (IMG_VOID **)&psCompletion, IMG_NULL) != PVRSRV_OK)
8068 +               if(LinuxEventObjectListCreate(&psEventObject->hOSEventKM) != PVRSRV_OK)
8069                 {
8070 -                       PVR_DPF((PVR_DBG_ERROR, "OSEventObjectCreate: failed to allocate memory for completion variable"));
8071 -                       return PVRSRV_ERROR_OUT_OF_MEMORY;
8072 +                        eError = PVRSRV_ERROR_OUT_OF_MEMORY;
8073                 }
8074
8075 -               init_completion(psCompletion);
8076 -
8077 -               psEventObject->hOSEventKM = (IMG_HANDLE) psCompletion;
8078         }
8079         else
8080         {
8081          PVR_DPF((PVR_DBG_ERROR, "OSEventObjectCreate: psEventObject is not a valid pointer"));
8082 -        eError = PVRSRV_ERROR_INVALID_PARAMS;
8083 +               eError = PVRSRV_ERROR_GENERIC;
8084         }
8085
8086         return eError;
8087 +
8088  }
8089
8090
8091 @@ -1509,8 +1616,7 @@
8092         {
8093                 if(psEventObject->hOSEventKM)
8094                 {
8095 -                       struct completion *psCompletion = (struct completion *) psEventObject->hOSEventKM;
8096 -                       OSFreeMem(PVRSRV_OS_NON_PAGEABLE_HEAP, sizeof(struct completion), psCompletion, IMG_NULL);
8097 +                       LinuxEventObjectListDestroy(psEventObject->hOSEventKM);
8098                 }
8099                 else
8100                 {
8101 @@ -1527,19 +1633,13 @@
8102         return eError;
8103  }
8104
8105 -PVRSRV_ERROR OSEventObjectWait(IMG_HANDLE hOSEventKM, IMG_UINT32 ui32MSTimeout)
8106 +PVRSRV_ERROR OSEventObjectWait(IMG_HANDLE hOSEventKM)
8107  {
8108         PVRSRV_ERROR eError = PVRSRV_OK;
8109
8110         if(hOSEventKM)
8111         {
8112 -               LinuxUnLockMutex(&gPVRSRVLock);
8113 -#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,10))
8114 -               wait_for_completion_timeout((struct completion *)hOSEventKM, msecs_to_jiffies(ui32MSTimeout));
8115 -#else
8116 -               wait_for_completion((struct completion *)hOSEventKM);
8117 -#endif
8118 -               LinuxLockMutex(&gPVRSRVLock);
8119 +               eError = LinuxEventObjectWait(hOSEventKM, EVENT_OBJECT_TIMEOUT_MS);
8120         }
8121         else
8122         {
8123 @@ -1550,13 +1650,60 @@
8124         return eError;
8125  }
8126
8127 +PVRSRV_ERROR OSEventObjectOpen(PVRSRV_EVENTOBJECT *psEventObject,
8128 +                                                                                       IMG_HANDLE *phOSEvent)
8129 +{
8130 +       PVRSRV_ERROR eError = PVRSRV_OK;
8131 +
8132 +       if(psEventObject)
8133 +       {
8134 +               if(LinuxEventObjectAdd(psEventObject->hOSEventKM, phOSEvent) != PVRSRV_OK)
8135 +               {
8136 +                       PVR_DPF((PVR_DBG_ERROR, "LinuxEventObjectAdd: failed"));
8137 +               eError = PVRSRV_ERROR_INVALID_PARAMS;
8138 +               }
8139 +
8140 +       }
8141 +       else
8142 +       {
8143 +        PVR_DPF((PVR_DBG_ERROR, "OSEventObjectCreate: psEventObject is not a valid pointer"));
8144 +        eError = PVRSRV_ERROR_INVALID_PARAMS;
8145 +       }
8146 +
8147 +       return eError;
8148 +}
8149 +
8150 +PVRSRV_ERROR OSEventObjectClose(PVRSRV_EVENTOBJECT *psEventObject,
8151 +                                                                                       IMG_HANDLE hOSEventKM)
8152 +{
8153 +       PVRSRV_ERROR eError = PVRSRV_OK;
8154 +
8155 +       if(psEventObject)
8156 +       {
8157 +               if(LinuxEventObjectDelete(psEventObject->hOSEventKM, hOSEventKM, IMG_FALSE) != PVRSRV_OK)
8158 +               {
8159 +                       PVR_DPF((PVR_DBG_ERROR, "LinuxEventObjectDelete: failed"));
8160 +               eError = PVRSRV_ERROR_INVALID_PARAMS;
8161 +               }
8162 +
8163 +       }
8164 +       else
8165 +       {
8166 +        PVR_DPF((PVR_DBG_ERROR, "OSEventObjectDestroy: psEventObject is not a valid pointer"));
8167 +        eError = PVRSRV_ERROR_INVALID_PARAMS;
8168 +       }
8169 +
8170 +       return eError;
8171 +
8172 +}
8173 +
8174  PVRSRV_ERROR OSEventObjectSignal(IMG_HANDLE hOSEventKM)
8175  {
8176         PVRSRV_ERROR eError = PVRSRV_OK;
8177
8178         if(hOSEventKM)
8179         {
8180 -               complete_all((struct completion *) hOSEventKM);
8181 +               eError = LinuxEventObjectSignal(hOSEventKM);
8182         }
8183         else
8184         {
8185 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/env/linux/pdump.c git/drivers/gpu/pvr/services4/srvkm/env/linux/pdump.c
8186 --- git/drivers/gpu/pvr/services4/srvkm/env/linux/pdump.c       2009-01-05 20:00:44.000000000 +0100
8187 +++ git/drivers/gpu/pvr/services4/srvkm/env/linux/pdump.c       2008-12-18 15:47:29.000000000 +0100
8188 @@ -1205,15 +1205,14 @@
8189         {
8190                 ui32Written = DbgWrite(psStream, &pui8Data[ui32Off], ui32Count, ui32Flags);
8191
8192 -#if 0
8193
8194
8195
8196                 if (ui32Written == 0)
8197                 {
8198 -                       ZwYieldExecution();
8199 +                       OSReleaseThreadQuanta();
8200                 }
8201 -#endif
8202 +
8203                 if (ui32Written != 0xFFFFFFFF)
8204                 {
8205                         ui32Off += ui32Written;
8206 @@ -1302,6 +1301,14 @@
8207         return bFrameDumped;
8208  }
8209
8210 +IMG_VOID PDumpRegRead(const IMG_UINT32 ui32RegOffset, IMG_UINT32 ui32Flags)
8211 +{
8212 +       __PDBG_PDUMP_STATE_GET_SCRIPT_STRING();
8213 +
8214 +       snprintf(pszScript, SZ_SCRIPT_SIZE_MAX, "RDW :SGXREG:0x%lX\r\n", ui32RegOffset);
8215 +       PDumpWriteString2(pszScript, ui32Flags);
8216 +}
8217 +
8218  IMG_VOID PDumpCycleCountRegRead(const IMG_UINT32 ui32RegOffset, IMG_BOOL bLastFrame)
8219  {
8220         __PDBG_PDUMP_STATE_GET_SCRIPT_STRING();
8221 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/env/linux/proc.c git/drivers/gpu/pvr/services4/srvkm/env/linux/proc.c
8222 --- git/drivers/gpu/pvr/services4/srvkm/env/linux/proc.c        2009-01-05 20:00:44.000000000 +0100
8223 +++ git/drivers/gpu/pvr/services4/srvkm/env/linux/proc.c        2008-12-18 15:47:29.000000000 +0100
8224 @@ -46,6 +46,11 @@
8225  #ifdef DEBUG
8226  int PVRDebugProcSetLevel(struct file *file, const char *buffer, unsigned long count, void *data);
8227  int PVRDebugProcGetLevel(char *page, char **start, off_t off, int count, int *eof, void *data);
8228 +
8229 +#ifdef PVR_MANUAL_POWER_CONTROL
8230 +int PVRProcSetPowerLevel(struct file *file, const char *buffer, unsigned long count, void *data);
8231 +int PVRProcGetPowerLevel(char *page, char **start, off_t off, int count, int *eof, void *data);
8232 +#endif
8233  #endif
8234
8235  static struct proc_dir_entry * dir;
8236 @@ -198,6 +203,15 @@
8237
8238          return -ENOMEM;
8239      }
8240 +
8241 +#ifdef PVR_MANUAL_POWER_CONTROL
8242 +       if (CreateProcEntry("power_control", PVRProcGetPowerLevel, PVRProcSetPowerLevel, 0))
8243 +    {
8244 +        PVR_DPF((PVR_DBG_ERROR, "CreateProcEntries: couldn't make /proc/pvr/power_control"));
8245 +
8246 +        return -ENOMEM;
8247 +    }
8248 +#endif
8249  #endif
8250
8251      return 0;
8252 @@ -219,6 +233,9 @@
8253  {
8254  #ifdef DEBUG
8255      RemoveProcEntry("debug_level");
8256 +#ifdef PVR_MANUAL_POWER_CONTROL
8257 +    RemoveProcEntry("power_control");
8258 +#endif
8259  #endif
8260      RemoveProcEntry("queue");
8261      RemoveProcEntry("nodes");
8262 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/env/linux/pvr_debug.c git/drivers/gpu/pvr/services4/srvkm/env/linux/pvr_debug.c
8263 --- git/drivers/gpu/pvr/services4/srvkm/env/linux/pvr_debug.c   2009-01-05 20:00:44.000000000 +0100
8264 +++ git/drivers/gpu/pvr/services4/srvkm/env/linux/pvr_debug.c   2008-12-18 15:47:29.000000000 +0100
8265 @@ -161,7 +161,7 @@
8266
8267  void PVRDebugSetLevel(IMG_UINT32 uDebugLevel)
8268  {
8269 -       printk(KERN_INFO "PVR: Setting Debug Level = 0x%x",(unsigned int)uDebugLevel);
8270 +       printk(KERN_INFO "PVR: Setting Debug Level = 0x%x\n",(unsigned int)uDebugLevel);
8271
8272         gPVRDebugLevel = uDebugLevel;
8273  }
8274 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/hwdefs/sgxdefs.h git/drivers/gpu/pvr/services4/srvkm/hwdefs/sgxdefs.h
8275 --- git/drivers/gpu/pvr/services4/srvkm/hwdefs/sgxdefs.h        2009-01-05 20:00:44.000000000 +0100
8276 +++ git/drivers/gpu/pvr/services4/srvkm/hwdefs/sgxdefs.h        2008-12-18 15:47:29.000000000 +0100
8277 @@ -33,12 +33,16 @@
8278  #if defined(SGX535)
8279  #include "sgx535defs.h"
8280  #else
8281 +#if defined(SGX520)
8282 +#include "sgx520defs.h"
8283 +#else
8284  #if defined(SGX535_V1_1)
8285  #include "sgx535defs.h"
8286  #else
8287  #endif
8288  #endif
8289  #endif
8290 +#endif
8291
8292  #include "sgxerrata.h"
8293  #include "sgxfeaturedefs.h"
8294 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/hwdefs/sgxerrata.h git/drivers/gpu/pvr/services4/srvkm/hwdefs/sgxerrata.h
8295 --- git/drivers/gpu/pvr/services4/srvkm/hwdefs/sgxerrata.h      2009-01-05 20:00:44.000000000 +0100
8296 +++ git/drivers/gpu/pvr/services4/srvkm/hwdefs/sgxerrata.h      2008-12-18 15:47:29.000000000 +0100
8297 @@ -43,6 +43,8 @@
8298         #else
8299         #if SGX_CORE_REV == 120
8300         #else
8301 +       #if SGX_CORE_REV == 121
8302 +       #else
8303         #if SGX_CORE_REV == SGX_CORE_REV_HEAD
8304
8305         #else
8306 @@ -51,6 +53,7 @@
8307         #endif
8308         #endif
8309         #endif
8310 +       #endif
8311          #endif
8312
8313         #define SGX_CORE_DEFINED
8314 @@ -69,16 +72,22 @@
8315                 #define FIX_HW_BRN_23281
8316                 #define FIX_HW_BRN_23410
8317                 #define FIX_HW_BRN_22693
8318 +               #define FIX_HW_BRN_22997
8319 +               #define FIX_HW_BRN_23030
8320         #else
8321         #if SGX_CORE_REV == 1111
8322                 #define FIX_HW_BRN_23281
8323                 #define FIX_HW_BRN_23410
8324                 #define FIX_HW_BRN_22693
8325 +               #define FIX_HW_BRN_22997
8326 +               #define FIX_HW_BRN_23030
8327         #else
8328         #if SGX_CORE_REV == 112
8329                 #define FIX_HW_BRN_23281
8330                 #define FIX_HW_BRN_23410
8331                 #define FIX_HW_BRN_22693
8332 +               #define FIX_HW_BRN_22997
8333 +               #define FIX_HW_BRN_23030
8334         #else
8335         #if SGX_CORE_REV == 113
8336                 #define FIX_HW_BRN_23281
8337 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/hwdefs/sgxfeaturedefs.h git/drivers/gpu/pvr/services4/srvkm/hwdefs/sgxfeaturedefs.h
8338 --- git/drivers/gpu/pvr/services4/srvkm/hwdefs/sgxfeaturedefs.h 2009-01-05 20:00:44.000000000 +0100
8339 +++ git/drivers/gpu/pvr/services4/srvkm/hwdefs/sgxfeaturedefs.h 2008-12-18 15:47:29.000000000 +0100
8340 @@ -24,6 +24,12 @@
8341   *
8342   ******************************************************************************/
8343
8344 +#if defined(SGX520)
8345 +       #define SGX_CORE_FRIENDLY_NAME                                                  "SGX520"
8346 +       #define SGX_CORE_ID                                                                             SGX_CORE_ID_520
8347 +       #define SGX_FEATURE_ADDRESS_SPACE_SIZE                                  (28)
8348 +       #define SGX_FEATURE_AUTOCLOCKGATING
8349 +#else
8350  #if defined(SGX530)
8351         #define SGX_CORE_FRIENDLY_NAME                                                  "SGX530"
8352         #define SGX_CORE_ID                                                                             SGX_CORE_ID_530
8353 @@ -36,8 +42,9 @@
8354         #define SGX_FEATURE_ADDRESS_SPACE_SIZE                                  (32)
8355         #define SGX_FEATURE_MULTIPLE_MEM_CONTEXTS
8356         #define SGX_FEATURE_2D_HARDWARE
8357 -               #define SGX_FEATURE_AUTOCLOCKGATING
8358 -
8359 +       #define SGX_FEATURE_AUTOCLOCKGATING
8360 +#else
8361 +#endif
8362  #endif
8363  #endif
8364
8365 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/include/device.h git/drivers/gpu/pvr/services4/srvkm/include/device.h
8366 --- git/drivers/gpu/pvr/services4/srvkm/include/device.h        2009-01-05 20:00:44.000000000 +0100
8367 +++ git/drivers/gpu/pvr/services4/srvkm/include/device.h        2008-12-18 15:47:29.000000000 +0100
8368 @@ -225,39 +225,40 @@
8369         struct _PVRSRV_DEVICE_NODE_     *psNext;
8370  } PVRSRV_DEVICE_NODE;
8371
8372 -PVRSRV_ERROR PVRSRVRegisterDevice(PSYS_DATA psSysData,
8373 -                                                                 PVRSRV_ERROR (*pfnRegisterDevice)(PVRSRV_DEVICE_NODE*),
8374 -                                                                 IMG_UINT32 ui32SOCInterruptBit,
8375 -                                                                 IMG_UINT32 *pui32DeviceIndex );
8376 +PVRSRV_ERROR IMG_CALLCONV PVRSRVRegisterDevice(PSYS_DATA psSysData,
8377 +                                                                                         PVRSRV_ERROR (*pfnRegisterDevice)(PVRSRV_DEVICE_NODE*),
8378 +                                                                                         IMG_UINT32 ui32SOCInterruptBit,
8379 +                                                                                         IMG_UINT32 *pui32DeviceIndex );
8380
8381 -PVRSRV_ERROR PVRSRVInitialiseDevice(IMG_UINT32 ui32DevIndex);
8382 +PVRSRV_ERROR IMG_CALLCONV PVRSRVInitialiseDevice(IMG_UINT32 ui32DevIndex);
8383 +PVRSRV_ERROR IMG_CALLCONV PVRSRVFinaliseSystem(IMG_BOOL bInitSuccesful);
8384
8385 -PVRSRV_ERROR PVRSRVDeinitialiseDevice(IMG_UINT32 ui32DevIndex);
8386 +PVRSRV_ERROR IMG_CALLCONV PVRSRVDeinitialiseDevice(IMG_UINT32 ui32DevIndex);
8387
8388  #if !defined(USE_CODE)
8389
8390 -IMG_IMPORT PVRSRV_ERROR PollForValueKM(volatile IMG_UINT32* pui32LinMemAddr,
8391 -                                                                          IMG_UINT32 ui32Value,
8392 -                                                                          IMG_UINT32 ui32Mask,
8393 -                                                                          IMG_UINT32 ui32Waitus,
8394 -                                                                          IMG_UINT32 ui32Tries);
8395 +IMG_IMPORT PVRSRV_ERROR IMG_CALLCONV PollForValueKM(volatile IMG_UINT32* pui32LinMemAddr,
8396 +                                                                                                  IMG_UINT32 ui32Value,
8397 +                                                                                                  IMG_UINT32 ui32Mask,
8398 +                                                                                                  IMG_UINT32 ui32Waitus,
8399 +                                                                                                  IMG_UINT32 ui32Tries);
8400
8401  #endif
8402
8403
8404  #if defined (USING_ISR_INTERRUPTS)
8405 -PVRSRV_ERROR PollForInterruptKM(IMG_UINT32 ui32Value,
8406 +PVRSRV_ERROR IMG_CALLCONV PollForInterruptKM(IMG_UINT32 ui32Value,
8407                                                                 IMG_UINT32 ui32Mask,
8408                                                                 IMG_UINT32 ui32Waitus,
8409                                                                 IMG_UINT32 ui32Tries);
8410  #endif
8411
8412
8413 -PVRSRV_ERROR PVRSRVInit(PSYS_DATA psSysData);
8414 -IMG_VOID PVRSRVDeInit(PSYS_DATA psSysData);
8415 -IMG_BOOL PVRSRVDeviceLISR(PVRSRV_DEVICE_NODE *psDeviceNode);
8416 -IMG_BOOL PVRSRVSystemLISR(IMG_VOID *pvSysData);
8417 -IMG_VOID PVRSRVMISR(IMG_VOID *pvSysData);
8418 +PVRSRV_ERROR IMG_CALLCONV PVRSRVInit(PSYS_DATA psSysData);
8419 +IMG_VOID IMG_CALLCONV PVRSRVDeInit(PSYS_DATA psSysData);
8420 +IMG_BOOL IMG_CALLCONV PVRSRVDeviceLISR(PVRSRV_DEVICE_NODE *psDeviceNode);
8421 +IMG_BOOL IMG_CALLCONV PVRSRVSystemLISR(IMG_VOID *pvSysData);
8422 +IMG_VOID IMG_CALLCONV PVRSRVMISR(IMG_VOID *pvSysData);
8423
8424  #if defined(__cplusplus)
8425  }
8426 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/include/handle.h git/drivers/gpu/pvr/services4/srvkm/include/handle.h
8427 --- git/drivers/gpu/pvr/services4/srvkm/include/handle.h        2009-01-05 20:00:44.000000000 +0100
8428 +++ git/drivers/gpu/pvr/services4/srvkm/include/handle.h        2008-12-18 15:47:29.000000000 +0100
8429 @@ -50,10 +50,13 @@
8430         PVRSRV_HANDLE_TYPE_DISP_BUFFER,
8431         PVRSRV_HANDLE_TYPE_BUF_BUFFER,
8432         PVRSRV_HANDLE_TYPE_SGX_HW_RENDER_CONTEXT,
8433 +       PVRSRV_HANDLE_TYPE_SGX_HW_TRANSFER_CONTEXT,
8434 +       PVRSRV_HANDLE_TYPE_SGX_HW_2D_CONTEXT,
8435         PVRSRV_HANDLE_TYPE_SHARED_PB_DESC,
8436         PVRSRV_HANDLE_TYPE_MEM_INFO_REF,
8437         PVRSRV_HANDLE_TYPE_SHARED_SYS_MEM_INFO,
8438 -       PVRSRV_HANDLE_TYPE_SHARED_EVENT_OBJECT
8439 +       PVRSRV_HANDLE_TYPE_SHARED_EVENT_OBJECT,
8440 +       PVRSRV_HANDLE_TYPE_EVENT_OBJECT_CONNECT
8441  } PVRSRV_HANDLE_TYPE;
8442
8443  typedef enum
8444 @@ -126,6 +129,11 @@
8445
8446
8447         IMG_UINT32 ui32LastFreeIndexPlusOne;
8448 +
8449 +#ifdef __linux__
8450 +
8451 +       IMG_BOOL bVmallocUsed;
8452 +#endif
8453  } PVRSRV_HANDLE_BASE;
8454
8455  #ifdef PVR_SECURE_HANDLES
8456 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/include/osfunc.h git/drivers/gpu/pvr/services4/srvkm/include/osfunc.h
8457 --- git/drivers/gpu/pvr/services4/srvkm/include/osfunc.h        2009-01-05 20:00:44.000000000 +0100
8458 +++ git/drivers/gpu/pvr/services4/srvkm/include/osfunc.h        2008-12-18 15:47:29.000000000 +0100
8459 @@ -148,14 +148,16 @@
8460  IMG_CHAR* OSStringCopy(IMG_CHAR *pszDest, const IMG_CHAR *pszSrc);
8461  IMG_INT32 OSSNPrintf(IMG_CHAR *pStr, IMG_UINT32 ui32Size, const IMG_CHAR *pszFormat, ...);
8462  #define OSStringLength(pszString) strlen(pszString)
8463 -PVRSRV_ERROR OSPowerManagerConnect(IMG_VOID);
8464 -PVRSRV_ERROR OSPowerManagerDisconnect(IMG_VOID);
8465
8466  PVRSRV_ERROR OSEventObjectCreate(const IMG_CHAR *pszName,
8467                                                                  PVRSRV_EVENTOBJECT *psEventObject);
8468  PVRSRV_ERROR OSEventObjectDestroy(PVRSRV_EVENTOBJECT *psEventObject);
8469  PVRSRV_ERROR OSEventObjectSignal(IMG_HANDLE hOSEventKM);
8470 -PVRSRV_ERROR OSEventObjectWait(IMG_HANDLE hOSEventKM, IMG_UINT32 ui32MSTimeout);
8471 +PVRSRV_ERROR OSEventObjectWait(IMG_HANDLE hOSEventKM);
8472 +PVRSRV_ERROR OSEventObjectOpen(PVRSRV_EVENTOBJECT *psEventObject,
8473 +                                                                                       IMG_HANDLE *phOSEvent);
8474 +PVRSRV_ERROR OSEventObjectClose(PVRSRV_EVENTOBJECT *psEventObject,
8475 +                                                                                       IMG_HANDLE hOSEventKM);
8476
8477
8478  PVRSRV_ERROR OSBaseAllocContigMemory(IMG_UINT32 ui32Size, IMG_CPU_VIRTADDR *pLinAddr, IMG_CPU_PHYADDR *pPhysAddr);
8479 @@ -203,6 +205,8 @@
8480  typedef IMG_VOID (*PFN_TIMER_FUNC)(IMG_VOID*);
8481  IMG_HANDLE OSAddTimer(PFN_TIMER_FUNC pfnTimerFunc, IMG_VOID *pvData, IMG_UINT32 ui32MsTimeout);
8482  PVRSRV_ERROR OSRemoveTimer (IMG_HANDLE hTimer);
8483 +PVRSRV_ERROR OSEnableTimer (IMG_HANDLE hTimer);
8484 +PVRSRV_ERROR OSDisableTimer (IMG_HANDLE hTimer);
8485
8486  PVRSRV_ERROR OSGetSysMemSize(IMG_UINT32 *pui32Bytes);
8487
8488 @@ -211,17 +215,17 @@
8489         HOST_PCI_INIT_FLAG_BUS_MASTER = 0x1,
8490         HOST_PCI_INIT_FLAG_FORCE_I32 = 0x7fffffff
8491  } HOST_PCI_INIT_FLAGS;
8492 -PVRSRV_ERROR OSPCIAcquireDev(IMG_VOID *pvSysData, IMG_UINT16 ui16VendorID, IMG_UINT16 ui16DeviceID, HOST_PCI_INIT_FLAGS eFlags);
8493 -PVRSRV_ERROR OSPCISetDev(IMG_VOID *pvSysData, IMG_VOID *pvPCICookie, HOST_PCI_INIT_FLAGS eFlags);
8494 -PVRSRV_ERROR OSPCIReleaseDev(IMG_VOID *pvSysData);
8495 -PVRSRV_ERROR OSPCIIRQ(IMG_VOID *pvSysData, IMG_UINT32 *pui32IRQ);
8496 -IMG_UINT32 OSPCIAddrRangeLen(IMG_VOID *pvSysData, IMG_UINT32 ui32Index);
8497 -IMG_UINT32 OSPCIAddrRangeStart(IMG_VOID *pvSysData, IMG_UINT32 ui32Index);
8498 -IMG_UINT32 OSPCIAddrRangeEnd(IMG_VOID *pvSysData, IMG_UINT32 ui32Index);
8499 -PVRSRV_ERROR OSPCIRequestAddrRange(IMG_VOID *pvSysData, IMG_UINT32 ui32Index);
8500 -PVRSRV_ERROR OSPCIReleaseAddrRange(IMG_VOID *pvSysData, IMG_UINT32 ui32Index);
8501 -PVRSRV_ERROR OSPCISuspendDev(IMG_VOID *pvSysData);
8502 -PVRSRV_ERROR OSPCIResumeDev(IMG_VOID *pvSysData);
8503 +IMG_HANDLE OSPCIAcquireDev(IMG_UINT16 ui16VendorID, IMG_UINT16 ui16DeviceID, HOST_PCI_INIT_FLAGS eFlags);
8504 +IMG_HANDLE OSPCISetDev(IMG_VOID *pvPCICookie, HOST_PCI_INIT_FLAGS eFlags);
8505 +PVRSRV_ERROR OSPCIReleaseDev(IMG_HANDLE hPVRPCI);
8506 +PVRSRV_ERROR OSPCIIRQ(IMG_HANDLE hPVRPCI, IMG_UINT32 *pui32IRQ);
8507 +IMG_UINT32 OSPCIAddrRangeLen(IMG_HANDLE hPVRPCI, IMG_UINT32 ui32Index);
8508 +IMG_UINT32 OSPCIAddrRangeStart(IMG_HANDLE hPVRPCI, IMG_UINT32 ui32Index);
8509 +IMG_UINT32 OSPCIAddrRangeEnd(IMG_HANDLE hPVRPCI, IMG_UINT32 ui32Index);
8510 +PVRSRV_ERROR OSPCIRequestAddrRange(IMG_HANDLE hPVRPCI, IMG_UINT32 ui32Index);
8511 +PVRSRV_ERROR OSPCIReleaseAddrRange(IMG_HANDLE hPVRPCI, IMG_UINT32 ui32Index);
8512 +PVRSRV_ERROR OSPCISuspendDev(IMG_HANDLE hPVRPCI);
8513 +PVRSRV_ERROR OSPCIResumeDev(IMG_HANDLE hPVRPCI);
8514
8515  PVRSRV_ERROR OSScheduleMISR(IMG_VOID *pvSysData);
8516
8517 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/include/pdump_km.h git/drivers/gpu/pvr/services4/srvkm/include/pdump_km.h
8518 --- git/drivers/gpu/pvr/services4/srvkm/include/pdump_km.h      2009-01-05 20:00:44.000000000 +0100
8519 +++ git/drivers/gpu/pvr/services4/srvkm/include/pdump_km.h      2008-12-18 15:47:29.000000000 +0100
8520 @@ -180,6 +180,8 @@
8521         void PDump3DSignatureRegisters(IMG_UINT32       ui32DumpFrameNum,
8522                                                                    IMG_BOOL             bLastFrame);
8523
8524 +       IMG_VOID PDumpRegRead(const IMG_UINT32 dwRegOffset, IMG_UINT32  ui32Flags);
8525 +
8526         IMG_VOID PDumpCycleCountRegRead(const IMG_UINT32 dwRegOffset, IMG_BOOL bLastFrame);
8527
8528         void PDumpPerformanceCounterRegisters(IMG_UINT32        ui32DumpFrameNum,
8529 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/include/resman.h git/drivers/gpu/pvr/services4/srvkm/include/resman.h
8530 --- git/drivers/gpu/pvr/services4/srvkm/include/resman.h        2009-01-05 20:00:44.000000000 +0100
8531 +++ git/drivers/gpu/pvr/services4/srvkm/include/resman.h        2008-12-18 15:47:29.000000000 +0100
8532 @@ -34,7 +34,9 @@
8533  enum {
8534
8535         RESMAN_TYPE_SHARED_PB_DESC = 1,
8536 -       RESMAN_TYPE_HW_RENDER_CONTEXT,
8537 +       RESMAN_TYPE_HW_RENDER_CONTEXT,
8538 +       RESMAN_TYPE_HW_TRANSFER_CONTEXT,
8539 +       RESMAN_TYPE_HW_2D_CONTEXT,
8540         RESMAN_TYPE_TRANSFER_CONTEXT,
8541
8542
8543 @@ -57,6 +59,7 @@
8544         RESMAN_TYPE_DEVICEMEM_WRAP,
8545         RESMAN_TYPE_DEVICEMEM_ALLOCATION,
8546         RESMAN_TYPE_RESOURCE_PERPROC_DATA,
8547 +       RESMAN_TYPE_EVENT_OBJECT,
8548      RESMAN_TYPE_SHARED_MEM_INFO,
8549
8550
8551 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/include/srvkm.h git/drivers/gpu/pvr/services4/srvkm/include/srvkm.h
8552 --- git/drivers/gpu/pvr/services4/srvkm/include/srvkm.h 2009-01-05 20:00:44.000000000 +0100
8553 +++ git/drivers/gpu/pvr/services4/srvkm/include/srvkm.h 2008-12-18 15:47:29.000000000 +0100
8554 @@ -33,9 +33,9 @@
8555  #endif
8556
8557
8558 -IMG_VOID PVRSRVSetDCState(IMG_UINT32 ui32State);
8559 +IMG_VOID IMG_CALLCONV PVRSRVSetDCState(IMG_UINT32 ui32State);
8560
8561 -PVRSRV_ERROR PVRSRVSaveRestoreLiveSegments(IMG_HANDLE hArena, IMG_PBYTE pbyBuffer, IMG_UINT32 *puiBufSize, IMG_BOOL bSave);
8562 +PVRSRV_ERROR IMG_CALLCONV PVRSRVSaveRestoreLiveSegments(IMG_HANDLE hArena, IMG_PBYTE pbyBuffer, IMG_UINT32 *puiBufSize, IMG_BOOL bSave);
8563
8564  #if defined (__cplusplus)
8565  }
8566 diff -Nurd git/drivers/gpu/pvr/services4/srvkm/Makefile git/drivers/gpu/pvr/services4/srvkm/Makefile
8567 --- git/drivers/gpu/pvr/services4/srvkm/Makefile        2009-01-05 20:00:44.000000000 +0100
8568 +++ git/drivers/gpu/pvr/services4/srvkm/Makefile        1970-01-01 01:00:00.000000000 +0100
8569 @@ -1,68 +0,0 @@
8570 -#
8571 -# Copyright(c) 2008 Imagination Technologies Ltd. All rights reserved.
8572 -#
8573 -# This program is free software; you can redistribute it and/or modify it
8574 -# under the terms and conditions of the GNU General Public License,
8575 -# version 2, as published by the Free Software Foundation.
8576 -#
8577 -# This program is distributed in the hope it will be useful but, except
8578 -# as otherwise stated in writing, without any warranty; without even the
8579 -# implied warranty of merchantability or fitness for a particular purpose.
8580 -# See the GNU General Public License for more details.
8581 -#
8582 -# You should have received a copy of the GNU General Public License along with
8583 -# this program; if not, write to the Free Software Foundation, Inc.,
8584 -# 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
8585 -#
8586 -# The full GNU General Public License is included in this distribution in
8587 -# the file called "COPYING".
8588 -#
8589 -# Contact Information:
8590 -# Imagination Technologies Ltd. <gpl-support@imgtec.com>
8591 -# Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
8592 -#
8593 -#
8594 -
8595 -obj-y +=       env/linux/osfunc.o              \
8596 -               env/linux/mmap.o                \
8597 -               env/linux/mod.o                 \
8598 -               env/linux/pdump.o               \
8599 -               env/linux/proc.o                \
8600 -               env/linux/pvr_bridge_k.o        \
8601 -               env/linux/pvr_debug.o           \
8602 -               env/linux/mm.o                  \
8603 -               env/linux/mutex.o
8604 -
8605 -obj-y +=       common/buffer_manager.o         \
8606 -               common/devicemem.o              \
8607 -               common/deviceclass.o            \
8608 -               common/handle.o                 \
8609 -               common/hash.o                   \
8610 -               common/metrics.o                \
8611 -               common/pvrsrv.o                 \
8612 -               common/queue.o                  \
8613 -               common/ra.o                     \
8614 -               common/resman.o                 \
8615 -               common/power.o                  \
8616 -               common/mem.o                    \
8617 -               bridged/bridged_pvr_bridge.o    \
8618 -               devices/sgx/sgxinit.o           \
8619 -               devices/sgx/sgxutils.o          \
8620 -               devices/sgx/sgxkick.o           \
8621 -               devices/sgx/sgxtransfer.o       \
8622 -               devices/sgx/mmu.o               \
8623 -               devices/sgx/pb.o                \
8624 -               common/perproc.o                \
8625 -               ../system/$(CONFIG_PVR_SYSTEM)/sysconfig.o      \
8626 -               ../system/$(CONFIG_PVR_SYSTEM)/sysutils.o       \
8627 -               devices/sgx/sgx2dcore.o
8628 -
8629 -INCLUDES =     -I$(src)/env/linux      \
8630 -               -I$(src)/include        \
8631 -               -I$(src)/bridged        \
8632 -               -I$(src)/devices/sgx    \
8633 -               -I$(src)/include        \
8634 -               -I$(src)/hwdefs
8635 -
8636 -ccflags-y += $(CONFIG_PVR_OPTS) $(INCLUDES)
8637 -
8638 diff -Nurd git/drivers/gpu/pvr/services4/system/include/syscommon.h git/drivers/gpu/pvr/services4/system/include/syscommon.h
8639 --- git/drivers/gpu/pvr/services4/system/include/syscommon.h    2009-01-05 20:00:44.000000000 +0100
8640 +++ git/drivers/gpu/pvr/services4/system/include/syscommon.h    2008-12-18 15:47:29.000000000 +0100
8641 @@ -83,11 +83,13 @@
8642         RA_ARENA                                        *apsLocalDevMemArena[SYS_MAX_LOCAL_DEVMEM_ARENAS];
8643
8644      IMG_CHAR                    *pszVersionString;
8645 +       PVRSRV_EVENTOBJECT                      *psGlobalEventObject;
8646  } SYS_DATA;
8647
8648
8649
8650  PVRSRV_ERROR SysInitialise(IMG_VOID);
8651 +PVRSRV_ERROR SysFinalise(IMG_VOID);
8652
8653  IMG_UINT32 GetCPUTranslatedAddress(IMG_VOID);
8654
8655 diff -Nurd git/drivers/gpu/pvr/services4/system/omap3430/sysconfig.c git/drivers/gpu/pvr/services4/system/omap3430/sysconfig.c
8656 --- git/drivers/gpu/pvr/services4/system/omap3430/sysconfig.c   2009-01-05 20:00:44.000000000 +0100
8657 +++ git/drivers/gpu/pvr/services4/system/omap3430/sysconfig.c   2008-12-18 15:47:29.000000000 +0100
8658 @@ -360,8 +360,15 @@
8659         }
8660         gsSysSpecificData.ui32SysSpecificData |= SYS_SPECIFIC_DATA_ENABLE_INITDEV;
8661
8662 +       return PVRSRV_OK;
8663 +}
8664 +
8665
8666 +PVRSRV_ERROR SysFinalise(IMG_VOID)
8667 +{
8668  #if defined(SYS_USING_INTERRUPTS)
8669 +       PVRSRV_ERROR eError;
8670 +
8671         eError = OSInstallMISR(gpsSysData);
8672         if (eError != PVRSRV_OK)
8673         {
8674 @@ -388,12 +395,12 @@
8675
8676         gpsSysData->pszVersionString = SysCreateVersionString(gsSGXDeviceMap.sRegsCpuPBase);
8677         if (!gpsSysData->pszVersionString)
8678 -       {
8679 -               PVR_DPF((PVR_DBG_ERROR,"SysInitialise: Failed to create a system version string"));
8680 +       {
8681 +               PVR_DPF((PVR_DBG_ERROR,"SysFinalise: Failed to create a system version string"));
8682         }
8683         else
8684         {
8685 -               PVR_DPF((PVR_DBG_WARNING, "SysInitialise: Version string: %s", gpsSysData->pszVersionString));
8686 +               PVR_DPF((PVR_DBG_WARNING, "SysFinalise: Version string: %s", gpsSysData->pszVersionString));
8687         }
8688
8689  #if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT)
8690 @@ -641,7 +648,7 @@
8691                         }
8692                         gsSysSpecificData.ui32SysSpecificData &= ~SYS_SPECIFIC_DATA_ENABLE_LISR;
8693                 }
8694 -#endif
8695 +#endif
8696                 if (gsSysSpecificData.ui32SysSpecificData & SYS_SPECIFIC_DATA_ENABLE_SYSCLOCKS)
8697                 {
8698                         DisableSystemClocks(gpsSysData);
8699 @@ -682,7 +689,7 @@
8700                         }
8701                         gsSysSpecificData.ui32SysSpecificData |= SYS_SPECIFIC_DATA_ENABLE_LISR;
8702                 }
8703 -#endif
8704 +#endif
8705         }
8706         return eError;
8707  }
8708 @@ -706,7 +713,7 @@
8709                 DisableSGXClocks(gpsSysData);
8710         }
8711  #else
8712 -       PVR_UNREFERENCED_PARAMETER(eNewPowerState);
8713 +       PVR_UNREFERENCED_PARAMETER(eNewPowerState );
8714  #endif
8715         return PVRSRV_OK;
8716  }
8717 @@ -718,12 +725,13 @@
8718  {
8719         PVRSRV_ERROR eError = PVRSRV_OK;
8720
8721 +       PVR_UNREFERENCED_PARAMETER(eNewPowerState);
8722 +
8723         if (ui32DeviceIndex != gui32SGXDeviceID)
8724         {
8725                 return eError;
8726         }
8727
8728 -       PVR_UNREFERENCED_PARAMETER(eNewPowerState);
8729
8730  #if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT)
8731         if (eCurrentPowerState == PVRSRV_POWER_STATE_D3)
8732 @@ -734,7 +742,7 @@
8733  #else
8734         PVR_UNREFERENCED_PARAMETER(eCurrentPowerState);
8735  #endif
8736 -
8737 +
8738         return eError;
8739  }
8740
8741 diff -Nurd git/drivers/gpu/pvr/services4/system/omap3430/sysconfig.h git/drivers/gpu/pvr/services4/system/omap3430/sysconfig.h
8742 --- git/drivers/gpu/pvr/services4/system/omap3430/sysconfig.h   2009-01-05 20:00:44.000000000 +0100
8743 +++ git/drivers/gpu/pvr/services4/system/omap3430/sysconfig.h   2008-12-18 15:47:29.000000000 +0100
8744 @@ -38,13 +38,6 @@
8745
8746  #define SYS_OMAP3430_SGX_IRQ                            21
8747
8748 -#define SYS_OMAP3430_PM_REGS_SYS_PHYS_BASE      0x48306000
8749 -#define SYS_OMAP3430_PM_REGS_SIZE                       0x1000
8750 -
8751 -#define SYS_OMAP3430_CM_REGS_SYS_PHYS_BASE      0x48004000
8752 -#define SYS_OMAP3430_CM_REGS_SIZE                       0x1000
8753 -
8754 -
8755  #define SYS_OMAP3430_GP11TIMER_ENABLE_SYS_PHYS_BASE  0x48088024
8756  #define SYS_OMAP3430_GP11TIMER_REGS_SYS_PHYS_BASE       0x48088028
8757  #define SYS_OMAP3430_GP11TIMER_TSICR_SYS_PHYS_BASE      0x48088040
8758 diff -Nurd git/drivers/gpu/pvr/services4/system/omap3430/sysutils.c git/drivers/gpu/pvr/services4/system/omap3430/sysutils.c
8759 --- git/drivers/gpu/pvr/services4/system/omap3430/sysutils.c    2009-01-05 20:00:44.000000000 +0100
8760 +++ git/drivers/gpu/pvr/services4/system/omap3430/sysutils.c    2008-12-18 15:47:29.000000000 +0100
8761 @@ -52,7 +52,7 @@
8762                 return PVRSRV_OK;
8763         }
8764
8765 -       PVR_DPF((PVR_DBG_ERROR, "EnableSGXClocks: Enabling SGX Clocks"));
8766 +       PVR_TRACE(("EnableSGXClocks: Enabling SGX Clocks"));
8767
8768  #if defined(__linux__)
8769         if (psSysSpecData->psSGX_FCK == IMG_NULL)
8770 --- /tmp/omaplfb_linux.c        2009-01-06 10:41:49.000000000 +0100
8771 +++ git/drivers/gpu/pvr/services4/3rdparty/dc_omap3430_linux/omaplfb_linux.c    2009-01-06 10:42:41.000000000 +0100
8772 @@ -108,6 +108,8 @@
8773         (void) OMAPLFBVSyncIHandler(psSwapChain);
8774  }
8775
8776 +#define DISPC_IRQ_VSYNC 0x0002
8777 +
8778  PVRSRV_ERROR OMAPLFBInstallVSyncISR(OMAPLFB_SWAPCHAIN *psSwapChain)
8779  {
8780
8781 --- /tmp/Makefile       2009-01-06 11:32:47.000000000 +0100
8782 +++ git/drivers/gpu/pvr/Makefile        2009-01-06 11:39:06.000000000 +0100
8783 @@ -16,6 +16,7 @@
8784                 services4/srvkm/env/linux/pvr_debug.o           \
8785                 services4/srvkm/env/linux/mm.o                  \
8786                 services4/srvkm/env/linux/mutex.o               \
8787 +               services4/srvkm/env/linux/event.o \
8788                 services4/srvkm/common/buffer_manager.o         \
8789                 services4/srvkm/common/devicemem.o              \
8790                 services4/srvkm/common/deviceclass.o            \
8791 @@ -30,6 +31,7 @@
8792                 services4/srvkm/common/mem.o                    \
8793                 services4/srvkm/bridged/bridged_pvr_bridge.o    \
8794                 services4/srvkm/devices/sgx/sgxinit.o           \
8795 +               services4/srvkm/devices/sgx/sgxreset.o \
8796                 services4/srvkm/devices/sgx/sgxutils.o          \
8797                 services4/srvkm/devices/sgx/sgxkick.o           \
8798                 services4/srvkm/devices/sgx/sgxtransfer.o       \