From fc7f2f3df65eb7f24e9760749158ef847d1aceec Mon Sep 17 00:00:00 2001
From: Nishanth Menon <nm@ti.com>
Date: Wed, 29 Feb 2012 23:33:39 +0100
Subject: [PATCH] ARM: OMAP3+: SmartReflex Class3: disable errorgen before
 disable VP

SmartReflex AVS Errorgen module supplies signals to Voltage
Processor. It is suggested that by disabling Errorgen module
before we disable VP, we might be able to ensure lesser
chances of race condition to occur in the system.

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
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Reading git-format-patch failed