From f975ca46f634660a52d8c815b465258ae9bce3b7 Mon Sep 17 00:00:00 2001
From: Nicolin Chen <Guangyu.Chen@freescale.com>
Date: Tue, 6 May 2014 16:56:01 +0800
Subject: [PATCH] ASoC: fsl_esai: Bypass divider settings if clock requirement
 is not changed

We don't need to change those dividers if bclk and mclk remains the same
directions and values.

Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
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