From ef47d3287ca693067e3891aad9c8e62671579592 Mon Sep 17 00:00:00 2001
From: Victor Goldenshtein <victorg@ti.com>
Date: Tue, 17 Sep 2013 18:41:28 +0300
Subject: [PATCH] wl18xx: fix boot process in high temperature environment

In addition to existing WCS PLL configuration add and enable
also the coex PLL during init phase. This fixes boot failures
due to silicon latchup in high temperature environment (>85c).

Signed-off-by: Victor Goldenshtein <victorg@ti.com>
Signed-off-by: Nadim Zubidat <nadimz@ti.com>
Signed-off-by: Eliad Peller <eliad@wizery.com>
Signed-off-by: Luciano Coelho <luciano.coelho@intel.com>
---
Reading git-format-patch failed