From e4d313ff79a8b5622a8c4954ba37c6564fa922c4 Mon Sep 17 00:00:00 2001
From: Takashi Yoshii <takasi-y@ops.dti.ne.jp>
Date: Mon, 2 Dec 2013 03:19:13 +0900
Subject: [PATCH] spi: spi-sh-msiof: round up div to fix freq calculation

Truncation on integer division in sh_msiof_spi_set_clk_regs()
results in insufficient transfer frequency (> max_speed_freq).

For example, source 52MHz, required max 6MHz
 52/6 = 8.6 --> 8, then 1/8 table selected,
and result in 52/8 = 6.5 MHz (>6MHz)

Rounding it up is a simple solution.
 52/6 = 8.6 --> 9, then 1/16 table selected,
and result in 52/16 = 3.25 MHz

Signed-off-by: Takashi Yoshii <takasi-y@ops.dti.ne.jp>
Signed-off-by: Mark Brown <broonie@linaro.org>
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