From 81598d19ca7d60724c403a3ed4a10840e177288b Mon Sep 17 00:00:00 2001 From: Tony Dinh Date: Mon, 29 Sep 2025 14:49:12 -0700 Subject: [PATCH] pci: mvebu: Unable to assign mbus windows for 2nd pcie controller Correct the memory and IO mbus windows size increments in mvebu_pcie_bind. Currently, pcie1 controller resource_size(&mem) and resource_size(&io) checks result in a failure. This is because mem.end and io.end must be incremented at the end of pcie0 windows assignment. Signed-off-by: Tony Dinh Reviewed-by: Stefan Roese --- drivers/pci/pci_mvebu.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/pci/pci_mvebu.c b/drivers/pci/pci_mvebu.c index 77815513b76..3985bd59607 100644 --- a/drivers/pci/pci_mvebu.c +++ b/drivers/pci/pci_mvebu.c @@ -763,6 +763,7 @@ static int mvebu_pcie_bind(struct udevice *parent) pcie->mem.start = mem.start; pcie->mem.end = mem.start + SZ_128M - 1; mem.start += SZ_128M; + mem.end = mem.start + SZ_128M - 1; } else { printf("%s: unable to assign mbus window for mem\n", pcie->name); pcie->mem.start = 0; @@ -773,6 +774,7 @@ static int mvebu_pcie_bind(struct udevice *parent) pcie->io.start = io.start; pcie->io.end = io.start + SZ_64K - 1; io.start += SZ_64K; + io.end = io.start + SZ_64K - 1; } else { printf("%s: unable to assign mbus window for io\n", pcie->name); pcie->io.start = 0; -- 2.47.3