From 80f3568995f08cdf60923863a9be15345c42deb9 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Duje=20Mihanovi=C4=87?= Date: Sat, 16 Aug 2025 21:35:19 +0200 Subject: [PATCH] ARM: dts: pxa1908: convert to OF_UPSTREAM MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Convert the PXA1908 platform and its coreprimevelte board to OF_UPSTREAM and enable the few drivers found in the upstream DTS. Signed-off-by: Duje Mihanović --- arch/arm/Kconfig | 1 + ...pxa1908-samsung-coreprimevelte-u-boot.dtsi | 20 ++++ .../dts/pxa1908-samsung-coreprimevelte.dts | 74 ------------ arch/arm/dts/pxa1908.dtsi | 106 ------------------ configs/coreprimevelte_defconfig | 7 +- 5 files changed, 27 insertions(+), 181 deletions(-) create mode 100644 arch/arm/dts/pxa1908-samsung-coreprimevelte-u-boot.dtsi delete mode 100644 arch/arm/dts/pxa1908-samsung-coreprimevelte.dts delete mode 100644 arch/arm/dts/pxa1908.dtsi diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index bdb0d47b2ac..ef834542bd4 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -883,6 +883,7 @@ config ARCH_MMP select OF_CONTROL select SAVE_PREV_BL_FDT_ADDR select SAVE_PREV_BL_INITRAMFS_START_ADDR + imply OF_UPSTREAM config ARCH_LPC32XX bool "NXP LPC32xx platform" diff --git a/arch/arm/dts/pxa1908-samsung-coreprimevelte-u-boot.dtsi b/arch/arm/dts/pxa1908-samsung-coreprimevelte-u-boot.dtsi new file mode 100644 index 00000000000..2e5ec5c597d --- /dev/null +++ b/arch/arm/dts/pxa1908-samsung-coreprimevelte-u-boot.dtsi @@ -0,0 +1,20 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2025 Duje Mihanović + */ + +/ { + pxa,rev-id = <3928 0>, <3928 1>, <3928 2>; + + memory@0 { + reg = <0 0x1000000 0 0x3f000000>; + }; +}; + +&uart0 { + clock-frequency = <14745600>; +}; + +&pmx { + compatible = "marvell,pxa1908-padconf", "pinctrl-single"; +}; diff --git a/arch/arm/dts/pxa1908-samsung-coreprimevelte.dts b/arch/arm/dts/pxa1908-samsung-coreprimevelte.dts deleted file mode 100644 index 588e39e9265..00000000000 --- a/arch/arm/dts/pxa1908-samsung-coreprimevelte.dts +++ /dev/null @@ -1,74 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -#include "pxa1908.dtsi" - -/ { - pxa,rev-id = <3928 2>; - model = "Samsung Galaxy Core Prime VE LTE"; - compatible = "samsung,coreprimevelte", "marvell,pxa1908"; - - aliases { - serial0 = &uart0; - }; - - chosen { - #address-cells = <2>; - #size-cells = <2>; - ranges; - - stdout-path = "serial0:115200n8"; - - /* S-Boot places the initramfs here */ - linux,initrd-start = <0x4d70000>; - linux,initrd-end = <0x5000000>; - - fb0: framebuffer@17177000 { - compatible = "simple-framebuffer"; - reg = <0 0x17177000 0 (480 * 800 * 4)>; - width = <480>; - height = <800>; - stride = <(480 * 4)>; - format = "a8r8g8b8"; - }; - }; - - memory { - device_type = "memory"; - reg = <0 0x1000000 0 0x3f000000>; - }; - - reserved-memory { - #address-cells = <2>; - #size-cells = <2>; - ranges; - - framebuffer@17000000 { - reg = <0 0x17000000 0 0x1800000>; - no-map; - }; - - gpu@9000000 { - reg = <0 0x9000000 0 0x1000000>; - }; - - /* Communications processor, aka modem */ - cp@5000000 { - reg = <0 0x5000000 0 0x3000000>; - }; - - cm3@a000000 { - reg = <0 0xa000000 0 0x80000>; - }; - - seclog@8000000 { - reg = <0 0x8000000 0 0x100000>; - }; - - ramoops@8100000 { - compatible = "ramoops"; - reg = <0 0x8100000 0 0x40000>; - record-size = <0x8000>; - console-size = <0x20000>; - max-reason = <5>; - }; - }; -}; diff --git a/arch/arm/dts/pxa1908.dtsi b/arch/arm/dts/pxa1908.dtsi deleted file mode 100644 index e8ec2606c25..00000000000 --- a/arch/arm/dts/pxa1908.dtsi +++ /dev/null @@ -1,106 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/dts-v1/; - -#include - -/ { - model = "Marvell Armada PXA1908"; - compatible = "marvell,pxa1908"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&gic>; - - cpus { - #address-cells = <2>; - #size-cells = <0>; - - cpu0: cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a53"; - reg = <0 0>; - enable-method = "psci"; - }; - - cpu1: cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a53"; - reg = <0 1>; - enable-method = "psci"; - }; - - cpu2: cpu@2 { - device_type = "cpu"; - compatible = "arm,cortex-a53"; - reg = <0 2>; - enable-method = "psci"; - }; - - cpu3: cpu@3 { - device_type = "cpu"; - compatible = "arm,cortex-a53"; - reg = <0 3>; - enable-method = "psci"; - }; - }; - - psci { - compatible = "arm,psci-0.2"; - method = "smc"; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupts = , - , - , - ; - }; - - soc { - compatible = "simple-bus"; - #address-cells = <2>; - #size-cells = <2>; - ranges; - - gic: interrupt-controller@d1df9000 { - compatible = "arm,gic-400"; - reg = <0 0xd1df9000 0 0x1000>, - <0 0xd1dfa000 0 0x2000>, - /* The subsequent registers are guesses. */ - <0 0xd1dfc000 0 0x2000>, - <0 0xd1dfe000 0 0x2000>; - interrupts = ; - interrupt-controller; - #interrupt-cells = <3>; - }; - - apb@d4000000 { - compatible = "simple-bus"; - reg = <0 0xd4000000 0 0x200000>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0 0xd4000000 0x200000>; - - uart0: serial@17000 { - compatible = "mrvl,mmp-uart", "intel,xscale-uart"; - reg = <0x17000 0x1000>; - clock-frequency = <14745600>; - reg-shift = <2>; - }; - - uart1: serial@18000 { - compatible = "mrvl,mmp-uart", "intel,xscale-uart"; - reg = <0x18000 0x1000>; - clock-frequency = <14745600>; - reg-shift = <2>; - }; - - uart2: serial@36000 { - compatible = "mrvl,mmp-uart", "intel,xscale-uart"; - reg = <0x36000 0x1000>; - clock-frequency = <117000000>; - reg-shift = <2>; - }; - }; - }; -}; diff --git a/configs/coreprimevelte_defconfig b/configs/coreprimevelte_defconfig index 05116669200..c4cd9d2dc01 100644 --- a/configs/coreprimevelte_defconfig +++ b/configs/coreprimevelte_defconfig @@ -5,7 +5,7 @@ CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_MMP=y CONFIG_TEXT_BASE=0x1000000 CONFIG_NR_DRAM_BANKS=2 -CONFIG_DEFAULT_DEVICE_TREE="pxa1908-samsung-coreprimevelte" +CONFIG_DEFAULT_DEVICE_TREE="marvell/mmp/pxa1908-samsung-coreprimevelte" CONFIG_TARGET_COREPRIMEVELTE=y CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_ARMV8_PSCI=y @@ -14,5 +14,10 @@ CONFIG_FIT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_DM=y CONFIG_OF_BOARD=y +CONFIG_PINCTRL=y +CONFIG_PINCONF=y +CONFIG_PINCTRL_SINGLE=y CONFIG_SYS_NS16550=y CONFIG_SYS_NS16550_MEM32=y +CONFIG_VIDEO=y +CONFIG_VIDEO_SIMPLE=y -- 2.47.3