From 59a82d0e65539812652dffea160ef483c1d310f5 Mon Sep 17 00:00:00 2001
From: Alex Deucher <alexander.deucher@amd.com>
Date: Tue, 13 Aug 2013 12:48:06 -0400
Subject: [PATCH] drm/radeon/si: properly set up the clearstate buffer for pg
 (v2)

The format of the clearstate buffer used for pg (powergating)
changed between NI and SI.  This formats it properly for what
the hardware expects on SI.

v2: fix addresses

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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