From 52eba8dd5e830a836425e92d002bc51e42d3280e Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Thu, 28 Apr 2011 02:34:21 +1000 Subject: [PATCH] drm/nva3/clk: better pll calculation when no fractional fb div available The core/mem/shader clocks don't support the fractional feedback divider, causing our calculated clocks to be off by quite a lot in some cases. To solve this we will switch to a search-based algorithm when fN is NULL. For my NVA8 at PL3, this actually generates identical cooefficients to the binary driver. Hopefully that's a good sign, and that does not break VPLL calculation for someone.. Signed-off-by: Ben Skeggs --- Reading git-format-patch failed