From 37cddff8e330a8771afcdab96d9d8ec385584daf Mon Sep 17 00:00:00 2001 From: Paul Burton Date: Fri, 11 Jul 2014 16:46:54 +0100 Subject: [PATCH] MIPS: 16 byte align MSA vector context The MSA specification upon first read appears to suggest that it is safe to perform vector loads & stores with arbitrary alignment. However it leaves provision for "address-dependent exceptions"... Align the vector context to a 16 byte boundary to ensure that the kernel cannot cause any such exceptions. Note that the fpu field of struct thread_struct was already at a 16 byte boundary within the struct, the introduction of FPU_ALIGN simply makes the requirement explicit. The only part of this impacting the generated kernel binary is ARCH_MIN_TASKALIGN. Signed-off-by: Paul Burton Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/7308/ Signed-off-by: Ralf Baechle --- Reading git-format-patch failed