From 2f5aaa3d2703256d37ae75818c495783d4ad0543 Mon Sep 17 00:00:00 2001 From: Joseph Lo Date: Wed, 3 Jul 2013 17:50:39 +0800 Subject: [PATCH] ARM: tegra: set up the correct L2 data RAM latency for Cortex-A15 When there is a cluster power down cycle in suspend, we need to set up the correct L2 RAM data RAM latency to make L2 cache work correctly. This is only needed for cluster 0 and needs to be done in tegra_resume before the cache is enabled. Signed-off-by: Joseph Lo Signed-off-by: Stephen Warren --- Reading git-format-patch failed