From 2c11b57a8a8d83ffa91aebb12c90488c8802e6f3 Mon Sep 17 00:00:00 2001
From: Shawn Guo <shawn.guo@linaro.org>
Date: Thu, 31 Oct 2013 10:35:40 +0800
Subject: [PATCH] ARM: imx: improve mxc_restart() on the SRC bit writes

The current comment in the code does not make it clear why the double writes
on SRC bit is needed.  Let's quote the errata to get it clear.  Also, to
ensure there are at least 2 writes happen in the same one 32kHz period,
we actually need 3 writes.  Let's add the third one.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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