From 281c66f39b0e6b3b520976ad0535939141f148b8 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Wed, 30 Jul 2025 23:52:46 +0000 Subject: [PATCH] rockchip: clk: clk_rk3528: Add dummy CLK_REF_PCIE_INNER_PHY support Add dummy support for the CLK_REF_PCIE_INNER_PHY clock to allow probe of the phy-rockchip-naneng-combphy driver on RK3528. Signed-off-by: Jonas Karlman Reviewed-by: Kever Yang --- drivers/clk/rockchip/clk_rk3528.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/rockchip/clk_rk3528.c b/drivers/clk/rockchip/clk_rk3528.c index 06f20895acc..d58557ff56d 100644 --- a/drivers/clk/rockchip/clk_rk3528.c +++ b/drivers/clk/rockchip/clk_rk3528.c @@ -1535,6 +1535,7 @@ static ulong rk3528_clk_set_rate(struct clk *clk, ulong rate) /* Might occur in cru assigned-clocks, can be ignored here */ case ACLK_BUS_VOPGL_ROOT: case BCLK_EMMC: + case CLK_REF_PCIE_INNER_PHY: case XIN_OSC0_DIV: ret = 0; break; -- 2.47.3