From 2310aac8ae0180ad78da1d44657f846610296e4d Mon Sep 17 00:00:00 2001 From: Neha Malcom Francis Date: Tue, 12 Aug 2025 18:13:21 +0530 Subject: [PATCH] ram: k3-ddrss: Add support for number of controllers under MSMC In K3 multi-DDR systems, the MSMC is responsible for the interleave mechanism across all the DDR controllers. Add support for MSMC to obtain the number of controllers it's responsible for using the DT. Reviewed-by: Udit Kumar Signed-off-by: Neha Malcom Francis --- drivers/ram/k3-ddrss/k3-ddrss.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/ram/k3-ddrss/k3-ddrss.c b/drivers/ram/k3-ddrss/k3-ddrss.c index 61d4f3d7aa4..075e664ff1a 100644 --- a/drivers/ram/k3-ddrss/k3-ddrss.c +++ b/drivers/ram/k3-ddrss/k3-ddrss.c @@ -134,6 +134,7 @@ struct k3_msmc { enum ecc_enable enable; enum emif_config config; enum emif_active active; + u32 num_ddr_controllers; }; struct k3_ddrss_desc { @@ -1013,6 +1014,13 @@ static int k3_msmc_probe(struct udevice *dev) return -EINVAL; } + ret = device_get_child_count(dev); + if (ret <= 0) { + dev_err(dev, "no child ddr nodes present"); + return -EINVAL; + } + msmc->num_ddr_controllers = ret; + return 0; } -- 2.47.3