From 190a339ae345c5653aca5557e713af6a9227f29e Mon Sep 17 00:00:00 2001
From: Boon Khai Ng <boon.khai.ng@altera.com>
Date: Thu, 14 Aug 2025 11:17:41 +0800
Subject: [PATCH] configs: agilex5: Enable config SPL_SYS_DCACHE_OFF

Add SPL_SYS_DCACHE_OFF to Agilex5 defconfig to disable data cache for SPL

Signed-off-by: Tanmay Kathpalia <tanmay.kathpalia@altera.com>
Signed-off-by: Boon Khai Ng <boon.khai.ng@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
---
 configs/socfpga_agilex5_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/socfpga_agilex5_defconfig b/configs/socfpga_agilex5_defconfig
index 846c18eed27..24c95eb39d5 100644
--- a/configs/socfpga_agilex5_defconfig
+++ b/configs/socfpga_agilex5_defconfig
@@ -46,6 +46,7 @@ CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
 CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x9fa00000
 CONFIG_SPL_SYS_MALLOC_SIZE=0x500000
 CONFIG_SPL_CACHE=y
+CONFIG_SPL_SYS_DCACHE_OFF=y
 CONFIG_SPL_MTD=y
 CONFIG_SPL_POWER_DOMAIN=y
 CONFIG_SPL_SPI_FLASH_MTD=y
-- 
2.47.3