From: Kumar Gala Date: Mon, 24 Aug 2009 15:52:48 +0000 (+0000) Subject: powerpc/mm: Add MMU features for TLB reservation & Paired MAS registers X-Git-Tag: v2.6.32-rc1~675^2~29 X-Git-Url: https://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=df5d6ecf8157245ef733db87597adb2c6e2510da;p=pandora-kernel.git powerpc/mm: Add MMU features for TLB reservation & Paired MAS registers Support for TLB reservation (or TLB Write Conditional) and Paired MAS registers are optional for a processor implementation so we handle them via MMU feature sections. We currently only used paired MAS registers to access the full RPN + perm bits that are kept in MAS7||MAS3. We assume that if an implementation has hardware page table at this time it also implements in TLB reservations. Signed-off-by: Kumar Gala Signed-off-by: Benjamin Herrenschmidt --- Reading git-diff-tree failed