From: Russell King <rmk@dyn-67.arm.linux.org.uk>
Date: Tue, 2 Dec 2008 22:07:40 +0000 (+0000)
Subject: Merge branch 'for-rmk' of git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa... 
X-Git-Tag: v2.6.29-rc1~559^2~35
X-Git-Url: https://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=c5b84b3bb0c055d70dc9f1b5e900378bc9d059ea;p=pandora-kernel.git

Merge branch 'for-rmk' of git://git./linux/kernel/git/ycmiao/pxa-linux-2.6 into devel

Conflicts:

	arch/arm/mach-pxa/pxa25x.c
---

c5b84b3bb0c055d70dc9f1b5e900378bc9d059ea
diff --cc arch/arm/mach-pxa/Kconfig
index 740f0a382bac,8627e718a613..6755c7d6bb31
--- a/arch/arm/mach-pxa/Kconfig
+++ b/arch/arm/mach-pxa/Kconfig
@@@ -396,9 -400,14 +402,15 @@@ config PXA27
  	help
  	  Select code specific to PXA27x variants
  
+ config CPU_PXA26x
+ 	bool
+ 	select PXA25x
+ 	help
+ 	  Select code specific to PXA26x (codename Dalhart)
+ 
  config PXA3xx
  	bool
 +	select CPU_XSC3
  	help
  	  Select code specific to PXA3xx variants
  
diff --cc arch/arm/mach-pxa/clock.c
index a3e0e1989a6b,9fcba78ad584..40b774084514
--- a/arch/arm/mach-pxa/clock.c
+++ b/arch/arm/mach-pxa/clock.c
@@@ -12,9 -12,7 +12,8 @@@
  #include <linux/platform_device.h>
  #include <linux/delay.h>
  
 +#include <asm/clkdev.h>
  #include <mach/pxa2xx-regs.h>
- #include <mach/pxa2xx-gpio.h>
  #include <mach/hardware.h>
  
  #include "devices.h"
diff --cc arch/arm/mach-pxa/pxa25x.c
index 344b3282caf9,265b8a5657b7..6c57522e2469
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@@ -371,8 -358,8 +373,8 @@@ static int __init pxa25x_init(void
  	}
  
  	/* Only add HWUART for PXA255/26x; PXA210/250 do not have it. */
- 	if (cpu_is_pxa255() || cpu_is_pxa26x()) {
+ 	if (cpu_is_pxa255()) {
 -		clks_register(&pxa25x_hwuart_clk, 1);
 +		clks_register(&pxa25x_hwuart_clkreg, 1);
  		ret = platform_device_register(&pxa_device_hwuart);
  	}
  
diff --cc drivers/net/irda/pxaficp_ir.c
index 37424f01ebee,ba445133f3eb..0e081292f4f7
--- a/drivers/net/irda/pxaficp_ir.c
+++ b/drivers/net/irda/pxaficp_ir.c
@@@ -22,10 -22,52 +22,53 @@@
  #include <net/irda/wrapper.h>
  #include <net/irda/irda_device.h>
  
 -#include <asm/dma.h>
 +#include <mach/dma.h>
  #include <mach/irda.h>
 +#include <mach/hardware.h>
  #include <mach/pxa-regs.h>
+ #include <mach/regs-uart.h>
+ 
+ #define FICP		__REG(0x40800000)  /* Start of FICP area */
+ #define ICCR0		__REG(0x40800000)  /* ICP Control Register 0 */
+ #define ICCR1		__REG(0x40800004)  /* ICP Control Register 1 */
+ #define ICCR2		__REG(0x40800008)  /* ICP Control Register 2 */
+ #define ICDR		__REG(0x4080000c)  /* ICP Data Register */
+ #define ICSR0		__REG(0x40800014)  /* ICP Status Register 0 */
+ #define ICSR1		__REG(0x40800018)  /* ICP Status Register 1 */
+ 
+ #define ICCR0_AME	(1 << 7)	/* Address match enable */
+ #define ICCR0_TIE	(1 << 6)	/* Transmit FIFO interrupt enable */
+ #define ICCR0_RIE	(1 << 5)	/* Recieve FIFO interrupt enable */
+ #define ICCR0_RXE	(1 << 4)	/* Receive enable */
+ #define ICCR0_TXE	(1 << 3)	/* Transmit enable */
+ #define ICCR0_TUS	(1 << 2)	/* Transmit FIFO underrun select */
+ #define ICCR0_LBM	(1 << 1)	/* Loopback mode */
+ #define ICCR0_ITR	(1 << 0)	/* IrDA transmission */
+ 
+ #define ICCR2_RXP       (1 << 3)	/* Receive Pin Polarity select */
+ #define ICCR2_TXP       (1 << 2)	/* Transmit Pin Polarity select */
+ #define ICCR2_TRIG	(3 << 0)	/* Receive FIFO Trigger threshold */
+ #define ICCR2_TRIG_8    (0 << 0)	/* 	>= 8 bytes */
+ #define ICCR2_TRIG_16   (1 << 0)	/*	>= 16 bytes */
+ #define ICCR2_TRIG_32   (2 << 0)	/*	>= 32 bytes */
+ 
+ #ifdef CONFIG_PXA27x
+ #define ICSR0_EOC	(1 << 6)	/* DMA End of Descriptor Chain */
+ #endif
+ #define ICSR0_FRE	(1 << 5)	/* Framing error */
+ #define ICSR0_RFS	(1 << 4)	/* Receive FIFO service request */
+ #define ICSR0_TFS	(1 << 3)	/* Transnit FIFO service request */
+ #define ICSR0_RAB	(1 << 2)	/* Receiver abort */
+ #define ICSR0_TUR	(1 << 1)	/* Trunsmit FIFO underun */
+ #define ICSR0_EIF	(1 << 0)	/* End/Error in FIFO */
+ 
+ #define ICSR1_ROR	(1 << 6)	/* Receiver FIFO underrun  */
+ #define ICSR1_CRE	(1 << 5)	/* CRC error */
+ #define ICSR1_EOF	(1 << 4)	/* End of frame */
+ #define ICSR1_TNF	(1 << 3)	/* Transmit FIFO not full */
+ #define ICSR1_RNE	(1 << 2)	/* Receive FIFO not empty */
+ #define ICSR1_TBY	(1 << 1)	/* Tramsmiter busy flag */
+ #define ICSR1_RSY	(1 << 0)	/* Recevier synchronized flag */
  
  #define IrSR_RXPL_NEG_IS_ZERO (1<<4)
  #define IrSR_RXPL_POS_IS_ZERO 0x0