From: Sekhar Nori <nsekhar@ti.com>
Date: Tue, 20 Jul 2010 11:16:51 +0000 (+0530)
Subject: davinci: am18x/da850/omap-l138: keep async clock constant with cpufreq
X-Git-Tag: v2.6.37-rc1~122^2~1^2~38
X-Git-Url: https://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=b987c4b2c9c9db2393f4c089e63d1734301214e5;p=pandora-kernel.git

davinci: am18x/da850/omap-l138: keep async clock constant with cpufreq

Keep PLL0 SYSCLK3 at a constant rate of 100MHz. This enables the AEMIF
timing to remain valid even as the PLL0 output is changed by cpufreq
driver to save power.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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