From: Kirill A. Shutemov <kirill@shutemov.name>
Date: Tue, 15 Sep 2009 09:23:53 +0000 (+0100)
Subject: ARM: 5700/1: ARM: Introduce ARM_L1_CACHE_SHIFT to define cache line size
X-Git-Tag: v2.6.32-rc1~49^2~1^2~16
X-Git-Url: https://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=910a17e57ab6cd22b300bde4ce5f633f175c7ccd;p=pandora-kernel.git

ARM: 5700/1: ARM: Introduce ARM_L1_CACHE_SHIFT to define cache line size

Currently kernel believes that all ARM CPUs have L1_CACHE_SHIFT == 5.
It's not true at least for CPUs based on Cortex-A8.

List of CPUs with cache line size != 32 should be expanded later.

Signed-off-by: Kirill A. Shutemov <kirill@shutemov.name>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
---

Reading git-diff-tree failed