From: Baptiste Reynal <b.reynal@virtualopensystems.com>
Date: Wed, 4 Mar 2015 15:51:06 +0000 (+0100)
Subject: iommu/arm-smmu: fix ARM_SMMU_FEAT_TRANS_OPS condition
X-Git-Tag: omap-for-v4.2/o2_dc~233^2~3
X-Git-Url: https://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=83a60ed8f0b5;p=pandora-kernel.git

iommu/arm-smmu: fix ARM_SMMU_FEAT_TRANS_OPS condition

This patch is a fix to "iommu/arm-smmu: add support for iova_to_phys
through ATS1PR".
According to ARM documentation, translation registers are optional even
in SMMUv1, so ID0_S1TS needs to be checked to verify their presence.
Also, we check that the domain is a stage-1 domain.

Signed-off-by: Baptiste Reynal <b.reynal@virtualopensystems.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
---

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