From: Manuel Lauss Date: Wed, 18 Feb 2015 10:01:56 +0000 (+0100) Subject: MIPS: Alchemy: Fix cpu clock calculation X-Git-Tag: omap-for-v4.1/prcm-dts-mfd-syscon-fix~5^2~20 X-Git-Url: https://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=69e4e63ec816a7e22cc3aa14bc7ef4ac734d370c;p=pandora-kernel.git MIPS: Alchemy: Fix cpu clock calculation The current code uses bits 0-6 of the sys_cpupll register to calculate core clock speed. However this is only valid on Au1300, on all earlier models the hardware only uses bits 0-5 to generate core clock. This fixes clock calculation on the MTX1 (Au1500), where bit 6 of cpupll is set as well, which ultimately lead the code to calculate a bogus cpu core clock and also uart base clock down the line. Signed-off-by: Manuel Lauss Reported-by: John Crispin Tested-by: Bruno Randolf Cc: stable@vger.kernel.org [v3.17+] Cc: Linux-MIPS Patchwork: https://patchwork.linux-mips.org/patch/9279/ Signed-off-by: Ralf Baechle --- Reading git-diff-tree failed