From: Jisheng Zhang <jszhang@marvell.com>
Date: Thu, 12 Jun 2014 09:38:40 +0000 (+0800)
Subject: ARM: dts: berlin2q: set L2CC tag and data latency to 2 cycles
X-Git-Tag: omap-for-v3.17/fixes-against-rc2~120^2~30^2~6
X-Git-Url: https://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=44991eb4bfd63b043b50e880d347a7946d6a9736;p=pandora-kernel.git

ARM: dts: berlin2q: set L2CC tag and data latency to 2 cycles

For all BG2Q SoCs, 2 cycles is the best/correct value.

Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
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