From: Xiaofan Tian <tianxf@marvell.com>
Date: Thu, 30 Aug 2012 09:03:35 +0000 (+0800)
Subject: regmap: irq: Add mask invert flag for enable register
X-Git-Tag: omap-for-v3.7-rc1/fixes-cpufreq-signed~107^2^3~1
X-Git-Url: https://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=36ac914ba2a5f1a14c5e0bf5d33bc20016d50940;p=pandora-kernel.git

regmap: irq: Add mask invert flag for enable register

Currently, regmap will write 1 to mask_base to mask
an interrupt and write 0 to unmask it.

But some chips do not have an interrupt mask register,
and only have interrupt enable register.
Then we should write 0 to disable interrupt and 1 to enable.

So add an mask_invert flag to handle this.
If it is not set, behavior is same as previous.
If set it to 1, the mask value will be inverted
before written to mask_base

Signed-off-by: Xiaofan Tian <tianxf@marvell.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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