From: Vaibhav Hiremath <hvaibhav@ti.com>
Date: Thu, 11 Feb 2010 02:23:01 +0000 (-0800)
Subject: AM35xx: Add AM35xx intr_clr & sw_rst cntrl reg bit definition
X-Git-Url: https://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=3109edceb870d76e08d2083ec60ed78cbf0661cf;p=pandora-kernel.git

AM35xx: Add AM35xx intr_clr & sw_rst cntrl reg bit definition

AM3517/05 has few additional control module registers to control
the new IP's, like VPFE, USBOTG, CPGMAC.

This patch adds the bit defination for INTR_CLR and SW_RST control
register.

Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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