From: Jonas Karlman <jonas@kwiboo.se>
Date: Fri, 1 Aug 2025 20:43:37 +0000 (+0000)
Subject: rockchip: clk: clk_rk3576: Add dummy CLK_REF_PCIEx_PHY support
X-Git-Tag: v2025.10-rc4~8^2~34
X-Git-Url: https://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=2a6039a20994c192edb6786fa97714180bd663cf;p=pandora-u-boot.git

rockchip: clk: clk_rk3576: Add dummy CLK_REF_PCIEx_PHY support

Add dummy support for the CLK_REF_PCIEx_PHY clocks to allow probe of the
phy-rockchip-naneng-combphy driver on RK3576.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
---

diff --git a/drivers/clk/rockchip/clk_rk3576.c b/drivers/clk/rockchip/clk_rk3576.c
index e84a0943a94..125b08ee832 100644
--- a/drivers/clk/rockchip/clk_rk3576.c
+++ b/drivers/clk/rockchip/clk_rk3576.c
@@ -2168,6 +2168,8 @@ static ulong rk3576_clk_set_rate(struct clk *clk, ulong rate)
 	case CLK_CPLL_DIV10:
 	case FCLK_DDR_CM0_CORE:
 	case ACLK_PHP_ROOT:
+	case CLK_REF_PCIE0_PHY:
+	case CLK_REF_PCIE1_PHY:
 		ret = 0;
 		break;
 #ifndef CONFIG_SPL_BUILD